34f37e0d04
Charge a formula for explicit multiplies on scaled registers too,
...
not just base registers.
llvm-svn: 116010
2010-10-07 23:41:58 +00:00
49d638b45a
Use size_t for consistency.
...
llvm-svn: 116009
2010-10-07 23:37:58 +00:00
8e72611058
When merging one use into another, transfer the offsets from
...
the old use to the new one.
llvm-svn: 116008
2010-10-07 23:36:45 +00:00
4fb38d3cd3
Reimplement (part of) the or -> add optimization. Matching 'or' into 'add'
...
is general goodness because it allows ORs to be converted to LEA to avoid
inserting copies. However, this is bad because it makes the generated .s
file less obvious and gives valgrind heartburn (tons of false positives in
bitfield code).
While the general fix should be in valgrind, we can at least try to avoid
emitting ADD instructions that *don't* get promoted to LEA. This is more
work because it requires introducing pseudo instructions to represents
"add that knows the bits are disjoint", but hey, people really love valgrind.
This fixes this testcase:
https://bugs.kde.org/show_bug.cgi?id=242137#c20
the add r/i cases are coming next.
llvm-svn: 116007
2010-10-07 23:36:18 +00:00
0f1677e190
After splitting, the remaining LiveInterval may be fragmented into multiple
...
connected components. These components should be allocated different virtual
registers because there is no reason for them to be allocated together.
Add the ConnectedVNInfoEqClasses class to calculate the connected components,
and move values to new LiveIntervals.
Use it from SplitKit::rewrite by creating new virtual registers for the
components.
llvm-svn: 116006
2010-10-07 23:34:34 +00:00
a7b68d6d95
Fix LSR to keep the RegUseTracker up to date when combining users.
...
This doesn't usually matter, because the other heuristics usually
succeed regardless, but it's good to keep the register use
bookkeeping consistent.
llvm-svn: 116005
2010-10-07 23:33:43 +00:00
57da4caa85
Remove LoopIndexSplit pass. It is neither maintained nor used by anyone.
...
llvm-svn: 116004
2010-10-07 23:29:37 +00:00
f41f11c37e
Unbreak cmake build.
...
llvm-svn: 116003
2010-10-07 23:12:15 +00:00
412e37bd34
Code refactoring.
...
llvm-svn: 116002
2010-10-07 23:12:15 +00:00
1c090c00bc
Reduce casting in various tables by defining the table
...
with the right types.
llvm-svn: 116001
2010-10-07 23:08:41 +00:00
70a7b54f97
simplify code: don't build up vector only to assert it is empty.
...
llvm-svn: 115997
2010-10-07 22:26:19 +00:00
df7a4f2515
Now with fewer extraneous semicolons!
...
llvm-svn: 115996
2010-10-07 22:25:06 +00:00
91029094e0
Trivial MC code emitter shell. No instruction forms actually handled yet.
...
llvm-svn: 115993
2010-10-07 22:12:50 +00:00
139edad73a
Correctly check if a path is a directory. Fix by Brian Korver.
...
llvm-svn: 115991
2010-10-07 22:05:57 +00:00
3a24f9230a
Provie a clearner interface so that FE can decide whether a function has prototype or not.
...
llvm-svn: 115988
2010-10-07 22:03:01 +00:00
8aed386d82
Include the auto-generated bits for machine encoding.
...
llvm-svn: 115987
2010-10-07 21:57:55 +00:00
3e1e447ca2
Remember to promote load/store types for stack to register size.
...
llvm-svn: 115984
2010-10-07 21:40:18 +00:00
f5c60d8156
convert test to use the existing classes that the multipatterns
...
use. Since TEST is completely different than all other binops,
don't define a multipattern for it.
This completes factorization of binops.
llvm-svn: 115982
2010-10-07 21:31:03 +00:00
ae8d67d3bb
convert cmp to use a multipattern
...
llvm-svn: 115978
2010-10-07 20:56:25 +00:00
5c31bf0619
Canonicalize X86ISD::MOVDDUP nodes to v2f64 to make sure all cases match. Also eliminate unneeded isel patterns. rdar://8520311
...
llvm-svn: 115977
2010-10-07 20:50:20 +00:00
07b5b1802e
ARM instruction don't have instruction prefixes, so remove the helper functions
...
for them from the MCCodeEmitter.
llvm-svn: 115975
2010-10-07 20:41:30 +00:00
0df7ea4c24
Move tool_output_file into its own file.
...
llvm-svn: 115973
2010-10-07 20:32:40 +00:00
9786868939
Add initialization routines for Instrumentation.
...
llvm-svn: 115971
2010-10-07 20:17:24 +00:00
a8c0bbb869
reduce redundancy between pattern copies.
...
llvm-svn: 115968
2010-10-07 20:14:23 +00:00
9fece2bea2
the opcode for BinOpMI/BinOpMI8 is always the same, remove the argument.
...
llvm-svn: 115967
2010-10-07 20:06:24 +00:00
546c11c72f
Improve comment.
...
llvm-svn: 115966
2010-10-07 20:05:18 +00:00
f7ef5dfccc
Add initialization routines to InstCombine.
...
llvm-svn: 115965
2010-10-07 20:04:55 +00:00
752b60bc01
convert adc/sbb to a multipattern. Because the adde/sube nodes
...
are not defined as returning EFLAGS (like add_flag and friends),
the entire multipattern and several of the subclasses need to be
cloned.
This could be handled through better instantiation support in tblgen,
but it isn't meta enough.
llvm-svn: 115964
2010-10-07 20:01:55 +00:00
44621e4306
Add initialization routines for VMCore.
...
llvm-svn: 115963
2010-10-07 19:51:21 +00:00
e9d5d0736c
Add initialization routines for Target.
...
llvm-svn: 115957
2010-10-07 18:50:11 +00:00
c6a6e9ba7c
Fix obvious mistake pointed out by Michael Spencer.
...
llvm-svn: 115952
2010-10-07 18:47:10 +00:00
9bfd9679f9
Print more loop info.
...
llvm-svn: 115951
2010-10-07 18:47:07 +00:00
7c31730053
Print out MBB number when rewriting.
...
llvm-svn: 115950
2010-10-07 18:47:05 +00:00
80fc0762f3
Add initialization routines for CodeGen.
...
llvm-svn: 115949
2010-10-07 18:41:20 +00:00
98eb3ec6c5
Add an implementation of the initialization routine for IPA.
...
llvm-svn: 115947
2010-10-07 18:31:27 +00:00
6875c2ea26
Add initialization routines for Analysis and IPA.
...
llvm-svn: 115946
2010-10-07 18:31:00 +00:00
bf70a035f0
Add an initialization routine for libLLVMipo.a
...
llvm-svn: 115933
2010-10-07 18:09:59 +00:00
49715fd494
Cache interval iterators in SplitEditor::addTruncSimpleRange so we only have to
...
do one find().
llvm-svn: 115929
2010-10-07 17:56:39 +00:00
9575af4b06
Clean up debug printing.
...
llvm-svn: 115928
2010-10-07 17:56:35 +00:00
4698c5d7f7
Next step on the getting-rid-of-static-ctors train: begin adding per-library
...
initialization functions that initialize the set of passes implemented in
that library. Add C bindings for these functions as well.
llvm-svn: 115927
2010-10-07 17:55:47 +00:00
82d38df40c
Fix a warning when building with clang++.
...
llvm-svn: 115924
2010-10-07 17:04:18 +00:00
ac1ffa27b6
Add the missing cases to the type->registerclass conversion function.
...
llvm-svn: 115921
2010-10-07 16:32:42 +00:00
a845022ddd
Implement two virtual functions in SPUTargetLowering.
...
Before the implementation of isLegalAddressingMode, some rare cases
of code were miscompiled if optimized with the LoopStrengthReduce pass.
It is unclear (to me) if LSR is "allowed" to produce wrong code with a
bad TargetLowering, or if the bug is elsewhere and this patch just
hides it.
llvm-svn: 115919
2010-10-07 16:24:35 +00:00
87002b592e
Minor cosmetic change: fix DOSish \r\n.
...
llvm-svn: 115910
2010-10-07 07:21:04 +00:00
1666b61357
MC-COFF: Fix symbol aliases. Fixes PR8251.
...
llvm-svn: 115909
2010-10-07 06:29:33 +00:00
a2583ea9f2
Use the correct register class for load instructions - fixes
...
compilation of MultiSource/Benchmarks/Bullet.
llvm-svn: 115907
2010-10-07 05:50:44 +00:00
76a9752d45
Use the correct register class here.
...
llvm-svn: 115906
2010-10-07 05:39:19 +00:00
a98be90efe
Use the thumb2 conditional move instruction.
...
llvm-svn: 115905
2010-10-07 05:31:49 +00:00
6d74673366
Remove in-progress assertion, add TODO.
...
llvm-svn: 115904
2010-10-07 05:14:08 +00:00
5e19bfcde3
Move the pass initialization helper functions into the llvm namespace, and add
...
a header declaring them all. This is also where we will declare per-library pass-set
initializer functions down the road.
llvm-svn: 115900
2010-10-07 04:13:08 +00:00
1958cefd69
Model operand cycles of vldm / vstm; also fixes scheduling itineraries of vldr / vstr, etc.
...
llvm-svn: 115898
2010-10-07 01:50:48 +00:00
67677515ac
add support for isConvertibleToThreeAddress to ArithBinOpEFLAGS,
...
allowing us to convert ADD over. deletes 160 lines of .td file.
llvm-svn: 115897
2010-10-07 01:37:01 +00:00
4fc52f6fa0
Fix a few issues in ArithBinOpEFLAGS that made it specific to and.
...
Start using ArithBinOpEFLAGS for OR, XOR, and SUB.
This removes 500 lines from the .td file. Now AND/OR/XOR/SUB are all
defined exactly the same way instead of being close relatives.
llvm-svn: 115896
2010-10-07 01:26:27 +00:00
26d6a0449a
Convert 'and' to single instance of a multipattern
...
which instantiates the 34 versions of and all in one
swoop. The BaseOpc/BaseOpc2/BaseOpc4 stuff should not
be required, but tblgen's feeble brain explodes when I
use Or4<BaseOpc>.V in the multipattern.
No change in the generated .inc files.
llvm-svn: 115893
2010-10-07 01:10:20 +00:00
5b255c2dd6
Allow use of the 16-bit literal move instruction in CMOVs for Thumb2 mode.
...
llvm-svn: 115890
2010-10-07 00:53:56 +00:00
b71a77d7b8
add a new BinOpAI class to represent the immediate form that directly acts on EAX.
...
This does change the generated .inc files to include the implicit use/def of eax.
Since these instructions are only generated by the assembler and disassembler it
doesn't actually matter though.
llvm-svn: 115885
2010-10-07 00:43:39 +00:00
742adc328a
Allow use of the 16-bit literal move instruction in CMOVs for ARM mode.
...
llvm-svn: 115884
2010-10-07 00:42:42 +00:00
894d2e6146
add a bunch of classes for other common patterns.
...
As usual, no change in generated .inc files.
llvm-svn: 115882
2010-10-07 00:35:28 +00:00
6da4d820fa
Since the Hello pass is built as a loadable dynamic library, don't try to convert it to new-style registration yet.
...
llvm-svn: 115881
2010-10-07 00:31:16 +00:00
e17d7212f1
Define a new BinOpRI8 class and use it to define the imm8 versions of and.
...
llvm-svn: 115880
2010-10-07 00:12:45 +00:00
b19bae4e3e
Constrain the offset register to a *_NOSP register class when inserting LEA
...
instructions.
This unbreaks the machine code verifier and fixes PR8317.
llvm-svn: 115879
2010-10-07 00:07:26 +00:00
356f16c142
add the pattern operator to match to X86TypeInfo, use this to
...
convert AND64ri32 to use BinOpRI.
llvm-svn: 115878
2010-10-07 00:01:39 +00:00
b2dd88db6b
Properly handle GR32_NOSP in X86RegisterInfo::getMatchingSuperRegClass.
...
This function looks like it is about ready to be generated by TebleGen.
llvm-svn: 115876
2010-10-06 23:56:46 +00:00
18842783cc
Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE.
...
This function is intended to be used when inserting a machine instruction that
trivially restricts the legal registers, like LEA requiring a GR32_NOSP
argument.
llvm-svn: 115875
2010-10-06 23:54:39 +00:00
1a065e4e5b
Skip unused registers when verifying LiveIntervals.
...
llvm-svn: 115874
2010-10-06 23:54:35 +00:00
25cd3bfbd7
remove trailing whitespace
...
llvm-svn: 115860
2010-10-06 22:46:47 +00:00
bff84d418f
First in a sequence of ARM/MC/*ELF* specific work.
...
Lifted the EmitRawText calls to ARMAsmPrinter::emitAttribute()
Added ARMAsmPrinter::emitAttributes() (plural s).
TODO:
.cpu attribute needs to be refactored
llvm-svn: 115859
2010-10-06 22:36:46 +00:00
883936ce0b
Another case of 256 sections not being enough :-)
...
llvm-svn: 115858
2010-10-06 22:28:19 +00:00
af08ad4350
Appease the clang self-host buildbot by providing a correct instantiation.
...
llvm-svn: 115857
2010-10-06 22:23:20 +00:00
24ab1ce8c2
Clean up MOVi32imm and t2MOVi32imm pseudo instruction definitions.
...
llvm-svn: 115853
2010-10-06 22:01:26 +00:00
f49540cb4f
Kill of the vestiges of the 'call' Modifier (no longer needed for PLT).
...
llvm-svn: 115845
2010-10-06 21:36:43 +00:00
2c95027258
Now that VDUPfqf and VDUPfdfare properly pseudos, kill the no-longer-needed
...
"lane" operand modifier.
llvm-svn: 115843
2010-10-06 21:22:32 +00:00
2e3e2a006b
Change the NEON VDUPfdf and VDUPfqf pseudo-instructions to actually be
...
pseudo instructions.
llvm-svn: 115840
2010-10-06 21:16:16 +00:00
5f2d6a5cd9
Get binding and visibility info from the the alias, but Type from the symbol
...
being aliased.
llvm-svn: 115836
2010-10-06 21:02:29 +00:00
ad8134f03b
Hide analysis group registration behind a macro, just like pass registration.
...
llvm-svn: 115835
2010-10-06 21:02:27 +00:00
9a33ec24eb
Add support for DW_TAG_unspecified_parameters.
...
llvm-svn: 115833
2010-10-06 20:50:40 +00:00
233b3a2f95
Add a 'pattern' arg to the ARM PseudoNeonI class.
...
llvm-svn: 115831
2010-10-06 20:36:55 +00:00
e535b01a74
MC: Add missing forward in MCLoggingStreamer.
...
llvm-svn: 115830
2010-10-06 20:36:47 +00:00
5ed50b6151
Revert "RequiresUnique" patch. This should be handled at a lower level.
...
llvm-svn: 115827
2010-10-06 20:18:44 +00:00
d444577382
If a symbol is global, reloc against it even if it is in a mergeable section.
...
llvm-svn: 115817
2010-10-06 19:27:21 +00:00
ec0da969fb
Remove unused variables.
...
llvm-svn: 115802
2010-10-06 18:11:50 +00:00
8025f89860
target operand flag values aren't a bitmask
...
llvm-svn: 115798
2010-10-06 16:51:55 +00:00
83b2a3337f
Make sure weak symbols are listed after the local ones.
...
llvm-svn: 115795
2010-10-06 16:47:31 +00:00
8f3d2c9058
Correctly handle GOTPCREL relocations.
...
llvm-svn: 115793
2010-10-06 16:23:36 +00:00
aadc5596f1
ComputeLinearIndex doesn't need its TLI argument.
...
llvm-svn: 115792
2010-10-06 16:18:29 +00:00
10f60fa411
Change RequiresMerge to RequiresUnique. It's a better description of what this
...
fix is trying to accomplish.
This code could still use some polishing.
llvm-svn: 115759
2010-10-06 07:03:52 +00:00
49d4c0bd18
- Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This
...
allow target to correctly compute latency for cases where static scheduling
itineraries isn't sufficient. e.g. variable_ops instructions such as
ARM::ldm.
This also allows target without scheduling itineraries to compute operand
latencies. e.g. X86 can return (approximated) latencies for high latency
instructions such as division.
- Compute operand latencies for those defined by load multiple instructions,
e.g. ldm and those used by store multiple instructions, e.g. stm.
llvm-svn: 115755
2010-10-06 06:27:31 +00:00
cd8fe46d4b
If the destination module all ready has a copy of the global coming from the
...
source module *and* it must be merged (instead of simply replaced or appended
to), then merge instead of replacing or adding another global.
The ObjC __image_info section was being appended to because of this
failure. This caused a crash because the linker expects the image info section
to be a specific size.
<rdar://problem/8198537>
llvm-svn: 115753
2010-10-06 06:16:30 +00:00
6e85be2ecf
enhance X86TypeInfo to include information about the encoding and
...
operand kind for immediates. Use these to define a new BinOpRI
class and switch AND8/16/32ri over to it. AND64ri32 needs some
more refactoring before it can make the switcheroo.
llvm-svn: 115752
2010-10-06 05:55:42 +00:00
94eff91dc0
add a class for _REV nodes.
...
llvm-svn: 115748
2010-10-06 05:35:22 +00:00
a46073b56b
sink more intelligence into the ITy base class. Now it knows
...
that i8 operations are even and i16,i32,i64 operations have a
low opcode bit set (they are odd).
llvm-svn: 115747
2010-10-06 05:28:38 +00:00
b6da2be7e8
refactor things a bit, now the REX_W and OpSize prefix bytes are inferred from the type info.
...
llvm-svn: 115745
2010-10-06 05:20:57 +00:00
7bbd809b6c
with tblgen suitably extended, we can now get the load node from typeinfo.
...
llvm-svn: 115744
2010-10-06 04:58:43 +00:00
ad205575fc
lib/System/Win32/Signals.inc: Enable LLVM_DISABLE_CRT_DEBUG also on mingw.
...
llvm-svn: 115731
2010-10-06 02:15:22 +00:00
0198ce06fc
Provide a fast "get me the target triple from the module" API. This can
...
drastically reduce the linking time during LTO.
Patch by Shantonu Sen!
llvm-svn: 115728
2010-10-06 01:22:42 +00:00
1fc81e90f7
lets go all meta and define new X86 type wrappers that declare the associated
...
gunk that goes along with an MVT (e.g. reg class, preferred load operation,
memory operand)
llvm-svn: 115727
2010-10-06 00:45:24 +00:00
eadaeaab93
introduce a new BinOpRM class and use it to factor AND*rm. This points out
...
that I need a heavier handed approach to get ultimate factorization.
llvm-svn: 115726
2010-10-06 00:30:49 +00:00
9402633637
remove the !nameconcat tblgen feature. It "shorthand" and only used in 4 places
...
where !cast is just as short.
llvm-svn: 115722
2010-10-06 00:19:21 +00:00
04c342ea20
replace stuff like:
...
let AsmString = !strconcat(
!strconcat(!strconcat(opc, "${p}"), !strconcat(".", dt)),
!strconcat("\t", asm));
with:
let AsmString = !strconcat(opc, "${p}", ".", dt, "\t", asm);
:)
llvm-svn: 115720
2010-10-06 00:05:18 +00:00
61ea00b494
allow !strconcat to take more than two operands to eliminate
...
!strconcat(!strconcat(!strconcat(!strconcat
Simplify some x86 td files to use it.
llvm-svn: 115719
2010-10-05 23:58:18 +00:00
d7565c3a06
Use a relocation against the symbol if it is a PLT and the symbol is in another
...
section. Common because of linkonce sections.
llvm-svn: 115718
2010-10-05 23:57:26 +00:00
b9f2d50d5f
Comment out fastisel debugging message.
...
llvm-svn: 115717
2010-10-05 23:50:58 +00:00
97b1368ae3
associate the instruction suffix letter with the integer gpr
...
register class, and use this to simplify use of BinOpRR.
llvm-svn: 115716
2010-10-05 23:43:04 +00:00
7359194b63
introduce a new BinOpRR class, and convert 4 and instructions to use it.
...
llvm-svn: 115715
2010-10-05 23:32:05 +00:00
8cfc459274
Random cleanup and make the intermediate register in fptosi a
...
32-bit fp reg, not 64-bit.
Fixes SingleSource.
llvm-svn: 115711
2010-10-05 23:13:24 +00:00
4d5156c7d0
Count uses in all nested loops, not just the deepest.
...
llvm-svn: 115710
2010-10-05 23:10:12 +00:00
56e2925e6c
Remove SplitAnalysis::removeUse. It was only used to make SplitAnalysis
...
reusable, but that is no longer relevant since a split will always replace the
original.
llvm-svn: 115709
2010-10-05 23:10:09 +00:00
0445e2a053
dupli always has an interval now.
...
llvm-svn: 115708
2010-10-05 23:10:04 +00:00
cff5b0ea36
Move cmov pseudo instructions to InstrCompiler,
...
convert all the rest of the cmovs to the multiclass,
with good results:
X86InstrCMovSetCC.td | 598 +--------------------------------------------------
X86InstrCompiler.td | 61 +++++
2 files changed, 77 insertions(+), 582 deletions(-)
llvm-svn: 115707
2010-10-05 23:09:10 +00:00
1a1c600110
Use #NAME# to have the CMOV multiclass define things with the same names as before
...
(e.g. CMOVBE16rr instead of CMOVBErr16).
llvm-svn: 115705
2010-10-05 23:00:14 +00:00
c25b39702f
Another step towards getting rid of static ctors for pass registration: have INITIALIZE_PASS AND INITIALIZE_AG_PASS
...
expand to an initializeMyPass() function (in additional to the extant static ctors). Eventually, these will be called
from a big InitializeAllPasses() function, and the PassInfo's they create (which would be leaked if this code were used
at the moment) will be handed off to a PassRegistry for ownership.
llvm-svn: 115703
2010-10-05 22:58:16 +00:00
7538ed80a9
enhance tblgen to support anonymous defm's, use this to
...
simplify the X86 CMOVmr's.
llvm-svn: 115702
2010-10-05 22:51:56 +00:00
fa25dd9548
convert cmov mr patterns to use a multipattern. Death to redundancy
...
and verbosity
llvm-svn: 115701
2010-10-05 22:42:54 +00:00
0ad137e98e
Implement more alias cases.
...
llvm-svn: 115699
2010-10-05 22:26:43 +00:00
0067ee02f9
switch CMOVBE to the multipattern:
...
21 insertions(+), 53 deletions(-)
Moar change coming before I switch the rest.
llvm-svn: 115697
2010-10-05 22:23:58 +00:00
2dfa8be26a
We can split around loops with multiple exits now.
...
llvm-svn: 115696
2010-10-05 22:19:35 +00:00
89d276aa48
Update SplitEditor API to reflect the fact that the original live interval is
...
never kept after splitting.
Keeping the original interval made sense when the split region doesn't modify
the register, and the original is spilled. We can get the same effect by
detecting reloaded values when spilling around copies.
llvm-svn: 115695
2010-10-05 22:19:33 +00:00
b46d32367f
Intervals are half-open.
...
llvm-svn: 115694
2010-10-05 22:19:29 +00:00
907d86db22
fix a bug I introduced in r115669, which ended up with MOV64mr_TC
...
not getting marked as mayStore. This fixes llvm-gcc bootstrap.
llvm-svn: 115693
2010-10-05 22:16:48 +00:00
c3a767e9b0
add a multiclass for cmov's, but don't start using it yet.
...
llvm-svn: 115692
2010-10-05 22:01:02 +00:00
aa02c1c91d
use a multipattern to define setcc instructions:
...
X86InstrCMovSetCC.td | 200 ++++++---------------------------------------------
1 file changed, 27 insertions(+), 173 deletions(-)
llvm-svn: 115689
2010-10-05 21:34:29 +00:00
3844da781f
256 sections should be enough for anyone...
...
llvm-svn: 115687
2010-10-05 21:20:07 +00:00
8f4f1d1136
move SETB pseudos into the same place in InstrCompiler.td
...
llvm-svn: 115686
2010-10-05 21:18:04 +00:00
13111b08fb
Replace a gross hack (the MOV64ri_alt instruction) with a slightly less
...
gross hack (having the asmmatcher handle the alias).
llvm-svn: 115685
2010-10-05 21:09:45 +00:00
c58a37ea51
Don't crash in a strange .size directive.
...
llvm-svn: 115684
2010-10-05 21:02:45 +00:00
ab85ef9e55
distribute the rest of the contents of X86Instr64bit.td out to
...
the right places. X86Instr64bit.td now dies, long live x86-64!
llvm-svn: 115669
2010-10-05 20:49:15 +00:00
671bab1c7d
When we find a reaching definition, make sure it is visited from all paths by
...
erasing it from the visited set. That ensures we create the right phi defs.
llvm-svn: 115666
2010-10-05 20:36:28 +00:00
b0cedd5f96
Don't use nextIndex to check for live out of instruction.
...
Insert copy after defining instruction.
Fix LiveIntervalMap::extendTo to properly handle live segments starting before
the current basic block.
Make sure the open live range is extended to the inserted copy's use slot.
llvm-svn: 115665
2010-10-05 20:36:25 +00:00
27c763d342
move the rest of the simple 64-bit arithmetic into InstrArithmetic.td
...
llvm-svn: 115663
2010-10-05 20:35:37 +00:00
c2f5e5764f
continue moving 64-bit stuff into X86InstrArithmetic.td
...
llvm-svn: 115660
2010-10-05 20:23:31 +00:00
a65d17a5ca
Fix Punctuation.
...
llvm-svn: 115657
2010-10-05 19:48:12 +00:00
a3b34ed2df
MC-COFF: Fix (PR8278) temporary symbol relocations.
...
llvm-svn: 115656
2010-10-05 19:48:03 +00:00
b91bac6c96
Add support for a fill value in the .zero directive.
...
llvm-svn: 115655
2010-10-05 19:42:57 +00:00
9a414901db
Tweak VNInfo printing.
...
llvm-svn: 115650
2010-10-05 18:48:57 +00:00
1c9afa1aeb
Add assert for valid slot indexes.
...
llvm-svn: 115649
2010-10-05 18:48:55 +00:00
e929899a3f
Increase the number of bits used internally by the ARM target to represent the
...
addressing mode from four to five.
llvm-svn: 115645
2010-10-05 18:14:55 +00:00
b1d0789357
Implement a simple alias case and refactor the code a bit so that the
...
isInSymtab and isLocal logic in the two loops don't get easily out of sync.
llvm-svn: 115643
2010-10-05 18:01:23 +00:00
d8d1dcc09a
Use a more efficient lowering of uint64_t --> float that can take advantage of hardware signed integer conversion without
...
having to do a double cast (uint64_t --> double --> float). This is based on the algorithm from compiler_rt's __floatundisf
for X86-64.
llvm-svn: 115634
2010-10-05 17:24:05 +00:00
7552d15d19
move 64-bit add and adc to InstrArithmetic.
...
llvm-svn: 115632
2010-10-05 16:59:08 +00:00
182e87caaf
rewrote two addr constraints so that they are only set, not set and then nestedly cleared.
...
llvm-svn: 115631
2010-10-05 16:52:25 +00:00
39c70f4833
split the 32-bit integer arithmetic instructions out to their own file.
...
llvm-svn: 115627
2010-10-05 16:39:12 +00:00
d03e81dba8
Produce a undefined reference to _GLOBAL_OFFSET_TABLE_ when needed.
...
llvm-svn: 115623
2010-10-05 15:48:37 +00:00
6547a50f49
After printing "Running 'Graphviz' program... " and running the
...
Graphviz program, print something with a newline, to avoid leaving
the line unfinished.
llvm-svn: 115620
2010-10-05 15:30:27 +00:00
bce26a1ee0
On ELF we need to know which symbols are used in relocations to decide if
...
they should be in the symbol table or not. Instead of "guessing", just compute
the symbol table after the relocations are known.
llvm-svn: 115619
2010-10-05 15:11:03 +00:00
1818dd510e
integrate the 64-bit shifts into X86InstrShiftRotate.td. Enough for tonight.
...
llvm-svn: 115608
2010-10-05 07:13:35 +00:00
1b3aa8678e
move 32-bit shift and rotates out to their own file.
...
llvm-svn: 115607
2010-10-05 07:00:12 +00:00
89497a990e
add new file
...
llvm-svn: 115606
2010-10-05 06:52:35 +00:00
a68466c202
move sign and zero extensions out to their own file.
...
llvm-svn: 115605
2010-10-05 06:52:26 +00:00
84571a1581
move some instructions from Instr64Bit -> InstrInfo.
...
bswap32 doesn't read eflags.
llvm-svn: 115604
2010-10-05 06:47:35 +00:00
da8c94ef44
move CMOV_FR32 and friends to InstrCompiler, since they are
...
pseudo instructions.
Move POPCNT to InstrSSE since they are SSE4 instructions.
llvm-svn: 115603
2010-10-05 06:41:40 +00:00
44a5a2b569
move various pattern matching support goop out of X86Instr64Bit, to live
...
with the 32-bit stuff.
llvm-svn: 115602
2010-10-05 06:37:31 +00:00
fa9b058eef
split conditional moves and setcc's out to their own file.
...
llvm-svn: 115601
2010-10-05 06:33:16 +00:00
f9594ba4e7
move string pseudo instructions to InstrCompiler consolidate 64-bit and 32-bit together.
...
llvm-svn: 115600
2010-10-05 06:27:48 +00:00
c184a57e98
move the atomic pseudo instructions out to X86InstrCompiler.td
...
llvm-svn: 115599
2010-10-05 06:22:35 +00:00
c793f8bca6
move more pseudo instructions out to X86InstrCompiler.td
...
llvm-svn: 115598
2010-10-05 06:10:16 +00:00
52d3935dfe
move VMX instructions out to their own file.
...
llvm-svn: 115597
2010-10-05 06:06:53 +00:00
ae33f5d93b
continue moving stuff out to X86InstrSystem.td. Move
...
control flow stuff out to X86InstrControl.td. Move
some compiler pseudo instructions and Pat<> patterns
out to X86InstrCompiler.td
llvm-svn: 115596
2010-10-05 06:04:14 +00:00
70ac5fa42c
fix MSVC 2010 build.
...
llvm-svn: 115594
2010-10-05 06:00:43 +00:00
e7f00cbb7c
Cleanup Whitespace.
...
llvm-svn: 115593
2010-10-05 06:00:33 +00:00
dec85b8c64
refactor .td files a bit, moving system instructions out to X86InstrSystem.td
...
llvm-svn: 115591
2010-10-05 05:32:15 +00:00
a85a4e21c9
Re-apply r115363 and r115366 now that r115525 has removed the un-needed header
...
that caused the circular dependencies on Linux.
Built OK for me on OSX and Linux (Ubuntu) with configure/make and CMake. Will
keep an eye on the bots....
llvm-svn: 115582
2010-10-05 00:34:11 +00:00
c8d6cfd730
This DAG combine BRCOND transformation can look pass truncate of the operand:
...
// %a = ...
// %b = and i32 %a, 2
// %c = srl i32 %b, 1
// brcond i32 %c ...
//
// into
//
// %a = ...
// %b = and i32 %a, 2
// %c = setcc eq %b, 0
// brcond %c ...
Make sure it restores local variable N1, which corresponds to the condition operand if it fails to match.
This apparently breaks TCE but since that backend isn't in the tree I don't have a test for it.
llvm-svn: 115571
2010-10-04 22:41:01 +00:00
402e54822b
The pshufw instruction came about in MMX2 when SSE was introduced. Don't place
...
it in with the SSSE3 instructions.
Steward! Could you place this chair by the aft sun deck? I'm trying to get away
from the Astors. They are such boors!
llvm-svn: 115552
2010-10-04 20:24:01 +00:00
a68d004d88
Incorporate suggestions by Daniel Dunbar after his review. Thanks Daniel!
...
1) Changed ValidateDwarfFileNumber() to isValidDwarfFileNumber() to be better
named. Since it is just a predicate and isn't actually changing any state.
2) Added a missing return in the comments for setCurrentDwarfLoc() in
include/llvm/MC/MCContext.h for fix formatting.
3) Changed clearDwarfLocSeen() to ClearDwarfLocSeen() since it does change
state.
4) Simplified the last test in isValidDwarfFileNumber() to just a one line
boolean test of MCDwarfFiles[FileNumber] != 0 for the final return statement.
llvm-svn: 115551
2010-10-04 20:17:24 +00:00
fd1fff8b19
Implement ELF::R_X86_64_GOTPCREL.
...
llvm-svn: 115547
2010-10-04 19:51:39 +00:00
308363336b
Move isFixupKindX86PCRel.
...
llvm-svn: 115545
2010-10-04 19:46:28 +00:00
baadbd554a
Produce a R_X86_64_PLT32 when needed.
...
llvm-svn: 115541
2010-10-04 19:04:13 +00:00
b2c4ca6433
Produce a R_X86_64_GOT32 when needed.
...
llvm-svn: 115537
2010-10-04 18:44:25 +00:00
0807d0065f
Remove unneeded header
...
llvm-svn: 115525
2010-10-04 17:53:40 +00:00
87f77b5f9a
Add hook in MCSection to decide when to use "optimized nops", for each
...
section kind. Previously, optimized nops were only used for MachO.
Also added tests for ELF and COFF.
llvm-svn: 115523
2010-10-04 17:32:41 +00:00
8e4c19ac44
Don't add the operand count to SCEV uniquing data; FoldingSetNodeID
...
already knows its own length, so this is redundant.
llvm-svn: 115521
2010-10-04 17:24:08 +00:00
da0e3d07b2
Include the section address in the computation of the relocation.
...
llvm-svn: 115509
2010-10-04 15:59:01 +00:00
7c48b06930
Correctly compute the relocation when it is not in the first fragment.
...
llvm-svn: 115506
2010-10-04 15:28:43 +00:00
4108e7e192
Removed the older style (in-allocator) problem construction system from the PBQP allocator. Problem construction is now done exclusively with the new builders.
...
llvm-svn: 115502
2010-10-04 12:13:07 +00:00
d77a443631
va_args support for Win64.
...
Patch by Cameron!
llvm-svn: 115480
2010-10-03 22:52:07 +00:00
ff85688559
Properly emit stack probe on win64 (for non-mingw targets).
...
Based on the patch by Cameron Esfahani!
llvm-svn: 115479
2010-10-03 22:02:38 +00:00
bb48e26732
Add 3DNowA instructions.
...
llvm-svn: 115477
2010-10-03 20:23:13 +00:00
d3593c3a8e
the immediate field of pshufw is actually an 8-bit field, not a 8-bit field that is sign extended. This fixes PR8288
...
llvm-svn: 115473
2010-10-03 19:09:13 +00:00
66e08d43d2
Jim Asked us to move DataLayout on ARM back to the most specialized classes. Do
...
so and also change X86 for consistency.
Investigating if this can be improved a bit.
llvm-svn: 115469
2010-10-03 18:59:45 +00:00
b44b202d66
add support for the prefetch/prefetchw instructions, move femms into
...
the right file. The assembler supports all the 3dnow instructions now,
but not the "3dnowa" ones.
llvm-svn: 115468
2010-10-03 18:42:30 +00:00
3a0a620c2e
what the heck, add support for the rest of the 3dNow! binary operations.
...
llvm-svn: 115467
2010-10-03 18:24:18 +00:00
45270db916
Implement support for the bizarre 3DNow! encoding (which is unlike anything
...
else in X86), and add support for pavgusb. This is apparently the
only instruction (other than movsx) that is preventing ffmpeg from building
with clang.
If someone else is interested in banging out the rest of the 3DNow!
instructions, it should be quite easy now.
llvm-svn: 115466
2010-10-03 18:08:05 +00:00
73eac2aadf
Major changes to Cortex-A9 itinerary.
...
1. Model dual issues as two FUs.
2. Model the pipelines correctly: two symmetric ALUs, the multiplier is a
dependent pipeline on ALU0.
The changes do not have much impact on codegen right now. But I plan to make
pre-RA scheduler multi-issue aware which should take good advantage of the
changes.
llvm-svn: 115457
2010-10-03 02:03:59 +00:00
f70b4e0c2e
Implement a very basic PIC case.
...
llvm-svn: 115454
2010-10-03 00:46:57 +00:00
3c70417883
Cleanup. Get rid of extraneous variable.
...
llvm-svn: 115453
2010-10-03 00:46:06 +00:00
ae1a9de083
stub out a header to put 3dNow! instructions into.
...
llvm-svn: 115429
2010-10-02 23:06:23 +00:00
4756bbeba0
fix a regression introduced in r115243, in which the instruction
...
backing int_x86_ssse3_pshuf_w got removed. This caused PR8280.
llvm-svn: 115422
2010-10-02 21:32:15 +00:00
4088ceaf28
Stop using LiveRange in MachineVerifier.
...
llvm-svn: 115408
2010-10-02 05:24:46 +00:00
c57c220d20
Fix a miscompile in 186.crafty for Thumb2 that was exposed by Evan's
...
scheduling change in svn 115121. The CriticalAntiDepBreaker had bad
liveness information. It was calculating the KillIndices for one scheduling
region in a basic block, rescheduling that region so the KillIndices were
no longer valid, and then using those wrong KillIndices to make decisions
for the next scheduling region. I've not been able to reduce a small
testcase for this. Radar 8502534.
llvm-svn: 115400
2010-10-02 01:49:29 +00:00
306084e9b7
Wind these directories back too. File adds and removes are properly represented
...
in patches. :-(
llvm-svn: 115396
2010-10-02 01:16:59 +00:00
0aee161c69
Continue reverting r115363.
...
llvm-svn: 115395
2010-10-02 01:08:17 +00:00
c18b735552
Revert patches r115363 r115367 r115391 due to build breakage:
...
llvm[2]: Updated LibDeps.txt because dependencies changed
llvm[2]: Checking for cyclic dependencies between LLVM libraries.
find-cycles.pl: Circular dependency between *.a files:
find-cycles.pl: libLLVMMSP430AsmPrinter.a libLLVMMSP430CodeGen.a
llvm-svn: 115393
2010-10-02 01:06:42 +00:00
aaf9c32d9f
Update CMake files for recent AsmPrinter->InstPrinter changes. Can someone who
...
is more familiar with CMake please review?
llvm-svn: 115391
2010-10-02 00:39:56 +00:00
7787f79f21
Start on lowering global addresses.
...
llvm-svn: 115390
2010-10-02 00:32:44 +00:00
a8d176866d
This adds a Darwin x86_64 relocation encoding for a subtraction expression
...
where both symbols are "local", that is non-external symbols, and there is
no "base" for the symbols used in the expression, that is the section has
no non-temporary symbols. This case looks like this:
% cat local_reloc_A-B.s
.long 0
LB: .long 1
.long LA - LB - 4
.long 2
LA: .long 3
which llvm-mc will not encode without this patch, generates a "unsupported
local relocations in difference" error, but the Darwin assembler will
encode with relocation entries like this:
% otool -rv a.out l.out
a.out:
Relocation information (__TEXT,__text) 2 entries
address pcrel length extern type scattered symbolnum/value
00000008 False long False SUB False 1 (__TEXT,__text)
00000008 False long False UNSIGND False 1 (__TEXT,__text)
which is very similar to what is encoded when the symbols don't have the
leading 'L' and they are not temporary symbols. Which llvm-mc and the
Darwin assembler will encoded like this:
Relocation information (__TEXT,__text) 2 entries
address pcrel length extern type scattered symbolnum/value
00000008 False long True SUB False B
00000008 False long True UNSIGND False A
This is the missing relocation encoding needed to allow the Mach-O x86
Dwarf file and line table to be emitted. So this patch also removes the
TODO from the if() statement in MCMachOStreamer::Finish() that didn't
call MCDwarfFileTable::Emit() for 64-bit targets.
llvm-svn: 115389
2010-10-02 00:13:41 +00:00
bfea05afd6
Drop the use of LiveInterval::iterator and the LiveRange class in
...
RemoveCopyByCommutingDef.
llvm-svn: 115386
2010-10-01 23:52:27 +00:00
28792c4a3d
When RemoveCopyByCommutingDef is creating additional identity copies, just use
...
LiveInterval::MergeValueNumberInto instead of trying to extend LiveRanges and
getting it wrong.
This fixed PR8249 where a valno with a multi-segment live range was defined by
an identity copy created by RemoveCopyByCommutingDef. Some of the live
segments disappeared.
llvm-svn: 115385
2010-10-01 23:52:25 +00:00
8fd5b3c071
Pretty up the debug output during RemoveCopyByCommutingDef.
...
llvm-svn: 115384
2010-10-01 23:52:22 +00:00
e1c714647c
Add support to let FE mark explict methods as explict in debug info.
...
llvm-svn: 115378
2010-10-01 23:31:40 +00:00
0091535361
Nuke trailing whitespace.
...
llvm-svn: 115377
2010-10-01 23:29:12 +00:00
ff1751c0a6
PrintSpecial() can go away now.
...
llvm-svn: 115376
2010-10-01 23:27:48 +00:00
83a5ec8fe0
Stub out constant GV handling, fixes C++ eh tests.
...
llvm-svn: 115375
2010-10-01 23:24:42 +00:00
fae8305e2b
Nuke the rest of the :comment references
...
llvm-svn: 115373
2010-10-01 23:21:38 +00:00
c13194254b
Nuke a bunch of no-longer-needed comment-only asm strings.
...
llvm-svn: 115370
2010-10-01 23:09:33 +00:00
111c550dea
Now that the asmprinter itself isn't in the subdir, rename 'AsmPrinter' to
...
'InstPrinter' to fall into line with the other MC-ized assembly printer
using targets.
llvm-svn: 115367
2010-10-01 22:57:18 +00:00
a317815463
Fix r115332: correctly model AGU / NEON mux.
...
llvm-svn: 115365
2010-10-01 22:52:29 +00:00
f31f33ea89
Thread the determination of branch prediction hit rates back through the if-conversion heuristic APIs. For now,
...
stick with a constant estimate of 90% (branch predictors are good!), but we might find that we want to provide
more nuanced estimates in the future.
llvm-svn: 115364
2010-10-01 22:45:50 +00:00
517abb44a2
Move the asmprinter and MC lowering out of the AsmPrinter (soon to be
...
InstPrinter) subdir
llvm-svn: 115363
2010-10-01 22:45:38 +00:00
0e854f3d43
Rename the AsmPrinter directory to InstPrinter for those targets that have
...
been MC-ized for assembly printing. MSP430 is mostly so, but still has the
asm printer and lowering code in the printer subdir for the moment.
llvm-svn: 115360
2010-10-01 22:39:28 +00:00
1969887fc6
Fix scheduling infor for vmovn and vshrn which I broke accidentially.
...
llvm-svn: 115354
2010-10-01 21:48:06 +00:00
f3179567de
Add operand cycles for vldr / vstr.
...
llvm-svn: 115353
2010-10-01 21:40:30 +00:00
9d0136274b
Direct calls only for arm fast isel for now.
...
llvm-svn: 115350
2010-10-01 21:33:12 +00:00
2a5d764858
NEON scheduling info fix. vmov reg, reg are single cycle instructions.
...
llvm-svn: 115344
2010-10-01 20:50:58 +00:00
6080da7a79
Fix thinko on store instructions. Fixes test_indvars failure.
...
llvm-svn: 115342
2010-10-01 20:46:04 +00:00
2ecba4a07e
Make the spelling of the flags for old-style if-conversion heuristics consistent between ARM and Thumb2.
...
llvm-svn: 115341
2010-10-01 20:33:47 +00:00
671d57865e
Provide an option to restore old-style if-conversion heuristics for Thumb2.
...
llvm-svn: 115339
2010-10-01 20:28:06 +00:00
13a642da0b
Now that the profitable bits of EnableFullLoadPRE have been enabled by default, rip out the remainder.
...
Anyone interested in more general PRE would be better served by implementing it separately, to get real
anticipation calculation, etc.
llvm-svn: 115337
2010-10-01 20:02:55 +00:00
89e6f6759f
Per Cortex-A9 pipeline diagram. AGU (core load / store issue) and NEON/FP issue are multiplexed. Model it correctly.
...
llvm-svn: 115332
2010-10-01 19:41:46 +00:00
d3fe5fa5d1
Fix code gen crash reported in PR 8235. We still lose debug info for the unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case.
...
llvm-svn: 115323
2010-10-01 19:00:44 +00:00
05ed521a88
grammar
...
llvm-svn: 115314
2010-10-01 14:57:48 +00:00
14e909a942
Delete token *after* reading from it.
...
llvm-svn: 115311
2010-10-01 12:25:27 +00:00
47a3b8c30b
typo
...
llvm-svn: 115310
2010-10-01 10:32:19 +00:00
56f7cd255b
Zap some redundant 'ori $?, $?, 0' from SPU.
...
Also remove some code that died in the process.
One now non-existant ori is checked for.
llvm-svn: 115306
2010-10-01 09:20:01 +00:00
3ad2f3a2f2
Fix the other half of the alignment changing issue by making sure that the
...
memcpy alignment is the minimum of the incoming alignments.
Fixes PR 8266.
llvm-svn: 115305
2010-10-01 09:02:05 +00:00
f08bfdc29f
fix typo
...
llvm-svn: 115300
2010-10-01 06:54:02 +00:00
c663a67384
fix PR8267 - Instcombine shouldn't optimizer away volatile memcpy's.
...
llvm-svn: 115296
2010-10-01 05:51:02 +00:00
a205055857
fix rdar://8494845 + PR8244 - a miscompile exposed by my patch in r101350
...
llvm-svn: 115294
2010-10-01 05:36:09 +00:00
dec83c3fd9
Attempt to outwit overly smart compiler.
...
llvm-svn: 115251
2010-10-01 00:21:24 +00:00
c1e209d40e
Implement double return values in calls. Fixes
...
SingleSource/Regression/C/casts.c.
llvm-svn: 115246
2010-10-01 00:00:11 +00:00
dd224d2333
Massive rewrite of MMX:
...
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.
Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics.
MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces. Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.
The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.
llvm-svn: 115243
2010-09-30 23:57:10 +00:00
31158b583a
Add an explicit initialization to work around what appears to be a valgrind
...
false positive, at least on Darwin. I haven't filed this, but you can feel free.
llvm-svn: 115242
2010-09-30 23:56:49 +00:00
b9b63ee031
Temporarily add a flag to make it easier to compare the new-style ARM if
...
conversion heuristics to the old-style ones.
llvm-svn: 115239
2010-09-30 23:48:38 +00:00
c6e13f7383
Clean up asm writer usage for x86 and msp430 to flag that the writer should
...
use MC instructions in the printInstruction() method via the tablegen flag
for it rather than a #define prior to including the autogenerated bits.
llvm-svn: 115238
2010-09-30 23:40:25 +00:00
56094ff402
Movement and cleanup.
...
llvm-svn: 115225
2010-09-30 22:34:19 +00:00
912888fac9
Pacify a noisy compiler, and sink this variable declaration closer to its uses.
...
llvm-svn: 115206
2010-09-30 21:04:13 +00:00
3170a25a84
We do want to allow LoadPRE to perform LICM-like transformations: we already consider PHI nodes to be negligible for
...
code size (making this transform code size neutral), and it allows us to hoist values out of loops, which is always
a good thing.
llvm-svn: 115205
2010-09-30 20:53:04 +00:00
eb12f49fb7
Try again to disable critical edge splitting in CodeGenPrepare.
...
The bug that broke i386 linux has been fixed in r115191.
llvm-svn: 115204
2010-09-30 20:51:52 +00:00
78f8d4eaf0
Start of generalized call support for ARM fast isel.
...
llvm-svn: 115203
2010-09-30 20:49:44 +00:00
2e59f142cc
Allow llvm.gcroot to work with non-pointer allocas.
...
llvm-svn: 115198
2010-09-30 20:23:47 +00:00
f987d5ea1c
Factor some logic into ShouldRelocOnSymbol. This simplifies the code and
...
fixes some cases where we were producing relocations with at symbol that
should use a section instead.
llvm-svn: 115194
2010-09-30 20:18:35 +00:00
c8e2e9d830
Nuke a few more unused asm strings
...
llvm-svn: 115193
2010-09-30 19:53:58 +00:00
665aa6efcc
When isel is emitting instructions for an x86 target without CMOV, the CFG is
...
edited during emission.
If the basic block ends in a switch that gets lowered to a jump table, any
phis at the default edge were getting updated wrong. The jump table data
structure keeps a pointer to the header blocks that wasn't getting updated
after the MBB is split.
This bug was exposed on 32-bit Linux when disabling critical edge splitting in
codegen prepare.
The fix is to uipdate stale MBB pointers whenever a block is split during
emission.
llvm-svn: 115191
2010-09-30 19:44:31 +00:00
7e872969ce
Move getPointerSize() to the base class since it's not dependent on MachO
...
vs. ELF
llvm-svn: 115180
2010-09-30 17:45:51 +00:00
5a5ddc402e
Remove extraneous ';'
...
llvm-svn: 115176
2010-09-30 17:19:17 +00:00
73a7caee4b
preemptively add the rest of the non-n fpstack instructions.
...
llvm-svn: 115168
2010-09-30 17:11:29 +00:00
b9429179f9
The asm strings are never used at all, so just nuke 'em entirely.
...
llvm-svn: 115160
2010-09-30 16:56:53 +00:00
e46564a4a8
This is the last major patch to implement support for the .loc directive
...
and output the dwarf line number tables. This contains the code to emit and
encode the dwarf line tables from the previously gathered information in the
MCLineSection objects. This contains all the details to encode the line and
address deltas into the dwarf line table.
To do this an MCDwarfLineAddrFragment has been added.
Also this moves the interface code out of Mach-O streamer into
MCDwarf so it should be useable by other object file formats.
There is now one call to be made from an MCObjectStreamer
EmitInstruction() method:
MCLineEntry::Make(this, getCurrentSection());
to create a line entry after each instruction is assembled.
And one call call to be made from an MCObjectStreamer Finish() method:
MCDwarfFileTable::Emit(this, DwarfLineSection);
when getContext().hasDwarfFiles() is true and is passed a object file specific
MCSection where to emit the dwarf file and the line tables.
This appears to now be correct for 32-bit targets, at least x86. But the
relocation entries for 64-bit Darwin needs some further work which is next
up to work on. So for now the 64-bit Mach-O target does not output the
dwarf file and line tables.
llvm-svn: 115157
2010-09-30 16:52:03 +00:00
4373badcdf
implement support for finit, PR8258
...
llvm-svn: 115156
2010-09-30 16:42:53 +00:00
dce906c77f
Changes EvaluateAsAbsolute() to return the "current value" of the expression
...
if we are given a Layout object, even in cases when the value is not fixed.
This will be needed by the final patch for the dwarf .loc support to size a
new MCDwarf fragment needed to build and emit dwarf line number tables.
llvm-svn: 115155
2010-09-30 16:42:21 +00:00
adc0dbe470
add support for fstcw, PR8259
...
llvm-svn: 115154
2010-09-30 16:39:29 +00:00
bad267fa05
Adds getPointerSize() to the AsmBackend which will be needed by the final patch
...
for the dwarf .loc support to emit dwarf line number tables.
llvm-svn: 115153
2010-09-30 16:38:07 +00:00
90086abf2c
Grow BumpPtrAllocator's slab size dynamically if we allocated many slabs. This
...
reduces the amount of malloc calls and may reduce memory overhead.
Some numbers:
ASTContext stats, clang -cc1 -disable-free -fsyntax-only Cocoa_h.m
without dynamic growth | with dynamic growth
Number of memory regions: 3158 | Number of memory regions: 432
Bytes used: 12333185 | Bytes used: 12333185
Bytes allocated: 12935168 | Bytes allocated: 12800000
Bytes wasted: 601983 (includes alignment, etc) | Bytes wasted: 466815 (includes alignment, etc)
ASTContext stats, clang -cc1 -disable-free -fsyntax-only on clang's ASTReader.cpp
without dynamic growth | with dynamic growth
Number of memory regions: 10987 | Number of memory regions: 551
Bytes used: 42910356 | Bytes used: 42910356
Bytes allocated: 45002752 | Bytes allocated: 44711936
Bytes wasted: 2092396
2010-09-30 16:18:28 +00:00
136ed51b08
80 column fix
...
llvm-svn: 115149
2010-09-30 15:25:22 +00:00
6c233c141e
Fix two tiny issues (ARM does not need COFF) and comment sanity.
...
llvm-svn: 115147
2010-09-30 14:58:19 +00:00
5d66e5feb8
Tighten up prototype verification of strchr and strrchr to avoid a crash in the very unlikely case that someone passes an integer > i64 to strchr.
...
llvm-svn: 115144
2010-09-30 11:21:59 +00:00
f44d350614
Silence a GCC warning about not handling all flags in this switch, we
...
specifically assert on unexpected flags.
llvm-svn: 115143
2010-09-30 10:59:51 +00:00
efbdbe5565
Move logic of determining ELF entsize from the .s printer to initialization
...
time. That way, the EntrySize field is initialized for other code paths,
namely, the .ll -> .o code path.
llvm-svn: 115141
2010-09-30 05:59:22 +00:00
689651c767
trailing whitespace
...
llvm-svn: 115136
2010-09-30 03:21:00 +00:00
58bce99385
Remove misplaced ';'. Make buildbots happy, hopefully.
...
llvm-svn: 115135
2010-09-30 03:20:34 +00:00
70d6e0e0ff
Correctly produce R_X86_64_32 or R_X86_64_32S.
...
With this patch in
movq $foo, foo(%rip)
foo:
.long foo
We produce a R_X86_64_32S for the first relocation and R_X86_64_32 for the
second one.
llvm-svn: 115134
2010-09-30 03:11:42 +00:00
645f6c2bef
Tiny patch for proof-of-concept cleanup of ARMAsmPrinter::EmitStartOfAsmFile()
...
Small test for sanity check of resulting ARM .s file.
Tested against -r115129.
llvm-svn: 115133
2010-09-30 02:45:56 +00:00
b96b2d8e4d
Have ELFAsmParser.cpp use the already parsed "Size" (entry size) when
...
constructing a section. Test for a few cases also included.
llvm-svn: 115132
2010-09-30 02:41:46 +00:00
2ebaee9c75
Make it possible for the MCObjectWriter to decide if a given fixup is fully
...
resolved or not. Different object files have different restrictions and
different native assemblers have different idiosyncrasies we want to emulate
for now.
Move the existing MachO logic to the new place and implement an ELF one that
gets fixups to globals right.
llvm-svn: 115131
2010-09-30 02:22:20 +00:00
4a9cb8f10e
Go ahead and jump!
...
Now that the MC lowering handles the expansion of the pseudos, kill the horrible
blobs of text.
llvm-svn: 115130
2010-09-30 02:18:06 +00:00
b32124545b
I added a new file ARMAsmBackend which stubs out in similar ways to
...
the eqv X86 class.
For now, I split the ELFARMAsmBackend from the DarwinARMAsmBackend
(also mimicking X86)
Tested against -r115126
llvm-svn: 115129
2010-09-30 02:17:26 +00:00
2ff7de0264
Now that the pseudos that needed this are all custom lowered, we can go back
...
to an empty PrintSpecial()
llvm-svn: 115128
2010-09-30 02:02:22 +00:00
080fdf4609
Nuke it from orbit. It's the only way to be sure.
...
(Kill the dead non-MC asm printer for the ARM target.)
llvm-svn: 115127
2010-09-30 01:57:53 +00:00
c768287968
Test commit - Deleted some whitespace at the end of a line.
...
llvm-svn: 115122
2010-09-30 01:09:20 +00:00
2fb20b1d37
ARM instruction itinerary fixes:
...
1. Cortex-a9 8-bit and 16-bit loads / stores AGU cycles are 1 cycle longer than 32-bit ones.
2. Cortex-a9 is out-of-order so model all read cycles as cycle 1.
3. Lots of other random fixes for A8 and A9.
llvm-svn: 115121
2010-09-30 01:08:25 +00:00
2b76c66fd6
Add constant folding for strspn and strcspn to SimplifyLibCalls.
...
llvm-svn: 115116
2010-09-30 00:58:35 +00:00
083f368be1
Revert r114320(move file = copy + delete on Win32). r115040 is a better solution for the Win32 ACCESS_DENIED lit error.
...
llvm-svn: 115114
2010-09-30 00:44:58 +00:00
38d22f69fc
Add strpbrk folding to SimplifyLibCalls.
...
llvm-svn: 115111
2010-09-29 23:52:12 +00:00
83e471180c
Silence compiler warning.
...
llvm-svn: 115107
2010-09-29 23:32:20 +00:00
7939806ecc
Refactor arm fast isel libcall handling so that pieces can be used
...
for generic call handling.
llvm-svn: 115105
2010-09-29 23:11:09 +00:00
bea08d1c85
Let FE mark a variable as artificial variable.
...
llvm-svn: 115102
2010-09-29 23:07:21 +00:00
0574cc556a
Noticed by inspection when looking for other cmov bits.
...
llvm-svn: 115100
2010-09-29 23:00:29 +00:00
4a010fd1ea
Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMP
...
pipeline forwarding path.
llvm-svn: 115098
2010-09-29 22:42:35 +00:00
2016f0eaac
Silence msvc warnings.
...
llvm-svn: 115097
2010-09-29 22:38:50 +00:00
8e861d7eee
Simplify the loop in StrChrOptimizer. FileCheckize test.
...
llvm-svn: 115095
2010-09-29 22:29:12 +00:00
b024be3162
Add a convenience variable so I'm not chasing all over looking for
...
a context.
llvm-svn: 115094
2010-09-29 22:24:45 +00:00
824645abc9
Teach SimplifyLibCalls how to optimize strrchr.
...
llvm-svn: 115091
2010-09-29 21:50:51 +00:00
cb03b14089
Add support to let FE encode method access specifier.
...
llvm-svn: 115089
2010-09-29 21:44:16 +00:00
95ae73c394
Generalize DISubprogram element to encode various flags instead of just one boolean for isArtificial.
...
This is a backword compatible change.
llvm-svn: 115084
2010-09-29 21:04:46 +00:00
0cd522428c
UnreachableBlockElim could incorrectly return false when it had not modified the CFG, but HAD modified some PHI nodes. Fixes PR8174.
...
llvm-svn: 115083
2010-09-29 20:57:19 +00:00
99c985c37d
Fix PR8247: JumpThreading can cause a block to become unreachable while still having predecessor, if it is part of a self-loop.
...
Because of this, we cannot use the Simplify* APIs, as they can assert-fail on unreachable code. Since it's not easy to determine
if a given threading will cause a block to become unreachable, simply defer simplifying simplification to later InstCombine and/or
DCE passes.
llvm-svn: 115082
2010-09-29 20:34:41 +00:00
923a8cf356
Remove PointerTracking from cmakelists …
...
llvm-svn: 115076
2010-09-29 19:39:50 +00:00
a1bd5a1fad
Assign DW_ACCESS_public accessibility attribute to members by default.
...
llvm-svn: 115067
2010-09-29 19:08:08 +00:00
0860520527
Add specializations of addrmode2 that allow differentiating those forms
...
which require the use of the shifter-operand. This will be used to split
the ldr/str instructions such that those versions needing the shifter operand
can get a different scheduling itenerary, as in some cases, the use of the
shifter can cause different scheduling than the simpler forms.
llvm-svn: 115066
2010-09-29 19:03:54 +00:00
23ebf4b319
Add parens to fix GCC warning:
...
lib/Target/X86/X86MCCodeEmitter.cpp: 190: error: suggest parentheses around '&&' within '||'
llvm-svn: 115064
2010-09-29 18:56:57 +00:00
af995f0ee5
remove PointerTracking from mainline, Edwin is going to move it out to ClamAV
...
for LLVM 2.9
llvm-svn: 115062
2010-09-29 18:43:27 +00:00
2b43c1cf42
implement rdar://8491845 - Gas supports commuted forms of non-commutable instructions.
...
llvm-svn: 115061
2010-09-29 18:39:16 +00:00
d67ca0ed4c
Revert r114919, which caused some serious regressions on ARM.
...
llvm-svn: 115053
2010-09-29 18:05:19 +00:00
97bf273870
Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits.
...
LDM/STM instructions can run one cycle faster on some ARM processors if the
memory address is 64-bit aligned. Radar 8489376.
llvm-svn: 115047
2010-09-29 17:54:10 +00:00
c7b10f3745
Add braces for legibility.
...
llvm-svn: 115043
2010-09-29 17:32:29 +00:00
05eccf0e44
One Printer to rule them all, One Printer to find them,
...
One Printer to lower them all and in the back end bind them.
(Remove option to use the old non-MC asm printer.)
llvm-svn: 115038
2010-09-29 15:23:40 +00:00
53f0bf194a
Move "local commons" to the end of .bss to match the gnu as behavior.
...
llvm-svn: 115037
2010-09-29 14:52:01 +00:00
d36e3e8850
improve heuristics to find the 'and' corresponding to 'tst' to also catch opportunities on thumb2
...
added some doxygen on the way
llvm-svn: 115033
2010-09-29 10:12:08 +00:00
8f7851d2b4
fix rdar://8490728 - llvm-mc rejects gpr64 form of 'movmskpd'
...
llvm-svn: 115029
2010-09-29 05:05:03 +00:00
52e6020883
add assembler support for the cvtsd2sil/cvtsd2siq mnemonics, rdar://8456382
...
llvm-svn: 115027
2010-09-29 04:55:40 +00:00
5da7f9fcfd
make the x86 mccode emitter emit the 0x67 and 0x66 prefix bytes in the same
...
order as cctools for diffability.
llvm-svn: 115022
2010-09-29 03:43:43 +00:00
a4e1c74947
implement support for 32-bit address operands in 64-bit mode, which
...
are defined to emit the 0x67 prefix byte. rdar://8482675
llvm-svn: 115021
2010-09-29 03:33:25 +00:00
86a6222469
MC-COFF: Fix symbol storage class for globals
...
llvm-svn: 115020
2010-09-29 03:13:41 +00:00
f60062fd55
add basic avx support to the disassembler, also teach it about ssmem/sdmem
...
operands.
With this done, we can remove the _Int suffixes from the round instructions
without the disassembler blowing up. This allows the assembler to support
them, implementing rdar://8456376 - llvm-mc rejects 'roundss'
llvm-svn: 115019
2010-09-29 02:57:56 +00:00
ff3a3930a0
add asmparser support for cvttpd2dq by removing some Int_ prefixes.
...
Clean up cvttps2dq by removing some redundant implementations of the
same instruction. rdar://8456382
llvm-svn: 115018
2010-09-29 02:36:32 +00:00
ef1c2fc305
implement rdar://8456382 - cvtsd2si support, by removing some Int_ prefixes.
...
llvm-svn: 115017
2010-09-29 02:24:57 +00:00
a63292a3ca
implement rdar://8456378 and PR7557 - support for the fstsw,
...
an instruction that requires a WHOLE NEW wonderful kind of alias.
llvm-svn: 115015
2010-09-29 01:50:45 +00:00
b44fd24fc1
change the protocol TargetAsmPArser::MatchInstruction method to take an
...
MCStreamer to emit into instead of an MCInst to fill in. This allows the
matcher extra flexibility and is more convenient.
llvm-svn: 115014
2010-09-29 01:42:58 +00:00
3a7e8cd6bd
Rework comparison handling to set a register on true/false. This avoids
...
problems with phi-nodes in blocks that have hard and not virtual registers.
Accordingly update branch handling to compensate.
llvm-svn: 115013
2010-09-29 01:14:47 +00:00
edd4b600f3
Remove unnecessary set ahead of time.
...
llvm-svn: 115011
2010-09-29 00:50:57 +00:00
2259d67a33
Separate itinerary classes for mvn from mov; for tst / teq from cmp / cmn.
...
llvm-svn: 115010
2010-09-29 00:49:25 +00:00
2c8e7f421c
Remove assert, add comment.
...
llvm-svn: 115009
2010-09-29 00:49:09 +00:00
c35d7bbe43
Assign bitwise binary instructions different itinerary classes from ALU instructions such as add / sub.
...
llvm-svn: 115008
2010-09-29 00:27:46 +00:00
0097dd0d5a
Add support to model pipeline bypass / forwarding.
...
llvm-svn: 115005
2010-09-28 23:50:49 +00:00
b0b2c57149
Revert r114997. It was causing a failure on darwin10-selfhost.
...
llvm-svn: 115002
2010-09-28 23:11:55 +00:00
a86a6d2fed
32-bit constant ints only for now.
...
llvm-svn: 115001
2010-09-28 22:47:54 +00:00
b4b12535e8
Removed a bunch of unnecessary target_link_libraries.
...
llvm-svn: 114999
2010-09-28 22:39:14 +00:00
d848beb1e5
Fix a FIXME. _foo.eh symbols are currently always exported so that the linker
...
knows about them. This is not necessary on 10.6 and later.
llvm-svn: 114997
2010-09-28 22:36:56 +00:00
25a7bc9081
When an MDNode changes to become identical to another MDNode,
...
delete the MDNode that changed, rather than the other MDNode.
This is less work, because it doesn't require the changed node
to be re-inserted into the uniquing map and it doesn't require
the is-function-local flag to be recomputed. Also, it avoids
trouble when the existing node is part of a complicated
data structure.
llvm-svn: 114996
2010-09-28 22:07:19 +00:00
a3181e2d79
Add a subtarget hook for reporting the misprediction penalty. Use this to provide more precise
...
cost modeling for if-conversion. Now if only we had a way to estimate the misprediction probability.
Adjsut CodeGen/ARM/ifcvt10.ll. The pipeline on Cortex-A8 is long enough that it is still profitable
to predicate an ldm, but the shorter pipeline on Cortex-A9 makes it unprofitable.
llvm-svn: 114995
2010-09-28 21:57:50 +00:00
953b1afd5f
Integer materialization needed the same thinko change.
...
llvm-svn: 114994
2010-09-28 21:55:34 +00:00
7d483d352b
Resolve this GCC warning:
...
ARMTargetMachine.cpp:53: error: control reaches end of non-void function
llvm-svn: 114992
2010-09-28 21:40:26 +00:00
81bdc93bbb
User proper libcall names & condcodes while compiling for ARM EABI.
...
Patch by Evzen Muller!
llvm-svn: 114991
2010-09-28 21:39:26 +00:00
1a450c61f3
Scope a varible inside an if statement, to make it clear that
...
it's not used afterwards.
llvm-svn: 114986
2010-09-28 21:02:55 +00:00
1b35f4cc66
Give the if-converter access to MachineLoopInfo, and use it to generate plausible branch prediction
...
estimates.
llvm-svn: 114981
2010-09-28 20:42:15 +00:00
a349ed0693
Fix spelling.
...
llvm-svn: 114974
2010-09-28 18:54:43 +00:00
88af7d00fc
Part one of switching to using a more sane heuristic for determining if-conversion profitability.
...
Rather than having arbitrary cutoffs, actually try to cost model the conversion.
For now, the constants are tuned to more or less match our existing behavior, but these will be
changed to reflect realistic values as this work proceeds.
llvm-svn: 114973
2010-09-28 18:32:13 +00:00
5154ee0bca
Make ConstantRange::makeICmpRegion handle all the edge cases properly. This
...
also fixes PR8250.
llvm-svn: 114972
2010-09-28 18:18:36 +00:00
7a55481fa4
Provide an interface to let FEs anchor debug info for types.
...
llvm-svn: 114969
2010-09-28 18:08:20 +00:00
45c83d496f
Factor out dbg_value comment printing and teach MC asm printing to use it.
...
This should make the arm-linux self-host buildbot happy again.
llvm-svn: 114964
2010-09-28 17:05:56 +00:00
01d20a76fe
On elf, undefined symbols can start with .L.
...
llvm-svn: 114958
2010-09-28 16:19:11 +00:00
cd43c696c9
Use the canonical library name for library PIC16Passes.
...
llvm-svn: 114953
2010-09-28 14:24:47 +00:00
0fcb8c688d
Added library LLVMPIC16passes to CMake build.
...
llvm-svn: 114952
2010-09-28 14:02:45 +00:00
3da4255d07
Add ARM Disassembler to the CMake build.
...
llvm-svn: 114949
2010-09-28 11:48:19 +00:00
e084cff9aa
Remove trailing spaces of MipsMachineFunction.h
...
llvm-svn: 114948
2010-09-28 10:06:53 +00:00
bb033893ca
Remove trailing spaces of MipsTargetObjectFile.cpp
...
llvm-svn: 114947
2010-09-28 09:55:24 +00:00
bf86fd3c47
80-col fixups.
...
llvm-svn: 114943
2010-09-28 04:18:29 +00:00
3dc97324c1
Add a command line option "-arm-strict-align" to disallow unaligned memory
...
accesses for ARM targets that would otherwise allow it. Radar 8465431.
llvm-svn: 114941
2010-09-28 04:09:35 +00:00
7990df1ae2
Rework builtin handling and call setup. The builtin handling
...
now takes a libcall operand, sets up the arguments correctly and
handles stack adjustments.
llvm-svn: 114934
2010-09-28 01:21:42 +00:00
e68635acdb
Fix typo.
...
llvm-svn: 114931
2010-09-28 00:35:33 +00:00
6f98bfd870
Fix fp constant loads to have a destination register.
...
llvm-svn: 114930
2010-09-28 00:35:09 +00:00
185051cb8e
Remove dead argument.
...
llvm-svn: 114920
2010-09-27 23:15:27 +00:00
9c93fd5598
Weight loop unrolling counts by nesting depth. Unrolling deeply nested loops tends to cause high
...
register pressure and thus excess spills, which we don't currently recover from well. This should
be re-evaluated in the future if our ability to generate good spills/splits improves.
Partial fix for <rdar://problem/7635585>.
llvm-svn: 114919
2010-09-27 22:58:54 +00:00
175d6411c8
Enable the MC-ized ARM asm printer. Passing all local tests, so it's time to
...
enable it for real. Leaving the CL option in place to it's easy to disable it
again if (when) testers find something I've missed.
llvm-svn: 114915
2010-09-27 22:28:11 +00:00
96bfb50c03
Write relocations in the end of the file. This matches what gas does and
...
makes files easier to diff.
llvm-svn: 114898
2010-09-27 22:04:54 +00:00
9e9ed98305
ARM-mode eh.sjlj.longjmp MC lowering
...
llvm-svn: 114896
2010-09-27 21:47:04 +00:00
9ca41113f6
Make sure .text doesn't produce extra alignment.
...
llvm-svn: 114895
2010-09-27 21:40:27 +00:00
1083573796
Don't try to constant fold libm functions with non-finite arguments.
...
Usually we wouldn't do this anyway because llvm_fenv_testexcept would return an
exception, but we have seen some cases where neither errno nor fenv detect an
exception on arm-linux.
llvm-svn: 114893
2010-09-27 21:29:20 +00:00
11fed543c9
Enable the MC-ized ARM asm printer. Passing all local tests, so it's time to
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enable it for real. Leaving the CL option in place to it's easy to disable it
again if (when) testers find something I've missed.
llvm-svn: 114892
2010-09-27 21:28:44 +00:00
9735f4ff8d
Factor symbol value computation into a function.
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llvm-svn: 114891
2010-09-27 21:23:02 +00:00
ce2e535b19
MC-COFF: Fix signed/unsigned comparison.
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llvm-svn: 114888
2010-09-27 21:17:39 +00:00
Dan Gohman