Commit Graph

8 Commits

Author SHA1 Message Date
Dan Gohman ea88910dbf Add a target triple so that this test behaves consistently across hosts.
llvm-svn: 85640
2009-10-31 00:15:28 +00:00
Dan Gohman 49fa51d936 Fix MachineLICM to use the correct virtual register class when
unfolding loads for hoisting.  getOpcodeAfterMemoryUnfold returns the
opcode of the original operation without the load, not the load
itself, MachineLICM needs to know the operand index in order to get
the correct register class. Extend getOpcodeAfterMemoryUnfold to
return this information.

llvm-svn: 85622
2009-10-30 22:18:41 +00:00
Dan Gohman 1b44f10ff4 Teach MachineLICM to unfold loads from constant memory from
otherwise unhoistable instructions in order to allow the loads
to be hoisted.

llvm-svn: 85364
2009-10-28 03:21:57 +00:00
Dan Gohman 4b46cbfc23 Mark dead physregdefs dead immediately. This helps MachineSink and
MachineLICM and other things which run before LiveVariables is run.

llvm-svn: 85360
2009-10-28 01:13:53 +00:00
Evan Cheng c436631a9c Turn on post-alloc scheduling for x86.
llvm-svn: 84431
2009-10-18 19:57:27 +00:00
Dan Gohman 46945e38ea Add a CHECK line to check the position of the second divsd.
llvm-svn: 83009
2009-09-28 20:48:39 +00:00
Evan Cheng e0c5313493 Coalescer should not delete extract_subreg, insert_subreg, and subreg_to_reg of
physical registers. This is especially critical for the later two since they
start the live interval of a super-register. e.g.
%DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1
If this instruction is eliminated, the register scavenger will not be happy as
D0 is not defined previously.
This fixes PR5055.

llvm-svn: 82968
2009-09-28 05:28:43 +00:00
Dan Gohman e30d63f1d8 Unbreak MachineLICM for instructions that reference RIP on x86-64 too.
llvm-svn: 82825
2009-09-25 23:58:45 +00:00