maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
258,396 Commits 23 Branches 0 Tags 2.2 GiB
Commit Graph

1 Commits

Author SHA1 Message Date
Stepan Dyatkovskiy 6207a4dadc PR19320: 
The trouble as in ARMAsmParser, in ParseInstruction method. It assumes that ARM::R12 + 1 == ARM::SP.
It is wrong, since ARM::<Register> codes are generated by tablegen and actually could be any random numbers.

llvm-svn: 205524
 2014-04-03 11:29:15 +00:00