Commit Graph

2904 Commits

Author SHA1 Message Date
Rahul Joshi 52af9c59e3 [MLIR] Add a NoRegionArguments trait
- This trait will verify that all regions attached to an Op have no arguments
- Fixes https://bugs.llvm.org/show_bug.cgi?id=46521 : Add trait NoRegionArguments

Differential Revision: https://reviews.llvm.org/D83016
2020-07-06 09:05:38 -07:00
Nicolas Vasilache 05c65dc0fe [mlir][Vector] Add a VectorUnrollInterface and expose UnrollVectorPattern.
The UnrollVectorPattern is can be used in a programmable fashion by:
```
OwningRewritePatternList patterns;
    patterns.insert<UnrollVectorPattern<AddFOp>>(ArrayRef<int64_t>{2, 2}, ctx);
    patterns.insert<UnrollVectorPattern<vector::ContractionOp>>(
        ArrayRef<int64_t>{2, 2, 2}, ctx);
    ...
    applyPatternsAndFoldGreedily(getFunction(), patterns);
```

Differential revision: https://reviews.llvm.org/D83064
2020-07-06 08:09:06 -04:00
Mehdi Amini fbc06b2280 Revert "[MLIR] Parallelize affine.for op to 1-D affine.parallel op"
This reverts commit 5f2843857f.
This broke the build when -DDBUILD_SHARED_LIBS=ON is used.
2020-07-04 20:55:47 +00:00
Yash Jain 5f2843857f [MLIR] Parallelize affine.for op to 1-D affine.parallel op
Introduce pass to convert parallel affine.for op into 1-D
affine.parallel op. Run using --affine-parallelize. Removes
test-detect-parallel: pass for checking parallel affine.for ops.

Differential Revision: https://reviews.llvm.org/D82672
2020-07-04 19:09:23 +05:30
Ehsan Toosi 0f03b2bfda [mlir] Add redundant copy removal transform
This pass removes redundant dialect-independent Copy operations in different
situations like the following:

%from = ...
%to = ...
... (no user/alias for %to)
copy(%from, %to)
... (no user/alias for %from)
dealloc %from
use(%to)

Differential Revision: https://reviews.llvm.org/D82757
2020-07-03 15:36:25 +02:00
aartbik ee01c7a740 [mlir] [VectorOps] Add choice between dot and axpy lowering of vector.contract
Default vector.contract lowering essentially yields a series of sdot/ddot
operations. However, for some layouts a series of saxpy/daxpy operations,
chained through fma are more efficient. This CL introduces a choice between
the two lowering paths. A default heuristic is to follow.

Some preliminary avx2 performance numbers for matrix-times-vector.
Here, dot performs best for 64x64 A x b and saxpy for 64x64 A^T x b.

```
------------------------------------------------------------
            A x b                          A^T x b
------------------------------------------------------------
GFLOPS    sdot (reassoc)    saxpy    sdot (reassoc)    saxpy
------------------------------------------------------------
1x1        0.6               0.9       0.6             0.9
2x2        2.5               3.2       2.4             3.5
4x4        6.4               8.4       4.9             11.8
8x8       11.7               6.1       5.0             29.6
16x16     20.7              10.8       7.3             43.3
32x32     29.3               7.9       6.4             51.8
64x64     38.9                                         79.3
128x128   32.4                                         40.7
------------------------------------------------------------
```

Reviewed By: nicolasvasilache, ftynse

Differential Revision: https://reviews.llvm.org/D83012
2020-07-02 13:21:17 -07:00
Lei Zhang 08679af900 Revert "[MLIR][SPIRV] Support two memory access attributes in OpCopyMemory."
This reverts commit ef2f46e1f6, which
likely triggers a compiler internal error for MSVC.

Differential Revision: https://reviews.llvm.org/D83075
2020-07-02 15:57:25 -04:00
ergawy ef2f46e1f6 [MLIR][SPIRV] Support two memory access attributes in OpCopyMemory.
This commit augments spv.CopyMemory's implementation to support 2 memory
access operands. Hence, more closely following the spec. The following
changes are introduces:

- Customize logic for spv.CopyMemory serialization and deserialization.
- Add 2 additional attributes for source memory access operand.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82710
2020-07-02 13:17:22 -04:00
Arjun P 10a898b3ec [MLIR] Exact integer emptiness checks for FlatAffineConstraints
This patch adds the capability to perform exact integer emptiness checks for FlatAffineConstraints using the General Basis Reduction algorithm (GBR). Previously, only a heuristic was available for emptiness checks, which was not guaranteed to always give a conclusive result.

This patch adds a `Simplex` class, which can be constructed using a `FlatAffineConstraints`, and can find an integer sample point (if one exists) using the GBR algorithm. Additionally, it adds two classes `Matrix` and `Fraction`, which are used by `Simplex`.

The integer emptiness check functionality can be accessed through the new `FlatAffineConstraints::isIntegerEmpty()` function, which runs the existing heuristic first and, if that proves to be inconclusive, runs the GBR algorithm to produce a conclusive result.

Differential Revision: https://reviews.llvm.org/D80860
2020-07-02 19:53:27 +05:30
Thomas Raoux 0670f855a7 [mlir][spirv] Add support for lowering scf.for scf/if with return value
This allow lowering to support scf.for and scf.if with results. As right now
spv region operations don't have return value the results are demoted to
Function memory. We create one allocation per result right before the region
and store the yield values in it. Then we can load back the value from
allocation to be able to use the results.

Differential Revision: https://reviews.llvm.org/D82246
2020-07-01 17:08:08 -07:00
Thomas Raoux fbce9855e9 [mlir][NFC] Move conversion of scf to spir-v ops in their own file
Move patterns for scf to spir-v ops in their own file/folder.

Differential Revision: https://reviews.llvm.org/D82914
2020-07-01 17:06:50 -07:00
Nicolas Vasilache 7d9518c800 [mlir][Linalg] Add an option to use Alloca instead of malloc/free pairs.
Summary: A relevant test is also added.

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82959
2020-07-01 09:44:01 -04:00
River Riddle f625f5231a [mlir] Remove the default template parameters from AttrBase and TypeBase.
MSVC 2017 doesn't support the case where a trailing variadic template list comes after template types with default parameters. Until we upgrade to VS 2019, we can't use the simplified definitions.
2020-06-30 21:55:32 -07:00
River Riddle 5d699d18b3 [mlir] Remove locking for dialect/operation registration.
Moving forward dialects should only be registered in a thread safe context. This matches the existing usage we have today, but it allows for removing quite a bit of expensive locking from the context.

This led to ~.5 a second compile time improvement when running one conversion pass on a very large .mlir file(hundreds of thousands of operations).

Differential Revision: https://reviews.llvm.org/D82595
2020-06-30 15:52:33 -07:00
River Riddle 2e2cdd0a52 [mlir] Refactor InterfaceGen to support generating interfaces for Attributes and Types.
This revision adds support to ODS for generating interfaces for attributes and types, in addition to operations. These interfaces can be specified using `AttrInterface` and `TypeInterface` in place of `OpInterface`. All of the features of `OpInterface` are supported except for the `verify` method, which does not have a matching representation in the Attribute/Type world. Generating these interface can be done using `gen-(attr|type)-interface-(defs|decls|docs)`.

Differential Revision: https://reviews.llvm.org/D81884
2020-06-30 15:52:33 -07:00
River Riddle 9fbb2de8e4 [mlir] Add support for defining Traits and Interfaces on Attributes/Types.
This revisions add mechanisms to Attribute/Type for attaching traits and interfaces. The mechanisms are modeled 1-1 after those for operations to keep the system consistent. AttrBase and TypeBase now accepts a trailing list of `Trait` types that will be attached to the object. These traits should inherit from AttributeTrait::TraitBase and TypeTrait::TraitBase respectively as necessary. A followup commit will refactor the interface gen mechanisms in ODS to support Attribute/Type interface generation and add tests for the mechanisms.

Differential Revision: https://reviews.llvm.org/D81883
2020-06-30 15:52:32 -07:00
Jacques Pienaar 71b9d89df7 [ods] Update Operator to record Arg->[Attr|Operand]Index mapping
Also fixed bug in type inferface generator to address bug where operands and
attributes are interleaved.

Differential Revision: https://reviews.llvm.org/D82819
2020-06-29 16:40:52 -07:00
Rahul Joshi ee394e6842 [MLIR] Add variadic isa<> for Type, Value, and Attribute
- Also adopt variadic llvm::isa<> in more places.
- Fixes https://bugs.llvm.org/show_bug.cgi?id=46445

Differential Revision: https://reviews.llvm.org/D82769
2020-06-29 15:04:48 -07:00
Adam D Straw 25055a4fb9 [mlir] add unsigned comparison builders to Affine EDSC
Current Affine comparison builders, which use operator overload, default to signed comparison.  This creates the possibility of misuse of these builders and potential correctness issues when dealing with unsigned integers.  This change makes the distinction between signed and unsigned comparison builders and forces the caller to make a choice between the two.

Differential Revision: https://reviews.llvm.org/D82323
2020-06-29 23:30:49 +02:00
Stephan Herhut 67ecd7e296 [mlir] Clean up NVVM intrinsics definitions a little.
Differential Revision: https://reviews.llvm.org/D82750
2020-06-29 16:32:17 +02:00
Tobias Gysi 10643c9ad8 [mlir] make the bitwidth of device side index computations configurable (reland)
Summary:
The patch makes the index type lowering of the GPU to NVVM/ROCDL conversion configurable. It introduces a pass option that controls the bitwidth used when lowering index computations and uses the LowerToLLVMOptions structure to control the Standard to LLVM lowering.

This commit fixes a use-after-free bug introduced by the reverted commit d10b1a3. It implements the following changes:
- Added a getDefaultOptions method to the LowerToLLVMOptions struct that returns a reference to statically allocated default options.
- Use the getDefaultOptions method to provide default LowerToLLVMOptions (instead of an initializer list).
- Added comments to clarify the required lifetime of the LowerToLLVMOptions

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D82475
2020-06-29 12:22:39 +02:00
Alex Zinenko cba733edf5 [mlir] LLVM dialect: use addressof instead of constant to create function pointers
`llvm.mlir.constant` was originally introduced as an LLVM dialect counterpart
to `std.constant`. As such, it was supporting "function pointer" constants
derived from the symbol name. This is different from `std.constant` that allows
for creation of a "function" constant since MLIR, unlike LLVM IR, supports
this. Later, `llvm.mlir.addressof` was introduced as an Op that obtains a
constant pointer to a global in the LLVM dialect. It naturally extends to
functions (in LLVM IR, functions are globals) and should be used for defining
"function pointer" values instead.

Fixes PR46344.

Differential Revision: https://reviews.llvm.org/D82667
2020-06-29 12:21:33 +02:00
aartbik ceb1b327b5 [mlir] [VectorOps] Add the ability to mark FP reductions with "reassociate" attribute
Rationale:
In general, passing "fastmath" from MLIR to LLVM backend is not supported, and even just providing such a feature for experimentation is under debate. However, passing fine-grained fastmath related attributes on individual operations is generally accepted. This CL introduces an option to instruct the vector-to-llvm lowering phase to annotate floating-point reductions with the "reassociate" fastmath attribute, which allows the LLVM backend to use SIMD implementations for such constructs. Oher lowering passes can start using this mechanism right away in cases where reassociation is allowed.

Benefit:
For some microbenchmarks on x86-avx2, speedups over 20 were observed for longer vector (due to cleaner, spill-free and SIMD exploiting code).

Usage:
mlir-opt --convert-vector-to-llvm="reassociate-fp-reductions"

Reviewed By: ftynse, mehdi_amini

Differential Revision: https://reviews.llvm.org/D82624
2020-06-26 11:03:14 -07:00
Denis Khalikov a2004c344b [mlir][spirv] Add RewriteInserts pass.
Add a pass to rewrite sequential chains of `spirv::CompositeInsert`
operations into `spirv::CompositeConstruct` operations.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82198
2020-06-26 09:57:20 -04:00
ergawy d6485ed3a7 [MLIR][SPIRV] Add support for OpCopyMemory.
This patch add support for 'spv.CopyMemory'. The following changes are
introduced:
- 'CopyMemory' op is added to SPIRVOps.td.
- Custom parse and print methods are introduced.
- A few Roundtripping tests are added.

Differential Revision: https://reviews.llvm.org/D82384
2020-06-26 09:43:53 -04:00
Alex Zinenko 6323065fd6 [mlir] support returning unranked memrefs
Initially, unranked memref descriptors in the LLVM dialect were designed only
to be passed into functions. An assertion was guarding against returning
unranked memrefs from functions in the standard-to-LLVM conversion. This is
insufficient for functions that wish to return an unranked memref such that the
caller does not know the rank in advance, and hence cannot allocate the
descriptor and pass it in as an argument.

Introduce a calling convention for returning unranked memref descriptors as
follows. An unranked memref descriptor always points to a ranked memref
descriptor stored on stack of the current function. When an unranked memref
descriptor is returned from a function, the ranked memref descriptor it points
to is copied to dynamically allocated memory, the ownership of which is
transferred to the caller. The caller is responsible for deallocating the
dynamically allocated memory and for copying the pointed-to ranked memref
descriptor onto its stack.

Provide default lowerings for std.return, std.call and std.indirect_call that
maintain the conversion defined above.

This convention is additionally exercised by a runtime test to guard against
memory errors.

Differential Revision: https://reviews.llvm.org/D82647
2020-06-26 15:37:37 +02:00
Jean-Michel Gorius 05b4ff0a4b [mlir-tblgen] Use fully qualified names in generated code files
Using fully qualified names wherever possible avoids ambiguous class and function names. This is a follow-up to D82371.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D82471
2020-06-26 15:05:33 +02:00
Tobias Gysi 48f1d4fcd2 [mlir] parallel loop canonicalization
Summary:
The patch introduces a canonicalization pattern for parallel loops. The pattern removes single-iteration loop dimensions if the loop bounds and steps are constants.

Reviewers: herhut, ftynse

Reviewed By: herhut

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82191
2020-06-26 09:57:08 +02:00
Diego Caballero a72887831a [mlir][EDSC] Add divis and diviu and vector.extractelement
Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D82515
2020-06-25 08:11:30 -07:00
Frederik Gossen 66e0f66d8f [MLIR][Shape] Canonicalize subsequent `size_to_index` and `index_to_size`
Eliminate the subsequent applications of `size_to_index` and `index_to_size`.

Differential Revision: https://reviews.llvm.org/D82083
2020-06-25 12:43:17 +00:00
Frederik Gossen bf2a4f3b3a [MLIR][Shape] Canonicalize subsequent `index_to_size` and `size_to_index`
Eliminate the subsequent applications of `index_to_size` and `size_to_index`.

Differential Revision: https://reviews.llvm.org/D82082
2020-06-25 12:02:49 +00:00
Frederik Gossen e34b88309e [MLIR][Shape] Lower `shape_of` for unranked tensors
Lower `shape_of` for unranked tensors.
Materializes shape in stack-allocated memory.

Differential Revision: https://reviews.llvm.org/D82196
2020-06-25 08:50:45 +00:00
Frederik Gossen 7bca97d960 [MLIR][Shape] Add canonicalization pattern for `shape.rank`
Replace any `rank(shape_of(tensor))` that relies on a ranked tensor with the
corresponding constant `const_size`.

Differential Revision: https://reviews.llvm.org/D82077
2020-06-25 08:39:35 +00:00
Frederik Gossen 81469527ec [MLIR][Shape] Add constant folding to `shape.rank`
Add constant folding for the `shape.rank` operation of the shape dialect.

Differential Revision: https://reviews.llvm.org/D82076
2020-06-25 08:32:25 +00:00
Frederik Gossen 2c061998b5 [MLIR][Shape] Add `shape.rank` operation
Add `shape.rank` operation to the shape dialect.

Differential Revision: https://reviews.llvm.org/D82028
2020-06-25 08:26:00 +00:00
Mehdi Amini 5ac47c3f52 Move explicit template class specialization out of the class to fix gcc builds (NFC)
gcc fails with:

   explicit specialization in non-namespace scope
2020-06-25 01:43:21 +00:00
George Mitenkov b5c24c24a4 [MLIR][SPIRVToLLVM] Implementation of SPIR-V module conversion pattern
This patch introduces conversion patterns for `spv.module` and `spv._module_end`.
SPIR-V module is converted into `ModuleOp`. This will play a role of enclosing
scope to LLVM ops. At the moment, SPIR-V module attributes (such as memory model,
etc) are ignored.

Differential Revision: https://reviews.llvm.org/D82468
2020-06-24 20:42:50 -04:00
HazemAbdelhafez 2bcb620868 [mlir][spirv] Add TransposeOp
Add Transpose operation to SPIRV dialect.

Differential Revision: https://reviews.llvm.org/D82308
2020-06-24 20:41:54 -04:00
River Riddle 7d1452d837 [mlir] Refactor OpInterface internals to be faster and factor out common bits.
This revision adds a new support header, InterfaceSupport, to contain various generic bits of functionality for implementing "Interfaces". Interfaces embody a mechanism for attaching concept-based polymorphism to a type system. With this refactoring a new InterfaceMap type is added to allow for efficient interface lookups without going through an indirect call. This should provide a decent performance speedup without changing the size of AbstractOperation.

In a future revision, this functionality will also be used to bring Interface like functionality to Attributes and Types.

Differential Revision: https://reviews.llvm.org/D81882
2020-06-24 17:23:58 -07:00
George Mitenkov a2edbd8170 [MLIR][LLVMDialect] Added bitreverse and ctpop intrinsics
Introduced `llvm.intr.bitreverse` and `llvm.intr.ctpop` LLVM bit
intrinsics to LLVM dialect. These intrinsics help with SPIR-V to
LLVM conversion, allowing a direct mapping from `spv.BitReverse`
and `spv.BitCount` respectively. Tests are added to `roundtrip.mlir`
and `llvm-intrinsics.mlir`.

Differential Revision: https://reviews.llvm.org/D82285
2020-06-23 14:25:35 -04:00
Tobias Gysi 2ff6fad700 Revert "[mlir] make the bitwidth of device side index computations configurable"
This reverts commit d10b1a38a7.
2020-06-23 19:21:36 +02:00
George Mitenkov a4dc61344f [MLIR][SPIRVToLLVM] Implementation of spv.func conversion, and return ops
This patch provides an implementation for `spv.func` conversion. The pattern
is populated in a separate method added to the pass. At the moment, the type
signature conversion only includes the supported types. The conversion pattern
also matches SPIR-V function control attributes to LLVM function attributes.
Those are modelled as `passthrough` attributes in LLVM dialect. The following
mapping are used:
- None: no attributes passed
- Inline: `alwaysinline` seems to be the right equivalent (`inlinehint` is
  semantically weaker in my opinion)
- DontInline: `noinline`
- Pure and Const: I think those can be modelled as `readonly` and `readnone`
  attributes respectively.

Also, 2 patterns added for return ops conversion (`spv.Return` for void return
and `spv.ReturnValue` for a single value return).

Differential Revision: https://reviews.llvm.org/D81931
2020-06-23 11:34:11 -04:00
Rahul Joshi c20875a48c [MLIR][NFC] Adopt hasNItems() for SizedRegion predicate
Differential Revision: https://reviews.llvm.org/D82334
2020-06-22 16:43:02 -07:00
Hanhan Wang 809bcf4c87 [mlir] Fix a doc link in LinalgBase.td
Differential Revision: https://reviews.llvm.org/D82303
2020-06-22 11:19:18 -07:00
Jakub Lichman cde2dc2fa6 [mlir] Fix linalg.generic matmul example in the doc
Example of Matmul implementation in linalg.generic operation contained few mistakes that can puzzle new startes when trying to run the example.

Differential Revision: https://reviews.llvm.org/D82289
2020-06-22 13:24:41 +02:00
Tobias Gysi d10b1a38a7 [mlir] make the bitwidth of device side index computations configurable
The patch makes the index type lowering of the GPU to NVVM/ROCDL
conversion configurable. It introduces a pass option that controls the
bitwidth used when lowering index computations.

Differential Revision: https://reviews.llvm.org/D80285
2020-06-22 11:43:37 +02:00
Stephan Herhut 4bcd08eb1c [mlir] Add for loop specialization
Summary:
We already had a parallel loop specialization pass that is used to
enable unrolling and consecutive vectorization by rewriting loops
whose bound is defined as a min of a constant and a dynamic value
into a loop with static bound (the constant) and the minimum as
bound, wrapped into a conditional to dispatch between the two.
This adds the same rewriting for for loops.

Differential Revision: https://reviews.llvm.org/D82189
2020-06-22 10:14:17 +02:00
Mehdi Amini 20d0ab6157 Fix warning caused by TableGen verifier predicate (NFC)
Avoid using max on unsigned constants, in case the caller is using 0 we
end up with:

  warning: taking the max of unsigned zero and a value is always equal to the other value [-Wmax-unsigned-zero]

Instead we can just use native TableGen to fold the comparison here.
2020-06-20 06:31:06 +00:00
Thomas Raoux e4bc08f012 [mlir] Allow vector.contract to have mixed types operands
Allow lhs and rhs to have different type than accumulator/destination. Some
hardware like GPUs support natively operations like uint8xuint8xuint32.

Differential Revision: https://reviews.llvm.org/D82069
2020-06-19 17:08:57 -07:00
aartbik 0d82ab7885 [mlir] [VectorOps] Improve vector.constant_mask lowering
Use direct vector constants for the 1-D case. This approach
scales much better than generating elaborate insertion operations
that are eventually folded into a constant. We could of course
generalize the 1-D case to higher ranks, but this simplification
already helps in scaling some microbenchmarks that would formerly
crash on the intermediate IR length.

Reviewed By: reidtatge

Differential Revision: https://reviews.llvm.org/D82144
2020-06-19 10:40:08 -07:00