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Author SHA1 Message Date
Matt Arsenault 0de924b76d AMDGPU: Distribute SGPR->VGPR copies of REG_SEQUENCE 
Make the REG_SEQUENCE be a VGPR, and do the register class
copy first.

llvm-svn: 251855
 2015-11-02 23:15:42 +00:00
Tom Stellard 45bb48ea19 R600 -> AMDGPU rename 
llvm-svn: 239657
 2015-06-13 03:28:10 +00:00