Commit Graph

102528 Commits

Author SHA1 Message Date
Krzysztof Parzyszek 2af5037d34 [Hexagon] Use automatically-generated scheduling information for HVX
Patch by Jyotsna Verma.

llvm-svn: 302073
2017-05-03 20:10:36 +00:00
Zachary Turner 4f145b2a59 Remove unused private field.
llvm-svn: 302069
2017-05-03 19:42:06 +00:00
Anna Thomas f475fa3575 Avoid warning of unused variable in release builds. NFC
llvm-svn: 302068
2017-05-03 19:25:04 +00:00
Sanjoy Das 23f314d04f Fix typos in comment
llvm-svn: 302063
2017-05-03 18:29:34 +00:00
Greg Clayton c5b2d561e8 Break verification down into smaller functions to keep code clean.
Adrian requested that we break things down to make things clean in the DWARFVerifier. This patch breaks everything down into nice individual functions and cleans up the code quite a bit and prepares us for the next round of verifiers.

Differential Revision: https://reviews.llvm.org/D32812

llvm-svn: 302062
2017-05-03 18:25:46 +00:00
Anna Thomas d4c0295cc8 Fix PPC64 warning for missing parantheses. NFC.
llvm-svn: 302061
2017-05-03 18:25:43 +00:00
Reid Kleckner a0b45f4bfc [IR] Abstract away ArgNo+1 attribute indexing as much as possible
Summary:
Do three things to help with that:
- Add AttributeList::FirstArgIndex, which is an enumerator currently set
  to 1. It allows us to change the indexing scheme with fewer changes.
- Add addParamAttr/removeParamAttr. This just shortens addAttribute call
  sites that would otherwise need to spell out FirstArgIndex.
- Remove some attribute-specific getters and setters from Function that
  take attribute list indices.  Most of these were only used from
  BuildLibCalls, and doesNotAlias was only used to test or set if the
  return value is malloc-like.

I'm happy to split the patch, but I think they are probably easier to
review when taken together.

This patch should be NFC, but it sets the stage to change the indexing
scheme to this, which is more convenient when indexing into an array:
  0: func attrs
  1: retattrs
  2...: arg attrs

Reviewers: chandlerc, pete, javed.absar

Subscribers: david2050, llvm-commits

Differential Revision: https://reviews.llvm.org/D32811

llvm-svn: 302060
2017-05-03 18:17:31 +00:00
Davide Italiano 2e23ce4cad [CodeView] Remove constructor initialization of a removed field.
I should've staged this with my last commit.

llvm-svn: 302059
2017-05-03 18:02:46 +00:00
Anna Thomas ac0ec2240b [RuntimeLoopUnroller] Add assert that we dont unroll non-rotated loops
Summary:
Cloning basic blocks in the loop for runtime loop unroller depends on loop being
in rotated form (i.e. loop latch target is the exit block).
Assert that this is true, so that callers of runtime loop unroller pass in
canonical loops.
The single caller of this function has that check recently added:
https://reviews.llvm.org/rL301239

Reviewers: davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32801

llvm-svn: 302058
2017-05-03 17:43:59 +00:00
Alexei Starovoitov 4198f2a702 [bpf] add relocation support
. there should be no runtime relocation inside the bpf function.
  . relocation supported here mostly for debugging.
  . a test case is added.

Signed-off-by: Yonghong Song <yhs@fb.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
llvm-svn: 302055
2017-05-03 17:30:56 +00:00
Zachary Turner cf468d86f3 [CodeView] Use actual strings for dealing with checksums and lines.
The raw CodeView format references strings by "offsets", but it's
confusing what table the offset refers to.  In the case of line
number information, it's an offset into a buffer of records,
and an indirection is required to get another offset into a
different table to find the final string.  And in the case of
checksum information, there is no indirection, and the offset
refers directly to the location of the string in another buffer.

This would be less confusing if we always just referred to the
strings by their value, and have the library be smart enough
to correctly resolve the offsets on its own from the right
location.

This patch makes that possible.  When either reading or writing,
all the user deals with are strings, and the library does the
appropriate translations behind the scenes.

llvm-svn: 302053
2017-05-03 17:11:40 +00:00
Zachary Turner 2d5c2cd3ce [llvm-readobj] Update readobj to re-use parsing code.
llvm-readobj hand rolls some CodeView parsing code for string
tables, so this patch updates it to re-use some of the newly
introduced parsing code in LLVMDebugInfoCodeView.

Differential Revision: https://reviews.llvm.org/D32772

llvm-svn: 302052
2017-05-03 17:11:11 +00:00
Simon Pilgrim 03ccf91d85 [X86][LWP] Add stack folding mappings and tests for LWPINS/LWPVAL instructions
llvm-svn: 302049
2017-05-03 16:46:30 +00:00
Simon Pilgrim eada39d050 Silence a 'enum and non-enum used in conditional' warning.
llvm-svn: 302048
2017-05-03 16:43:57 +00:00
Amaury Sechet 666c705953 [DAGCombine] (addcarry (add|uaddo X, Y), 0, Carry) -> (addcarry X, Y, Carry)
Summary: Do the transform when the carry isn't used. It's a pattern exposed when legalizing large integers.

Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32755

llvm-svn: 302047
2017-05-03 16:28:10 +00:00
Greg Clayton b8c162b53c Create DWARFVerifier.cpp and .h and move all DWARF verification code over into it.
Adrian requested we create a DWARFVerifier.cpp file to contain all of the DWARF verification stuff. This change simply moves the functionality over into DWARFVerifier.h and DWARFVerifier.cpp, renames the DWARFVerifier methods to start with lower case, and switches DWARFContext.cpp over to using the new functionality.

Differential Revision: https://reviews.llvm.org/D32809

llvm-svn: 302044
2017-05-03 16:02:29 +00:00
Zachary Turner c504ae3cef Resubmit r301986 and r301987 "Add codeview::StringTable"
This was reverted due to a "missing" file, but in reality
what happened was that I renamed a file, and then due to
a merge conflict both the old file and the new file got
added to the repository.  This led to an unused cpp file
being in the repo and not referenced by any CMakeLists.txt
but #including a .h file that wasn't in the repo.  In an
even more unfortunate coincidence, CMake didn't report the
unused cpp file because it was in a subdirectory of the
folder with the CMakeLists.txt, and not in the same directory
as any CMakeLists.txt.

The presence of the unused file was then breaking certain
tools that determine file lists by globbing rather than
by what's specified in CMakeLists.txt

In any case, the fix is to just remove the unused file from
the patch set.

llvm-svn: 302042
2017-05-03 15:58:37 +00:00
Simon Pilgrim 99b925bdf3 [X86][LWP] Add llvm support for LWP instructions (reapplied).
This patch adds support for the the LightWeight Profiling (LWP) instructions which are available on all AMD Bulldozer class CPUs (bdver1 to bdver4).

Reapplied - this time without changing line endings of existing files.

Differential Revision: https://reviews.llvm.org/D32769

llvm-svn: 302041
2017-05-03 15:51:39 +00:00
Craig Topper b339c6dcc0 [APInt] Give the value union a name so we can remove assumptions on VAL being the larger member
Currently several places assume the VAL member is always at least the same size as pVal. In particular for a memcpy in the move assignment operator. While this is a true assumption, it isn't good practice to assume this.

This patch gives the union a name so we can write the memcpy in terms of the union itself. This also adds a similar memcpy to the move constructor where we previously just copied using VAL directly.

This patch is mostly just a mechanical addition of the U in front of VAL and pVAL everywhere. But several constructors had to be modified since we can't directly initializer a field of named union from the initializer list.

Differential Revision: https://reviews.llvm.org/D30629

llvm-svn: 302040
2017-05-03 15:46:24 +00:00
Greg Clayton 8df55b43e1 Verify that no compile units share the same line table in "llvm-dwarfdump --verify"
Check to make sure no compile units have the same DW_AT_stmt_list values. Report a verification error if they do.

Differential Revision: https://reviews.llvm.org/D32771

llvm-svn: 302039
2017-05-03 15:45:31 +00:00
Simon Pilgrim a271c54324 Revert rL302028 due to accidental line ending changes.
llvm-svn: 302038
2017-05-03 15:42:29 +00:00
Krzysztof Parzyszek d10df49c90 [Hexagon] Handle S2_storerf_io in HexagonInstrInfo
llvm-svn: 302036
2017-05-03 15:36:51 +00:00
Krzysztof Parzyszek 700a5f99c7 [Hexagon] Misc fixes in HexagonInstrInfo, NFC
Formatting changes + remove unused function.

llvm-svn: 302035
2017-05-03 15:34:52 +00:00
Krzysztof Parzyszek 4763c2d999 [Hexagon] Adjust latency between allocframe and the first store on stack
Allocframe and the following stores on the stack have a latency of 2 cycles
when not in the same packet. This happens because R29 is needed early by the
store instruction. Since one of such stores can be packetized along with
allocframe and use old value of R29, we can assign it 0 cycle latency
while leaving latency of other stores to the default value of 2 cycles.

Patch by Jyotsna Verma.

llvm-svn: 302034
2017-05-03 15:33:09 +00:00
Krzysztof Parzyszek 19635bdcbb [Hexagon] Handle J2_jumptpt and J2_jumpfpt in HexagonInstrInfo
llvm-svn: 302033
2017-05-03 15:30:46 +00:00
Krzysztof Parzyszek 0a8043e1b3 [Hexagon] Implement undoing .cur instructions in packetizer
The packetizer needs to convert .cur instruction to its regular form if
the use is not in the same packet as the .cur. The code in the packetizer
handles one type of .cur, which is the vector load case. This patch
updates the packetizer so that it can undo all the .cur instructions.
In the test case, the .cur is the 128B version, but there are also the
post-increment versions.

Patch by Brendon Cahoon.

llvm-svn: 302032
2017-05-03 15:28:56 +00:00
Krzysztof Parzyszek 4be9d92b69 [Hexagon] Add memory operands to a rewritten load
llvm-svn: 302030
2017-05-03 15:26:13 +00:00
Krzysztof Parzyszek 781324fc7e [Hexagon] Reset spill alignment when variable-sized objects are present
llvm-svn: 302029
2017-05-03 15:23:53 +00:00
Simon Pilgrim b2e0464fde [X86][LWP] Add llvm support for LWP instructions.
This patch adds support for the the LightWeight Profiling (LWP) instructions which are available on all AMD Bulldozer class CPUs (bdver1 to bdver4).

Differential Revision: https://reviews.llvm.org/D32769

llvm-svn: 302028
2017-05-03 15:18:34 +00:00
Guy Blank d0baa524d0 [X86][AVX512] remove unnecessary case. NFC
VFPCLASS is for vector types and not scalar, so it cannot get here.

Differential Revision: https://reviews.llvm.org/D32694

llvm-svn: 302023
2017-05-03 13:34:05 +00:00
Jonas Paulsson f40eac5088 [SystemZ] Properly check number of operands in getCmpOpsType()
It is needed to check that the number of operands are 2 when
finding the case of a logic combination, e.g. 'and' of two compares.

Review: Ulrich Weigand
llvm-svn: 302022
2017-05-03 13:33:45 +00:00
Oren Ben Simhon dbd4bba1ec [X86] Support of no_caller_saved_registers attribute
This patch implements the LLVM part for no_caller_saved_registers attribute as appears here: https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=5ed3cc7b66af4758f7849ed6f65f4365be8223be.
In order to implement the attribute, we use the dynamic CSR mechanism to remove returned/passed arguments from the function regmask/CSR list.

Differential Revision: https://reviews.llvm.org/D31876

llvm-svn: 302020
2017-05-03 13:07:19 +00:00
Elad Cohen ef5798acf5 Support arbitrary address space pointers in masked gather/scatter intrinsics.
Fixes PR31789 - When loop-vectorize tries to use these intrinsics for a
non-default address space pointer we fail with a "Calling a function with a
bad singature!" assertion. This patch solves this by adding the 'vector of
pointers' argument as an overloaded type which will determine the address
space.

Differential revision: https://reviews.llvm.org/D31490

llvm-svn: 302018
2017-05-03 12:28:54 +00:00
Dylan McKay 4aedb8a6b7 [AVR] Reserve the Y register in all functions
llvm-svn: 302017
2017-05-03 11:56:01 +00:00
Anna Thomas 53c8d95c85 [Loop Deletion] Delete loops that are never executed
Summary:
Currently, loop deletion deletes loop where the only values
that are used outside the loop are loop-invariant.
This patch adds logic to delete loops where the loop is proven to be
never executed (i.e. the only predecessor of the loop preheader has a
constant conditional branch as terminator, and the preheader is not the
taken target). This will remove loops that become dead after
loop-unswitching generates constant conditional branches.

The next steps are:
1. moving the loop deletion implementation to LoopUtils.
2. Add logic in loop-simplifyCFG which will support changing conditional
constant branches to unconditional branches. If loops become unreachable in this
process, they can be removed using `deleteDeadLoop` function.

Reviewers: chandlerc, efriedma, sanjoy, reames

Reviewed by: sanjoy

Subscribers: mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D32494

llvm-svn: 302015
2017-05-03 11:47:11 +00:00
Dylan McKay c30d85bd8a Revert "[AVR] Enable the frame pointer for all functions"
This reverts commit 358ad02d999e88853d2cfc954bd2f668308a51f7.

llvm-svn: 302014
2017-05-03 11:36:42 +00:00
Alex Lorenz c748d7b57b [Triple] Add a "macos" OS type that acts as a synonym for "macosx"
The "macosx" OS type is still the canonical type. In the future "macos" will
become the canonical OS type (but we will still support "macosx").

rdar://27043820

Differential Revision: https://reviews.llvm.org/D32748

llvm-svn: 302011
2017-05-03 10:42:35 +00:00
Simon Pilgrim 05cfa83843 [X86] Refactored LowerINTRINSIC_W_CHAIN to use a switch statament. NFCI.
Pre-commit as requested in D32769.

llvm-svn: 302010
2017-05-03 10:40:18 +00:00
Daniel Jasper dff096f217 Revert r301986 (and subsequent r301987).
The patch is failing to add StringTableStreamBuilder.h, but that isn't
even discovered because the corresponding StringTableStreamBuilder.cpp
isn't added to any CMakeLists.txt file and thus never built. I think
this patch is just incomplete.

llvm-svn: 302002
2017-05-03 07:29:25 +00:00
Zachary Turner 59e83892e0 Fix use after free in BinaryStream library.
This was reported by the ASAN bot, and it turned out to be
a fairly fundamental problem with the design of VarStreamArray
and the way it passes context information to the extractor.

The fix was cumbersome, and I'm not entirely pleased with it,
so I plan to revisit this design in the future when I'm not
pressed to get the bots green again.  For now, this fixes
the issue by storing the context information by value instead
of by reference, and introduces some impossibly-confusing
template magic to make things "work".

llvm-svn: 301999
2017-05-03 05:34:00 +00:00
Matt Arsenault 6a288c1e32 Replace hardcoded intrinsic list with speculatable attribute.
No change in which intrinsics should be speculated.

llvm-svn: 301995
2017-05-03 02:26:10 +00:00
Peter Collingbourne e95901caa4 Revert r295861, "[ModuleSummaryAnalysis] Don't crash when referencing unnamed globals."
We should always expect values to be named before running the module summary
analysis (see NameAnonGlobals pass), so it's fine if we crash in that case.

llvm-svn: 301991
2017-05-03 00:18:48 +00:00
Tim Shen e59d06fe78 [PowerPC, DAGCombiner] Fold a << (b % (sizeof(a) * 8)) back to a single instruction
Summary:
This is the corresponding llvm change to D28037 to ensure no performance
regression.

Reviewers: bogner, kbarton, hfinkel, iteratee, echristo

Subscribers: nemanjai, llvm-commits

Differential Revision: https://reviews.llvm.org/D28329

llvm-svn: 301990
2017-05-03 00:07:02 +00:00
Zachary Turner 67736594f7 Fix type conversion error.
llvm-svn: 301987
2017-05-02 23:41:51 +00:00
Zachary Turner 7dba20bd2b Make codeview::StringTable.
Previously we had knowledge of how to serialize and deserialize
a string table inside of DebugInfo/PDB, but the string table
that it serializes contains a piece that is actually considered
CodeView and can appear outside of a PDB.  We already have logic
in llvm-readobj and MCCodeView to read and write this format,
so it doesn't make sense to duplicate the logic in DebugInfoPDB
as well.

This patch makes codeview::StringTable (for writing) and
codeview::StringTableRef (for reading), updates DebugInfoPDB
to use these classes for its own writing, and updates llvm-readobj
to additionally use StringTableRef for reading.

It's a bit more difficult to get MCCodeView to use this for
writing, but it's a logical next step.

llvm-svn: 301986
2017-05-02 23:36:17 +00:00
Greg Clayton 6707046f90 Add line table verification to lldb-dwarfdump --verify
This patch verifies the .debug_line:
- verify all addresses in a line table sequence have ascending addresses
- verify that all line table file indexes are valid

Unit tests added for both cases.

Differential Revision: https://reviews.llvm.org/D32765

llvm-svn: 301984
2017-05-02 22:48:52 +00:00
Tim Northover 4a01ffbd6a ARM: avoid handing a deleted node back to TableGen during ISel.
When we replaced the multiplicand the destination node might already exist.
When that happens the original gets CSEd and deleted. However, it's actually
used as the offset so nonsense is produced.

Should fix PR32726.

llvm-svn: 301983
2017-05-02 22:45:19 +00:00
Reid Kleckner ee4930b688 Re-land r301697 "[IR] Make add/remove Attributes use AttrBuilder instead of AttributeList"
This time, I fixed, built, and tested clang.

This reverts r301712.

llvm-svn: 301981
2017-05-02 22:07:37 +00:00
Joel Jones 6513405735 [AArch64] ILP32 Backend Relocation Support
Remove "_NC" suffix and semantics from TLSDESC_LD{64,32}_LO12 and
  TLSDESC_ADD_LO12 relocations
Rearrange ordering in AArch64.def to follow relocation encoding
Fix name:
  R_AARCH64_P32_LD64_GOT_LO12_NC => R_AARCH64_P32_LD32_GOT_LO12_NC
Add support for several "TLS", "TLSGD", and "TLSLD" relocations for
  ILP32
Fix return values from isNonILP32reloc
Add implementations for
  R_AARCH64_ADR_PREL_PG_HI21_NC, R_AARCH64_P32_LD32_GOT_LO12_NC,
  R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC,
  R_AARCH64_P32_TLSDESC_LD32_LO12, R_AARCH64_LD64_GOT_LO12_NC,
  *TLSLD_LDST128_DTPREL_LO12, *TLSLD_LDST128_DTPREL_LO12_NC,
  *TLSLE_LDST128_TPREL_LO12, *TLSLE_LDST128_TPREL_LO12_NC
Modify error messages to give name of equivalent relocation in the
  ABI not being used, along with better checking for non-existent
  requested relocations.
Added assembler support for "pg_hi21_nc"
Relocation definitions added without implementations:
  R_AARCH64_P32_TLSDESC_ADR_PREL21, R_AARCH64_P32_TLSGD_ADR_PREL21,
  R_AARCH64_P32_TLSGD_ADD_LO12_NC, R_AARCH64_P32_TLSLD_ADR_PREL21, 
  R_AARCH64_P32_TLSLD_ADR_PAGE21, R_AARCH64_P32_TLSLD_ADD_LO12_NC,
  R_AARCH64_P32_TLSLD_LD_PREL19, R_AARCH64_P32_TLSDESC_LD_PREL19,
  R_AARCH64_P32_TLSGD_ADR_PAGE21, R_AARCH64_P32_TLS_DTPREL,
  R_AARCH64_P32_TLS_DTPMOD, R_AARCH64_P32_TLS_TPREL,
  R_AARCH64_P32_TLSDESC
Fix encoding:
  R_AARCH64_P32_TLSDESC_ADR_PAGE21

Reviewers: Peter Smith

Patch by: Joel Jones (jjones@cavium.com)

Differential Revision: https://reviews.llvm.org/D32072

llvm-svn: 301980
2017-05-02 22:01:48 +00:00
Paul Robinson 2bc3873fe6 [DWARFv5] Parse new line-table header format.
The directory and file tables now have form-based content descriptors.
Parse these and extract the per-directory/file records based on the
descriptors.  For now we support only DW_FORM_string (inline) for the
path names; follow-up work will add support for indirect forms (i.e.,
DW_FORM_strp, strx<N>, and line_strp).

Differential Revision: http://reviews.llvm.org/D32713

llvm-svn: 301978
2017-05-02 21:40:47 +00:00
Sanjay Patel d091e76e0e revert r301766: InstructionSimplify: Canonicalize shuffle operands. NFC-ish
Turns out this wasn't NFC-ish at all because there's a bug processing shuffles
that change the size of their input vectors (that case always seems to trip us
up). 

This should fix PR32872 while we investigate how it failed and reduce a testcase:
https://bugs.llvm.org/show_bug.cgi?id=32872
 

llvm-svn: 301977
2017-05-02 21:37:28 +00:00
Davide Italiano 839c7e6cfb [NewGVN] Fix typo and format comment. NFCI.
llvm-svn: 301974
2017-05-02 21:11:40 +00:00
Greg Clayton c7695a8e45 Verify that all references point to actual DIEs in "llvm-dwarfdump --verify"
LTO and other fancy linking previously led to DWARF that contained invalid references. We already validate that CU relative references fall into the CU, and the DW_FORM_ref_addr references fall inside the .debug_info section, but we didn't validate that the references pointed to correct DIE offsets. This new verification will ensure that all references refer to actual DIEs and not an offset in between.

This caught a bug in DWARFUnit::getDIEForOffset() where if you gave it any offset, it would match the DIE that mathes the offset _or_ the next DIE. This has been fixed.

Differential Revision: https://reviews.llvm.org/D32722

llvm-svn: 301971
2017-05-02 20:28:33 +00:00
Tim Northover f9d8eee3db ARM: add arm1176j-f processor
I doubt anyone actually uses it, and I'm not even entirely convinced it exists
myself; but it is our default for "clang -arch armv6". Functionally, if it does
exist it's identical to the arm1176jz-f from LLVM's point of view (the
difference is apparently in the "Security Extensions").

llvm-svn: 301962
2017-05-02 19:06:13 +00:00
Matt Arsenault 6893926b69 PEI: Skip dead objects when looking at CSRs
On AMDGPU if an SGPR is spilled to a VGPR, the frame index
is deleted. If there were any CSR SGPRs, this woudl
assert when setting the offset.

llvm-svn: 301961
2017-05-02 18:56:28 +00:00
Xinliang David Li ab8722f80a [PartialInlining] Add more early filtering
This is a follow up to the previous
inline cost patch for quicker filtering.

llvm-svn: 301959
2017-05-02 18:43:21 +00:00
Matt Arsenault 5c80618fb7 AMDGPU: Don't promote alloca to LDS for leaf functions
LDS use in leaf functions not currently handled.

llvm-svn: 301958
2017-05-02 18:33:18 +00:00
Krzysztof Parzyszek fca6fae463 [Hexagon] Fix uninitialized value caught with valgrind
Patch by Colin LeMahieu.

llvm-svn: 301957
2017-05-02 18:29:49 +00:00
Krzysztof Parzyszek 57a8bb4343 [Hexagon] Change iconst to emit 27bit relocation
Patch by Colin LeMahieu.

llvm-svn: 301956
2017-05-02 18:19:11 +00:00
Krzysztof Parzyszek a750383d0f [Hexagon] Add extenders for GD_PLT_B22_PCREL and LD_PLT_B22_PCREL
Patch by Sid Manning.

llvm-svn: 301955
2017-05-02 18:15:33 +00:00
Krzysztof Parzyszek 9aaf923376 [Hexagon] Don't ignore mult-cycle latency information
The compiler was generating code that ends up ignoring a multiple
latency dependence between two instructions by scheduling the
intructions in back-to-back packets. 

The packetizer needs to end a packet if the latency of the current
current insruction and the source in the previous packet is
greater than 1 cycle. This case occurs when there is still room in
the current packet, but scheduling the instruction causes a stall.
Instead, the packetizer should start a new packet. Also, if the
current packet already contains a stall, then it is okay to add
another instruction to the packet that also causes a stall. This
occurs when there are no instructions that can be scheduled in
between the producer and consumer instructions.

This patch changes the latency for loads to 2 cycles from 3 cycles.
This change refects that a load only needs to be separated by
one extra packet to eliminate the stall.

Patch by Ikhlas Ajbar.

llvm-svn: 301954
2017-05-02 18:12:19 +00:00
Krzysztof Parzyszek 32e20b80c6 [Hexagon] Formatting changes, NFC
llvm-svn: 301953
2017-05-02 18:09:07 +00:00
Krzysztof Parzyszek 188ab98f67 [Hexagon] Remove unused validSubtarget TSFlags
Patch by Colin LeMahieu.

llvm-svn: 301952
2017-05-02 18:05:36 +00:00
Krzysztof Parzyszek b0af1ef741 [Hexagon] Make sure duplexed dealloc_returns are checked for double jumps
Patch by Colin LeMahieu.

llvm-svn: 301951
2017-05-02 18:03:08 +00:00
Matt Arsenault 9ac7d6be3c SpeculativeExecution: Stop using whitelist for costs
Just let TTI's cost do this instead of arbitrarily restricting
this.

llvm-svn: 301950
2017-05-02 18:02:18 +00:00
Krzysztof Parzyszek 49f7e0a98b [Hexagon] Move checking AXOK to checker
Patch by Colin LeMahieu.

llvm-svn: 301949
2017-05-02 18:00:37 +00:00
Zachary Turner e204a6c9a3 Rename pdb::StringTable -> pdb::PDBStringTable.
With the forthcoming codeview::StringTable which a pdb::StringTable
would hold an instance of as one member, this ambiguity becomes
confusing.  Rename to PDBStringTable to avoid this.

llvm-svn: 301948
2017-05-02 18:00:13 +00:00
Krzysztof Parzyszek 57f5046b4a [Hexagon] Remove unneeded code from HexagonShuffler
Patch by Colin LeMahieu.

llvm-svn: 301947
2017-05-02 17:58:52 +00:00
Krzysztof Parzyszek c15f8d2a08 [Hexagon] Extract function that checks endloops with other branches
Change location number to point to conflicting branch instruction.

Patch by Colin LeMahieu.

llvm-svn: 301946
2017-05-02 17:56:11 +00:00
Krzysztof Parzyszek 1cc6bfbc83 [Hexagon] Add new packet iterator which will iterate through duplexes
Patch by Colin LeMahieu.

llvm-svn: 301945
2017-05-02 17:53:51 +00:00
Zachary Turner a0aae2757d Revert "Remove "_NC" suffix and semantics from TLSDESC_LD{64,32}_LO12 and"
This reverts commit c08155afc5d3230792da2ad30a046a8617735a73.

This is causing undefined symbol errors with some of the constants.

llvm-svn: 301944
2017-05-02 17:51:27 +00:00
Krzysztof Parzyszek 107f82d128 [Hexagon] Check for .cur def without use without using a map data structure
Patch by Colin LeMahieu.

llvm-svn: 301943
2017-05-02 17:51:14 +00:00
Peter Collingbourne 7c2c4097a0 Bitcode: Simplify how we enumerate summaries in the index. NFCI.
Instead of defining a custom iterator class, just use a function with a
callback, which is much easier to understand and less error prone.

Differential Revision: https://reviews.llvm.org/D32470

llvm-svn: 301942
2017-05-02 17:48:39 +00:00
Paul Robinson ba1c91564b Make DWARFDebugLine use StringRef for directory/file tables. NFC
Differential Revision: http://reviews.llvm.org/D32728

llvm-svn: 301940
2017-05-02 17:37:32 +00:00
Joel Jones 705103e523 Remove "_NC" suffix and semantics from TLSDESC_LD{64,32}_LO12 and
TLSDESC_ADD_LO12 relocations
Rearrange ordering in AArch64.def to follow relocation encoding
Fix name:
  R_AARCH64_P32_LD64_GOT_LO12_NC => R_AARCH64_P32_LD32_GOT_LO12_NC
Add support for several "TLS", "TLSGD", and "TLSLD" relocations for
  ILP32
Fix return values from isNonILP32reloc
Add implementations for
  R_AARCH64_ADR_PREL_PG_HI21_NC, R_AARCH64_P32_LD32_GOT_LO12_NC,
  R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC,
  R_AARCH64_P32_TLSDESC_LD32_LO12, R_AARCH64_LD64_GOT_LO12_NC,
  *TLSLD_LDST128_DTPREL_LO12, *TLSLD_LDST128_DTPREL_LO12_NC,
  *TLSLE_LDST128_TPREL_LO12, *TLSLE_LDST128_TPREL_LO12_NC
Modify error messages to give name of equivalent relocation in the
  ABI not being used, along with better checking for non-existent
  requested relocations.
Added assembler support for "pg_hi21_nc"
Relocation definitions added without implementations:
  R_AARCH64_P32_TLSDESC_ADR_PREL21, R_AARCH64_P32_TLSGD_ADR_PREL21,
  R_AARCH64_P32_TLSGD_ADD_LO12_NC, R_AARCH64_P32_TLSLD_ADR_PREL21, 
  R_AARCH64_P32_TLSLD_ADR_PAGE21, R_AARCH64_P32_TLSLD_ADD_LO12_NC,
  R_AARCH64_P32_TLSLD_LD_PREL19, R_AARCH64_P32_TLSDESC_LD_PREL19,
  R_AARCH64_P32_TLSGD_ADR_PAGE21, R_AARCH64_P32_TLS_DTPREL,
  R_AARCH64_P32_TLS_DTPMOD, R_AARCH64_P32_TLS_TPREL,
  R_AARCH64_P32_TLSDESC
Fix encoding:
  R_AARCH64_P32_TLSDESC_ADR_PAGE21

Reviewers: Peter Smith

Patch by: Joel Jones (jjones@cavium.com)

Differential Revision: https://reviews.llvm.org/D32072

llvm-svn: 301939
2017-05-02 17:14:31 +00:00
Matt Arsenault b03dd8daae AMDGPU: Refactor AsmPrinter
Avoid analyzing functions multiple times. This allows
asserting that each function is only analyzed once.

llvm-svn: 301938
2017-05-02 17:14:00 +00:00
Matt Arsenault 7b82b4bddb AMDGPU: Make intrinsics speculatable
llvm-svn: 301937
2017-05-02 16:57:44 +00:00
Zachary Turner edef14510e [PDB/CodeView] Read/write codeview inlinee line information.
Previously we wrote line information and file checksum
information, but we did not write information about inlinee
lines and functions.  This patch adds support for that.

llvm-svn: 301936
2017-05-02 16:56:09 +00:00
Marek Olsak a302a736ec AMDGPU: Add AMDGPU_HS calling convention
Reviewers: arsenm, nhaehnle

Subscribers: mehdi_amini, kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D32644

llvm-svn: 301930
2017-05-02 15:41:10 +00:00
Sanjay Patel 6381db18fe [InstCombine] don't use DeMorgan's Law on integer constants (2nd try)
This was originally checked in here:
https://reviews.llvm.org/rL301923

And reverted here:
https://reviews.llvm.org/rL301924

Because there's a clang test that would fail after this. I fixed/removed the
offending CHECK lines in:
https://reviews.llvm.org/rL301928

So let's try this again. Original commit message:

This is the fold that causes the infinite loop in BoringSSL
(https://github.com/google/boringssl/blob/master/crypto/cipher/e_rc2.c)
when we fix instcombine demanded bits to prefer 'not' ops as in https://reviews.llvm.org/D32255.

There are 2 or 3 problems with dyn_castNotVal, and I don't think we can
reinstate https://reviews.llvm.org/D32255 until dyn_castNotVal is completely eliminated.

1. As shown here, it transforms 'not' into random xor. This transform is harmful to SCEV and codegen because 'not' can often be folded while random xor cannot.
2. It does not transform vector constants. This is actually a good thing, but if you don't believe the above argument, then we shouldn't have excluded vectors.
3. It tries to avoid transforming not(not(X)). That's nice, but it doesn't match the greedy nature of instcombine. If we DeMorganize a pattern that has an extra 'not' in it: ~(~(~X) & Y) --> (~X | ~Y)

  That's just another case of DeMorgan, so we should trust that we'll fold that pattern too: (~X | ~ Y) --> ~(X & Y)

Differential Revision: https://reviews.llvm.org/D32665

llvm-svn: 301929
2017-05-02 15:31:40 +00:00
Sanjay Patel da0b4deafa revert r301923 : [InstCombine] don't use DeMorgan's Law on integer constants
There's a clang test that is wrongly using -O1 and failing after this commit.

llvm-svn: 301924
2017-05-02 14:48:23 +00:00
Sanjay Patel 096a981982 [InstCombine] don't use DeMorgan's Law on integer constants
This is the fold that causes the infinite loop in BoringSSL 
(https://github.com/google/boringssl/blob/master/crypto/cipher/e_rc2.c) 
when we fix instcombine demanded bits to prefer 'not' ops as in D32255.

There are 2 or 3 problems with dyn_castNotVal, and I don't think we can 
reinstate D32255 until dyn_castNotVal is completely eliminated.
1. As shown here, it transforms 'not' into random xor. This transform is 
   harmful to SCEV and codegen because 'not' can often be folded while 
   random xor cannot.
2. It does not transform vector constants. This is actually a good thing, 
   but if you don't believe the above argument, then we shouldn't have 
   excluded vectors.
3. It tries to avoid transforming not(not(X)). That's nice, but it doesn't
   match the greedy nature of instcombine. If we DeMorganize a pattern 
   that has an extra 'not' in it:
   ~(~(~X) & Y) --> (~X | ~Y)

   That's just another case of DeMorgan, so we should trust that we'll fold
   that pattern too:
   (~X | ~ Y) --> ~(X & Y)

Differential Revision: https://reviews.llvm.org/D32665

llvm-svn: 301923
2017-05-02 14:31:30 +00:00
Amaury Sechet 106a7eab84 [DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .

Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32687

llvm-svn: 301922
2017-05-02 14:15:48 +00:00
Rafael Espindola 3ba2573744 Add llvm::object::getELFSectionTypeName().
This is motivated by https://reviews.llvm.org/D32488 where I am trying
to add printing of the section type for incompatible sections to LLD
error messages. This patch allows us to use the same code in
llvm-readobj and LLD instead of duplicating the function inside LLD.

Patch by Alexander Richardson!

llvm-svn: 301921
2017-05-02 14:04:52 +00:00
Amaury Sechet 153911f71d [DAGCombine] (add X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: Common pattern when legalizing large integers operations. Similar to D32687, when the carry isn't used.

Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer

Differential Revision: https://reviews.llvm.org/D32738

llvm-svn: 301919
2017-05-02 13:34:25 +00:00
Simon Pilgrim 24d361f7bf [X86] Tidyup subvector insert/extract helpers. NFCI.
Use getConstantOperandVal where possible.

llvm-svn: 301912
2017-05-02 11:08:15 +00:00
Simon Pilgrim 7aca5218b0 Fix typo in comment. NFCI.
llvm-svn: 301911
2017-05-02 10:43:33 +00:00
Simon Pilgrim 89ad89cc73 [SelectionDAG] Improve support for promotion of <1 x fX> floating point argument types (PR31088)
PR31088 demonstrated that we were assuming that only integers require promotion from <1 x iX> types, when in fact float types may require it as well - in this case half floats.

This patch adds support for extension/truncation for both integer and float types.

Differential Revision: https://reviews.llvm.org/D32391

llvm-svn: 301910
2017-05-02 10:33:08 +00:00
Simon Pilgrim 8deb87a6c0 [DAGCombiner] Improve MatchBswapHword logic (PR31357)
The existing code only looks at half of the tree when matching bswap + rol patterns ending in an OR tree (as opposed to a cascade).

Patch originally introduced by Jim Lewis.

Submitted on the behalf of Dinar Temirbulatov.

Differential Revision: https://reviews.llvm.org/D32039

llvm-svn: 301907
2017-05-02 10:16:19 +00:00
Diana Picus 8abcbbb24b [ARM] GlobalISel: Use TableGen instruction selector
Emit and use the TableGen instruction selector for ARM. At the moment,
this allows us to remove the hand-written code for selecting G_SDIV and
G_UDIV.

Future commits will focus on increasing the code coverage for it and
removing more dead code from the current instruction selector.

llvm-svn: 301905
2017-05-02 09:40:49 +00:00
Craig Topper 9881bd9c1d [APInt] Move APInt::getSplat out of line.
I think this method is probably too complex to be inlined.

llvm-svn: 301901
2017-05-02 06:32:27 +00:00
Craig Topper 1e91919ac1 [APInt] Move the setBit and clearBit methods inline.
This makes setBit/clearBit more consistent with setBits which is already inlined.

llvm-svn: 301900
2017-05-02 05:49:40 +00:00
Xinliang David Li 351d9b01b9 Refactor callsite cost computation into a helper function /NFC
Makes code more readable. The function will also be used
by the partial inlining's cost analysis.

llvm-svn: 301899
2017-05-02 05:38:41 +00:00
Xinliang David Li 6133846be1 [PartialInlining] Hook up inline cost analysis
Differential Revision: http://reviews.llvm.org/D32666

llvm-svn: 301894
2017-05-02 02:44:14 +00:00
Dylan McKay 28355efdad [AVR] Save/restore the frame pointer for all functions
A recent commit I made made it so that we only did this for signal or
interrupt handlers. This broke normal functions.

llvm-svn: 301893
2017-05-02 01:57:48 +00:00
Nemanja Ivanovic b89c27f515 [PowerPC] Emit VMX loads/stores for aligned ops to avoid adding swaps on LE
Fixes PR30730.
This is a re-commit of a pulled commit. The commit was pulled because some
software projects contained uses of Altivec vectors that violated alignment
requirements. Known issues have now been fixed.

Committing on behalf of Lei Huang.

Differential Revision: https://reviews.llvm.org/D26861

llvm-svn: 301892
2017-05-02 01:47:34 +00:00
Dylan McKay 634339ab40 [AVR] Fix a bug where the frame pointer is clobbered
Because it was a callee-saved register, we automatically generated code
to spill and unspill its original value so that it is restored after the
function returns.

The problem is that this code was being generated before the epilogue.
The epilogue itself uses the Y register, which could be prematurely
restored by the CSR restoration process.

This removes R29R28 from the CSR list and changes the prologue/epilogue
code to handle it explicitly.

llvm-svn: 301887
2017-05-02 00:11:34 +00:00
George Burgess IV 7bc507a2e8 Revert r301880
This change caused buildbot failures, apparently because we're not
passing around types that InstSimplify is used to seeing. I'm not overly
familiar with InstSimplify, so I'm reverting this until I can figure out
what exactly is wrong.

llvm-svn: 301885
2017-05-01 23:54:41 +00:00
Paul Robinson 9d4eb6922e Stylistic makeover of DWARFDebugLine before working on it. NFC
Rename parameters and locals to CamelCase, doxygenize the header, and
run clang-format on the whole thing.

llvm-svn: 301883
2017-05-01 23:27:55 +00:00
Zachary Turner 8a2ebfb1cd [CodeView] Write CodeView line information.
Differential Revision: https://reviews.llvm.org/D32716

llvm-svn: 301882
2017-05-01 23:27:42 +00:00
Dylan McKay 3bb6eb238e [AVR] Enable the frame pointer for all functions
This is a temporary measure while we figure out a way to get the frame
pointer working correctly.

llvm-svn: 301881
2017-05-01 23:16:59 +00:00
George Burgess IV 6935aefdf0 [InstSimplify] Handle selects of GEPs with 0 offset
In particular (since it wouldn't fit nicely in the summary):
(select (icmp eq V 0) P (getelementptr P V)) -> (getelementptr P V)

Differential Revision: https://reviews.llvm.org/D31435

llvm-svn: 301880
2017-05-01 23:12:08 +00:00
Simon Pilgrim 8d196c88a6 [X86] Reduce code for setting operations actions by merging into loops across multiple types/ops. NFCI.
llvm-svn: 301879
2017-05-01 23:09:01 +00:00
Xin Tong a41bf70bea Empty Space. NFC
llvm-svn: 301878
2017-05-01 23:08:19 +00:00
Peter Collingbourne 440e204c7b Fix a pessimising move warning.
llvm-svn: 301852
2017-05-01 22:48:10 +00:00
Matthias Braun ab9438cb03 MachineFrameInfo: Track whether MaxCallFrameSize is computed yet; NFC
This tracks whether MaxCallFrameSize is computed yet. Ideally we would
assert and fail when the value is queried before it is computed, however
this fails various targets that need to be fixed first.

Differential Revision: https://reviews.llvm.org/D32570

llvm-svn: 301851
2017-05-01 22:32:25 +00:00
Davide Italiano 2dfd46bf08 [NewGVN] Don't derive incorrect implications.
In the testcase attached,  we believe %tmp1 implies %tmp4.
where:
  br i1 %tmp1, label %bb2, label %bb7
  br i1 %tmp4, label %bb5, label %bb7

because Wwhile looking at PredicateInfo stuffs we end up calling
isImpliedTrueByMatchingCmp() with the arguments backwards.

Differential Revision:  https://reviews.llvm.org/D32718

llvm-svn: 301849
2017-05-01 22:26:28 +00:00
Sanjay Patel 59d0aeaafe [InstCombine] check one-use before applying DeMorgan nor/nand folds
If we have ~(~X & Y), it only makes sense to transform it to (X | ~Y) when we do not need 
the intermediate (~X & Y) value. In that case, we would need an extra instruction to 
generate ~Y + 'or' (as shown in the test changes).

It's ok if we have multiple uses of ~X or Y, however. In those cases, we may not reduce the
instruction count or critical path, but we might improve throughput because we can generate 
~X and ~Y in parallel. Whether that actually makes perf sense or not for a target is something 
we can't answer in IR.

Differential Revision: https://reviews.llvm.org/D32703

llvm-svn: 301848
2017-05-01 22:25:42 +00:00
Greg Clayton 48432cfbeb Adds initial llvm-dwarfdump --verify support with unit tests.
lldb-dwarfdump gets a new "--verify" option that will verify a single file's DWARF debug info and will print out any errors that it finds. It will return an non-zero exit status if verification fails, and a zero exit status if verification succeeds. Adding the --quiet option will suppress any output the STDOUT or STDERR.

The first part of the verify does the following:

- verifies that all CU relative references (DW_FORM_ref1, DW_FORM_ref2, DW_FORM_ref4, DW_FORM_ref8, DW_FORM_ref_udata) have valid CU offsets
- verifies that all DW_FORM_ref_addr references have valid .debug_info offsets
- verifies that all DW_AT_ranges attributes have valid .debug_ranges offsets
- verifies that all DW_AT_stmt_list attributes have valid .debug_line offsets
- verifies that all DW_FORM_strp attributes have valid .debug_str offsets

Unit tests were added for each of the above cases.

Differential Revision: https://reviews.llvm.org/D32707

llvm-svn: 301844
2017-05-01 22:07:02 +00:00
Peter Collingbourne 74d22dd7dc Bitcode: Make the summary reader responsible for merging. NFCI.
This is to prepare for an upcoming change which uses pointers instead of
GUIDs to represent references.

Differential Revision: https://reviews.llvm.org/D32469

llvm-svn: 301843
2017-05-01 22:04:36 +00:00
Quentin Colombet cdf8c81127 [AArch64] Move GISel accessor initialization from TargetMachine to Subtarget.
NFC

llvm-svn: 301841
2017-05-01 21:53:19 +00:00
Peter Collingbourne a992f53099 IPO: Add missing build dep.
llvm-svn: 301835
2017-05-01 20:57:20 +00:00
Simon Pilgrim ab1a82764f [X86][AVX] Rename LowerVectorBroadcast to lowerBuildVectorAsBroadcast. NFCI.
Since the shuffle refactor, this is only used during BUILD_VECTOR lowering.

llvm-svn: 301834
2017-05-01 20:56:35 +00:00
Peter Collingbourne c15d60b772 Object: Remove ModuleSummaryIndexObjectFile class.
Differential Revision: https://reviews.llvm.org/D32195

llvm-svn: 301832
2017-05-01 20:42:32 +00:00
Krzysztof Parzyszek 4a1c3f0aaa [Hexagon] Replace CVI_VM_CUR_LD type with CVI_VM_LD
A .cur instruction can be identified by checking isCVINew() && mayLoad().

Patch by Colin LeMahieu.

llvm-svn: 301829
2017-05-01 20:16:35 +00:00
Krzysztof Parzyszek 55db483a46 [Hexagon] Improving error reporting for writing to read only registers
Patch by Colin LeMahieu.

llvm-svn: 301828
2017-05-01 20:10:41 +00:00
Krzysztof Parzyszek e96d27a997 [Hexagon] Give better error messages for solo instruction errors
Patch by Colin LeMahieu.

llvm-svn: 301827
2017-05-01 20:06:01 +00:00
Krzysztof Parzyszek e12d1e70cb [Hexagon] Improve shuffle error reporting
Patch by Colin LeMahieu.

llvm-svn: 301823
2017-05-01 19:41:43 +00:00
Tim Northover 9bb6931c25 X86: initialize a few subtarget variables.
Otherwise an indeterminate value gets read, causing a bunch of UBSan failures.

llvm-svn: 301819
2017-05-01 17:50:15 +00:00
Xin Tong a4b9b9f42a Take indirect branch into account as well when folding.
We may not be able to rewrite indirect branch target, but we also want to take it into
account when folding, i.e. if it and all its successor's predecessors go to the same
destination, we can fold, i.e. no need to thread.

llvm-svn: 301816
2017-05-01 17:15:37 +00:00
Sanjoy Das f1c0eafd5b Add a new WeakVH value handle; NFC
This relands r301425.

llvm-svn: 301813
2017-05-01 17:07:54 +00:00
Sanjoy Das e6bca0eecb Rename WeakVH to WeakTrackingVH; NFC
This relands r301424.

llvm-svn: 301812
2017-05-01 17:07:49 +00:00
Derek Schuff 2fa3604831 [WebAssembly] Fix use of SDNodeFlags after API change in r301803
llvm-svn: 301811
2017-05-01 16:49:39 +00:00
Zachary Turner 7cc13e557c [PDB/CodeView] Rename some classes.
In preparation for introducing writing capabilities for each of
these classes, I would like to adopt a Foo / FooRef naming
convention, where Foo indicates that the class can manipulate and
serialize Foos, and FooRef indicates that it is an immutable view of
an existing Foo.  In other words, Foo is a writer and FooRef is a
reader.  This patch names some existing readers to conform to the
FooRef convention, while offering no functional change.

llvm-svn: 301810
2017-05-01 16:46:39 +00:00
Sanjoy Das 8a6238201f Emulate TrackingVH using WeakVH
Summary:
This frees up one slot in the HandleBaseKind enum, which I will use
later to add a new kind of value handle.  The size of the
HandleBaseKind enum is important because we store a HandleBaseKind in
the low two bits of a (in the worst case) 4 byte aligned pointer.

Reviewers: davide, chandlerc

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D32634

llvm-svn: 301809
2017-05-01 16:28:58 +00:00
Xin Tong 99dce428bc [JumpThread] Add some assertions for expected ConstantInt/BlockAddress
llvm-svn: 301808
2017-05-01 16:19:59 +00:00
Gabor Horvath 43b72d538f Remove unnecessary conditions as suggested by clang-tidy. NFC
Patch by: Gergely Angeli!

Differential Revision: https://reviews.llvm.org/D31936

llvm-svn: 301807
2017-05-01 16:18:42 +00:00
Craig Topper 6b1b630a98 [SelectionDAG] Use known ones to provide a better bound for the known zeros for CTTZ/CTLZ operations.
This is the SelectionDAG version of D32521. If know where at least one 1 is located in the input to these intrinsics we can place an upper bound on the number of bits needed to represent the count and thus increase the number of known zeros in the output.

I think we can also refine this further for CTTZ_UNDEF/CTLZ_UNDEF by assuming that the answer will never be BitWidth. I've left this out for now because it caused other test failures across multiple targets. Usually because of turning ADD into OR based on this new information.

I'll fix CTPOP in a future patch.

Differential Revision: https://reviews.llvm.org/D32692

llvm-svn: 301806
2017-05-01 16:08:06 +00:00
Xin Tong 21f8ac235e [JumpThread] Do RAUW in case Cond folds to a constant in the CFG
Summary: [JumpThread] Do RAUW in case Cond folds to a constant in the CFG

Reviewers: sanjoy

Reviewed By: sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32407

llvm-svn: 301804
2017-05-01 15:34:17 +00:00
Amara Emerson d28f0cd448 Generalize the specialized flag-carrying SDNodes by moving flags into SDNode.
This removes BinaryWithFlagsSDNode, and flags are now all passed by value.

Differential Revision: https://reviews.llvm.org/D32527

llvm-svn: 301803
2017-05-01 15:17:51 +00:00
Michael Zuckerman 56704618aa [LLVM][inline-asm] Altmacro absolute expression '%' feature
In this patch, I introduce a new alt macro feature.
This feature adds meaning for the % when using it as a prefix to the calling macro arguments.

In the altmacro mode, the percent sign '%' before an absolute expression convert the expression first to a string. 
As described in the https://sourceware.org/binutils/docs-2.27/as/Altmacro.html
"Expression results as strings
You can write `%expr' to evaluate the expression expr and use the result as a string."

expression assumptions:

1. '%' can only evaluate an absolute expression.
2. Altmacro '%' must be the first character of the evaluated expression.
3. If no '%' is located before the expression, a regular module operation is expected.
4. The result of Absolute Expressions can be only integer.

Differential Revision: https://reviews.llvm.org/D32526

llvm-svn: 301797
2017-05-01 13:20:12 +00:00
Dylan McKay 59e7fe3da8 [AVR] Implement non-constant bit rotations
This lets us do bit rotations of variable amount.

llvm-svn: 301794
2017-05-01 09:48:55 +00:00
Igor Breger 2452ef0ea2 [GlobalISel][X86] Prioritize Tablegen-erated instruction selection. NFC
Summary:
Prioritizes Tablegen-erated instruction selection over C++ instruction selection.
Remove G_ADD/G_SUB C++ selection - implemented by Tablegen.

Reviewers: dsanders, zvi, guyblank

Reviewed By: guyblank

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D32677

llvm-svn: 301792
2017-05-01 07:06:08 +00:00
Igor Breger c08a783521 [GlobalISel][X86] G_SEXT/G_ZEXT support.
Reviewers: zvi, guyblank

Reviewed By: zvi

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D32591

llvm-svn: 301790
2017-05-01 06:30:16 +00:00
Igor Breger a9edb88d46 [GlobalISel][X86] G_LOAD/G_STORE pointer selection support.
Summary: [GlobalISel][X86] G_LOAD/G_STORE pointer selection support.

Reviewers: zvi, guyblank

Reviewed By: zvi, guyblank

Subscribers: dberris, rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D32217

llvm-svn: 301788
2017-05-01 06:08:32 +00:00
Dylan McKay 2e8718bcbb [AVR] Fix a bug so that we now emit R_AVR_16 fixups with the correct offset
Before this, the LDS/STS instructions would have their opcodes
overwritten while linking.

llvm-svn: 301782
2017-04-30 23:33:52 +00:00
Sanjay Patel ad13826aea [DAGCombiner] shrink/widen a vselect to match its condition operand size (PR14657)
We discussed shrinking/widening of selects in IR in D26556, and I'll try to get back to that
patch eventually. But I'm hoping that this transform is less iffy in the DAG where we can check
legality of the select that we want to produce.

A few things to note:

1. We can't wait until after legalization and do this generically because (at least in the x86
   tests from PR14657), we'll have PACKSS and bitcasts in the pattern.
2. This might benefit more of the SSE codegen if we lifted the legal-or-custom requirement, but
   that requires a closer look to make sure we don't end up worse.
3. There's a 'vblendv' opportunity that we're missing that results in andn/and/or in some cases. 
   That should be fixed next.
4. I'm assuming that AVX1 offers the worst of all worlds wrt uneven ISA support with multiple 
   legal vector sizes, but if there are other targets like that, we should add more tests.
5. There's a codegen miracle in the multi-BB tests from PR14657 (the gcc auto-vectorization tests):
   despite IR that is terrible for the target, this patch allows us to generate the optimal loop
   code because something post-ISEL is hoisting the splat extends above the vector loops.

Differential Revision: https://reviews.llvm.org/D32620

llvm-svn: 301781
2017-04-30 22:44:51 +00:00
Sanjoy Das 08989c7ecd Rename isKnownNotFullPoison to programUndefinedIfPoison; NFC
Summary:
programUndefinedIfPoison makes more sense, given what the function
does; and I'm about to add a function with a name similar to
isKnownNotFullPoison (so do the rename to avoid confusion).

Reviewers: broune, majnemer, bjarke.roune

Reviewed By: broune

Subscribers: mcrosier, llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D30444

llvm-svn: 301776
2017-04-30 19:41:19 +00:00
Amaury Sechet 8ac81f3924 Do not legalize large add with addc/adde, introduce addcarry and do it with uaddo/addcarry
Summary: As per discution on how to get better codegen an large int legalization, it became clear that using a glue for the carry was preventing several desirable optimizations. Passing the carry down as a value allow for more flexibility.

Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer

Subscribers: igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D29872

llvm-svn: 301775
2017-04-30 19:24:09 +00:00
Craig Topper 778f57b4f1 [APInt] Replace calls to setBits with more specific calls to setBitsFrom and setLowBits where possible.
llvm-svn: 301768
2017-04-30 07:44:58 +00:00
Craig Topper d503644a4a [X86] Clear KnownBits instead of reconstructing it. NFC
llvm-svn: 301767
2017-04-30 07:44:55 +00:00
Zvi Rackover 9d8cd821e6 InstructionSimplify: Canonicalize shuffle operands. NFC-ish.
Summary:
 Apply canonicalization rules:
    1. Input vectors with no elements selected from can be replaced with undef.
    2. If only one input vector is constant it shall be the second one.

This allows constant-folding to cover more ad-hoc simplifications that
were in place and avoid duplication for RHS and LHS checks.

There are more rules we may want to add in the future when we see a
justification. e.g. mask elements that select undef elements can be
replaced with undef.

Reviewers: spatel, RKSimon, andreadb, davide

Reviewed By: spatel, RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32338

llvm-svn: 301766
2017-04-30 06:25:04 +00:00
Zvi Rackover 0411e46fff InstructionSimplify: One getShuffleMask() replacing multiple getMaskValue(). NFC.
Summary: This is a preparatory step for D32338.

Reviewers: RKSimon, spatel

Reviewed By: RKSimon, spatel

Subscribers: spatel, llvm-commits

Differential Revision: https://reviews.llvm.org/D32388

llvm-svn: 301765
2017-04-30 06:10:54 +00:00
Zvi Rackover 4086e13e0d InstructionSimplify: Simplify a shuffle with a undef mask to undef
Summary:
Following the discussion in pr32486, adding the simplification:
 shuffle %x, %y, undef -> undef

Reviewers: spatel, RKSimon, andreadb, davide

Reviewed By: spatel

Subscribers: jroelofs, davide, llvm-commits

Differential Revision: https://reviews.llvm.org/D32293

llvm-svn: 301764
2017-04-30 06:06:26 +00:00
Simon Atanasyan 3979f43813 [mips] Emit R_MICROMIPS_TLS_GOTTPREL relocation for %gottprel in case of microMIPS
In case of microMIPS mode %gottprel operator should emit microMIPS
relocation R_MICROMIPS_TLS_GOTTPREL, not R_MIPS_TLS_GOTTPREL.

Differential Revision: http://reviews.llvm.org/D32617

llvm-svn: 301763
2017-04-30 04:27:23 +00:00
Craig Topper 866165309f [ConstantRange] Fix a couple cases where we were possibly throwing away an APInt allocation we could reuse. NFC
This uses setAllBits to replace getMaxValue and operator=(uint64_t) instead of constructing an APInt from uint64_t.

llvm-svn: 301761
2017-04-30 00:44:05 +00:00
Dimitry Andric c12f10fe19 Include <cstdio> in PrettyStackTrace.cpp, since it uses vsnprintf(3).
llvm-svn: 301760
2017-04-29 23:45:30 +00:00
Craig Topper 8c5c6fe48e [ConstantRange] Use APInt::getOneBitSet to shorten some code. NFC
llvm-svn: 301753
2017-04-29 17:59:41 +00:00
Craig Topper 335597f31b [ConstantRange] Replace getMaxValue+zext with getLowBitsSet. Replace zero-init+setBit with getOneBitSet. NFC
llvm-svn: 301752
2017-04-29 17:46:13 +00:00
Craig Topper 685327dd99 [ConstantRange] Use APInt::operator-= to remove temporary APInts.
llvm-svn: 301751
2017-04-29 17:46:11 +00:00
Daniel Sanders e9fdba39e0 [globalisel][tablegen] Compute available feature bits correctly.
Summary:
Predicate<> now has a field to indicate how often it must be recomputed.
Currently, there are two frequencies, per-module (RecomputePerFunction==0)
and per-function (RecomputePerFunction==1). Per-function predicates are
currently recomputed more frequently than necessary since the only predicate
in this category is cheap to test. Per-module predicates are now computed in
getSubtargetImpl() while per-function predicates are computed in selectImpl().

Tablegen now manages the PredicateBitset internally. It should only be
necessary to add the required includes.

Also fixed a problem revealed by the test case where
constrainSelectedInstRegOperands() would attempt to tie operands that
BuildMI had already tied.

Reviewers: ab, qcolombet, t.p.northover, rovka, aditya_nandakumar

Reviewed By: rovka

Subscribers: kristof.beyls, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D32491

llvm-svn: 301750
2017-04-29 17:30:09 +00:00
Craig Topper ca48af3c87 [KnownBits] Add methods for determining if the known bits represent a negative/nonnegative number and add methods for changing the negative/nonnegative state
Summary: This patch adds isNegative, isNonNegative for querying whether the sign bit is known. It also adds makeNegative and makeNonNegative for controlling the sign bit.

Reviewers: RKSimon, spatel, davide

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32651

llvm-svn: 301747
2017-04-29 16:43:11 +00:00
Simon Dardis 9d580e8528 [mips][FastISel] Fix a nullptr deference.
r301392 introduced a potential nullptr deference causing compilation
failures.

llvm-svn: 301746
2017-04-29 16:31:40 +00:00
Craig Topper 8fb5a14cad [ConstantRange] Use ternary operator instead of 'if' to avoid copying an APInt and then possibly copying over it.
llvm-svn: 301741
2017-04-29 07:24:13 +00:00
Craig Topper b792025bed [ConstantRange] Add std::move to a bunch of places that pass local APInts to ConstantRange constructor.
The ConstantRange constructor takes APInt by value so without these moves we are making copies.

llvm-svn: 301740
2017-04-29 06:40:47 +00:00
Craig Topper 6fe50f84c4 [ConstantRange] Remove a temporary APInt I meant to delete in r300621. NFC
llvm-svn: 301737
2017-04-29 05:24:34 +00:00
Craig Topper ee4f22dc2d [ConstantRange] Improve the efficiency of one of the ConstantRange constructors.
We were default constructing the Lower/Upper APInts. Then creating min or max value, then doing a move assignment to Lower and copy assignment to upper. The copy assignment operator in particular has an out of line function call that has to examine whether or not a previous allocation exists that can be reused which of course it can't in this case.

The new code creates the min/max value first, move constructs Lower from it then copy constructs Upper from Lower.

This also seems to have convinced a self host build that this constructor can be inlined more readily into other methods in ConstantRange.

llvm-svn: 301736
2017-04-29 05:08:52 +00:00
Matt Arsenault 2a80369ae4 AMDGPU: Fix copies from physical registers in SIFixSGPRCopies
This would assert when there were multiple defs of
a physical register.

We just need to move all of the users of it.

llvm-svn: 301730
2017-04-29 01:26:34 +00:00
Zachary Turner 5b6e4e0aed [llvm-pdbdump] Abstract some of the YAML/Raw printing code.
There is a lot of duplicate code for printing line info between
YAML and the raw output printer.  This introduces a base class
that can be shared between the two, and makes some minor
cleanups in the process.

llvm-svn: 301728
2017-04-29 01:13:21 +00:00
Akira Hatanaka 6fdcb3c2ce [ObjCARC] Do not move a release between a call and a
retainAutoreleasedReturnValue that retains the returned value.

This commit fixes a bug in ARC optimizer where it moves a release
between a call and a retainAutoreleasedReturnValue, causing the returned
object to be released before the retainAutoreleasedReturnValue can
retain it.

This commit accomplishes that by doing a lookahead and checking whether
the call prevents the release from moving upwards. In the long term, we
should treat the region between the retainAutoreleasedReturnValue and
the call as a critical section and disallow moving anything there
(possibly using operand bundles).

rdar://problem/20449878

llvm-svn: 301724
2017-04-29 00:23:11 +00:00
Davide Italiano 0aaa96a07b [LoopUnswitch] Make DEBUG output more readable (part 2).
I fixed my miscompile in r301722 and I hope I don't have to take
a look at this code again now that Chandler has a new LoopUnswitch
pass, but maybe this could be of use for somebody else in the
meanwhile.

llvm-svn: 301723
2017-04-29 00:18:26 +00:00
Davide Italiano 534e314356 [LoopUnswitch] Don't remove instructions with side effects.
This fixes PR32818.

Differential Revision:  https://reviews.llvm.org/D32664

llvm-svn: 301722
2017-04-29 00:12:18 +00:00
Duncan P. N. Exon Smith 05531ca19b Fuzzer: Mark test/cxxstring.test UNSUPPORTED: windows
This has been mysteriously failing since r301593, which cleaned up the
types of things like size_t and SIZE_MAX for freestanding targets.  Reid
and Kostya suggested marking it as UNSUPPORTED on windows, given that no
one has been able to reproduce locally.

llvm-svn: 301719
2017-04-28 23:59:53 +00:00
Zachary Turner 05bd9f3713 [llvm-readobj] Use LLVMDebugInfoCodeView to parse line tables.
The llvm-readobj parsing code currently exists in our CodeView
library, so we use that to parse instead of re-writing the logic
in the tool.

llvm-svn: 301718
2017-04-28 23:41:36 +00:00
Hans Wennborg 513dc805eb Remove set but unused variable in BitcodeReader.cpp. NFC.
llvm-svn: 301713
2017-04-28 23:11:16 +00:00
Hans Wennborg 0f88d863b4 Revert r301697 "[IR] Make add/remove Attributes use AttrBuilder instead of AttributeList"
This broke the Clang build. (Clang-side patch missing?)

Original commit message:

> [IR] Make add/remove Attributes use AttrBuilder instead of
> AttributeList
>
> This change cleans up call sites and avoids creating temporary
> AttributeList objects.
>
> NFC

llvm-svn: 301712
2017-04-28 23:01:32 +00:00
Matt Arsenault e0f9e984fd InferAddressSpaces: Search constant expressions for addrspacecasts
These are pretty common when using local memory, and the 64-bit generic
addressing is much more expensive to compute.

llvm-svn: 301711
2017-04-28 22:52:41 +00:00
Adrian Prantl fed4f399d3 Remove line and file from DINamespace.
Fixes the issue highlighted in
http://lists.llvm.org/pipermail/cfe-dev/2014-June/037500.html.

The DW_AT_decl_file and DW_AT_decl_line attributes on namespaces can
prevent LLVM from uniquing types that are in the same namespace. They
also don't carry any meaningful information.

rdar://problem/17484998
Differential Revision: https://reviews.llvm.org/D32648

llvm-svn: 301706
2017-04-28 22:25:46 +00:00
Matt Arsenault c20ccd2c02 InferAddressSpaces: Avoid looking up deleted values
While looking at pure addressing expressions, it's possible
for the value to appear later in Postorder.

I haven't been able to come up with a testcase where this
exhibits an actual issue, but if you insert a dump before
the value map lookup, a few testcases crash.

llvm-svn: 301705
2017-04-28 22:18:19 +00:00
Matt Arsenault a1e734050c InferAddressSpaces: Infer from just addrspacecasts
Eliminates some more cases where some subset of the addressing
computation remains flat. Some cases with addrspacecasts
in nested constant expressions are still left behind however.

llvm-svn: 301704
2017-04-28 22:18:08 +00:00
Michael Zolotukhin 146a221260 [SCEV] Use early exit in createAddRecFromPHI. NFC.
llvm-svn: 301703
2017-04-28 22:14:27 +00:00
Daniel Berlin 98a1de85cb LoopRotate: Fix use after scope bug
llvm-svn: 301702
2017-04-28 22:05:55 +00:00
Krzysztof Parzyszek 072ddb383c [RDF] Correctly calculate lane masks for defs
llvm-svn: 301700
2017-04-28 21:57:53 +00:00
Krzysztof Parzyszek 2065a2f4e6 Properly handle PHIs with subregisters in UnreachableBlockElim
When a PHI operand has a subregister, create a COPY instead of simply
replacing the PHI output with the input it.

Differential Revision: https://reviews.llvm.org/D32650

llvm-svn: 301699
2017-04-28 21:56:33 +00:00
Krzysztof Parzyszek 0b3acbb1dd [Hexagon] Do not move a block if it is on a fall-through path
llvm-svn: 301698
2017-04-28 21:54:11 +00:00
Reid Kleckner 608c8b63b3 [IR] Make add/remove Attributes use AttrBuilder instead of AttributeList
This change cleans up call sites and avoids creating temporary
AttributeList objects.

NFC

llvm-svn: 301697
2017-04-28 21:48:28 +00:00
Craig Topper e8dea1bc56 [ConstantRange] Use APInt::isNullValue rather than APInt::isMinValue where it would make more sense to thing of 0 as 0 rather than the minimum unsigned value. NFC
llvm-svn: 301696
2017-04-28 21:48:09 +00:00
Craig Topper 72235d084d [ConstantRange] Use const references to prevent a couple APInt copies. NFC
llvm-svn: 301694
2017-04-28 21:48:03 +00:00
Davide Italiano e27cb87754 [LoopUnswitch] Make DEBUG output more readable.
While debugging a miscompile I realized loopunswitch doesn't
put newlines when printing the instruction being replacement.
Ending up with a single line with many instruction replaced isn't
the best for readability and/or mental sanity.

llvm-svn: 301692
2017-04-28 21:30:50 +00:00
Sam Clegg a06de02889 [WebAssembly] Add size of section header to data relocation offsets.
Also, add test for data relocations and fix addend to
be signed.

Subscribers: jfb, dschuff

Differential Revision: https://reviews.llvm.org/D32513

llvm-svn: 301690
2017-04-28 21:22:38 +00:00
Matt Arsenault cf5e7fe358 [ValueTracking] Teach isSafeToSpeculativelyExecute() about the speculatable attribute
Patch by Tom Stellard

llvm-svn: 301688
2017-04-28 21:13:09 +00:00
Sam Clegg ff0730b3fc [WebAssembly] Write initial memory in pages not bytes
Subscribers: jfb, dschuff

Differential Revision: https://reviews.llvm.org/D32660

llvm-svn: 301687
2017-04-28 21:12:09 +00:00
Reid Kleckner 859f8b544a Make getParamAlignment use argument numbers
The method is called "get *Param* Alignment", and is only used for
return values exactly once, so it should take argument indices, not
attribute indices.

Avoids confusing code like:
  IsSwiftError = CS->paramHasAttr(ArgIdx, Attribute::SwiftError);
  Alignment  = CS->getParamAlignment(ArgIdx + 1);

Add getRetAlignment to handle the one case in Value.cpp that wants the
return value alignment.

This is a potentially breaking change for out-of-tree backends that do
their own call lowering.

llvm-svn: 301682
2017-04-28 20:34:27 +00:00
Matthias Braun 91d6a4488d GlobalISel: Followup for r301679
llvm-svn: 301681
2017-04-28 20:31:49 +00:00
Matt Arsenault b19b57ea60 Add speculatable function attribute
This attribute tells the optimizer that the function may be speculated.

Patch by Tom Stellard

llvm-svn: 301680
2017-04-28 20:25:27 +00:00
Matthias Braun 744c215e29 TargetLowering: Add finalizeLowering() function; NFC
Adds a new method finalizeLowering to TargetLoweringBase. This is in
preparation for an upcoming commit.

This function is meant for target specific adjustments to
MachineFrameInfo or register reservations.

Move the freezeRegisters() and the hasCopyImplyingStackAdjustment()
handling into the new function to prove the concept. As an added bonus
GlobalISel no longer missed the hasCopyImplyingStackAdjustment()
handling with this.

Differential Revision: https://reviews.llvm.org/D32621

llvm-svn: 301679
2017-04-28 20:25:05 +00:00
Marek Olsak 2d82590f64 AMDGPU: Add new amdgcn.init.exec intrinsics
v2: More tests, bug fixes, cosmetic changes.

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D31762

llvm-svn: 301677
2017-04-28 20:21:58 +00:00
Daniel Berlin 4d0fe64ae3 Kill off the old SimplifyInstruction API by converting remaining users.
llvm-svn: 301673
2017-04-28 19:55:38 +00:00
Davide Italiano b6681e2b4e [IPO/MergeFunctions] This function is used only under DEBUG().
llvm-svn: 301672
2017-04-28 19:39:45 +00:00
Reid Kleckner 99351967c7 [RS4GC] Simplify attribute handling code NFC
Avoids use of AttributeList::getNumSlots, making it easier to change the
underlying implementation.

llvm-svn: 301671
2017-04-28 19:22:40 +00:00
Reid Kleckner 6652a52e2b Use Argument::hasAttribute and AttributeList::ReturnIndex more
This eliminates many extra 'Idx' induction variables in loops over
arguments in CodeGen/ and Target/. It also reduces the number of places
where we assume that ReturnIndex is 0 and that we should add one to
argument numbers to get the corresponding attribute list index.

NFC

llvm-svn: 301666
2017-04-28 18:37:16 +00:00
Adrian Prantl 06d6096edc Cleanup: Use DIExpression::prepend in buildDbgValueForSpill(). (NFC)
llvm-svn: 301665
2017-04-28 18:30:36 +00:00
Reid Kleckner 6a752c4d30 [IR] Delete unused Argument::removeAttr overload
It doesn't make sense to remove an AttributeList from an argument.

llvm-svn: 301663
2017-04-28 17:58:18 +00:00
Adrian Prantl 109b236850 Clean up DIExpression::prependDIExpr a little. (NFC)
llvm-svn: 301662
2017-04-28 17:51:05 +00:00
Peter Collingbourne ba124f9e42 Bitcode: Do not remove empty summary entries when reading a per-module summary.
This became no longer necessary after D19462 landed, and will be incompatible
with an upcoming change to the summary data structures that changes how we
represent references.

llvm-svn: 301660
2017-04-28 17:41:43 +00:00
Craig Topper 24db6b800f [APInt] Add clearSignBit method. Use it and setSignBit in a few places. NFCI
llvm-svn: 301656
2017-04-28 16:58:05 +00:00
Craig Topper 96d6ee8576 [LazyValueInfo] Fix typo in comment. NFC
llvm-svn: 301655
2017-04-28 16:57:59 +00:00
Craig Topper 9eb2d72a1d [ValueTracking] Use APInt::isSubsetOf and APInt::intersects. NFC
llvm-svn: 301654
2017-04-28 16:57:55 +00:00
Alexei Starovoitov f7bd5ebd3b [bpf] add bigendian support to disassembler
. swap 4-bit register encoding, 16-bit offset and 32-bit imm to support big endian archs
. add a test

Reported-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
llvm-svn: 301653
2017-04-28 16:51:01 +00:00
Jun Bum Lim 919f9e8d65 [InlineCost] Improve the cost heuristic for Switch
Summary:
The motivation example is like below which has 13 cases but only 2 distinct targets

```
lor.lhs.false2:                                   ; preds = %if.then
  switch i32 %Status, label %if.then27 [
    i32 -7012, label %if.end35
    i32 -10008, label %if.end35
    i32 -10016, label %if.end35
    i32 15000, label %if.end35
    i32 14013, label %if.end35
    i32 10114, label %if.end35
    i32 10107, label %if.end35
    i32 10105, label %if.end35
    i32 10013, label %if.end35
    i32 10011, label %if.end35
    i32 7008, label %if.end35
    i32 7007, label %if.end35
    i32 5002, label %if.end35
  ]
```
which is compiled into a balanced binary tree like this on AArch64 (similar on X86)

```
.LBB853_9:                              // %lor.lhs.false2
        mov     w8, #10012
        cmp             w19, w8
        b.gt    .LBB853_14
// BB#10:                               // %lor.lhs.false2
        mov     w8, #5001
        cmp             w19, w8
        b.gt    .LBB853_18
// BB#11:                               // %lor.lhs.false2
        mov     w8, #-10016
        cmp             w19, w8
        b.eq    .LBB853_23
// BB#12:                               // %lor.lhs.false2
        mov     w8, #-10008
        cmp             w19, w8
        b.eq    .LBB853_23
// BB#13:                               // %lor.lhs.false2
        mov     w8, #-7012
        cmp             w19, w8
        b.eq    .LBB853_23
        b       .LBB853_3
.LBB853_14:                             // %lor.lhs.false2
        mov     w8, #14012
        cmp             w19, w8
        b.gt    .LBB853_21
// BB#15:                               // %lor.lhs.false2
        mov     w8, #-10105
        add             w8, w19, w8
        cmp             w8, #9          // =9
        b.hi    .LBB853_17
// BB#16:                               // %lor.lhs.false2
        orr     w9, wzr, #0x1
        lsl     w8, w9, w8
        mov     w9, #517
        and             w8, w8, w9
        cbnz    w8, .LBB853_23
.LBB853_17:                             // %lor.lhs.false2
        mov     w8, #10013
        cmp             w19, w8
        b.eq    .LBB853_23
        b       .LBB853_3
.LBB853_18:                             // %lor.lhs.false2
        mov     w8, #-7007
        add             w8, w19, w8
        cmp             w8, #2          // =2
        b.lo    .LBB853_23
// BB#19:                               // %lor.lhs.false2
        mov     w8, #5002
        cmp             w19, w8
        b.eq    .LBB853_23
// BB#20:                               // %lor.lhs.false2
        mov     w8, #10011
        cmp             w19, w8
        b.eq    .LBB853_23
        b       .LBB853_3
.LBB853_21:                             // %lor.lhs.false2
        mov     w8, #14013
        cmp             w19, w8
        b.eq    .LBB853_23
// BB#22:                               // %lor.lhs.false2
        mov     w8, #15000
        cmp             w19, w8
        b.ne    .LBB853_3
```
However, the inline cost model estimates the cost to be linear with the number
of distinct targets and the cost of the above switch is just 2 InstrCosts.
The function containing this switch is then inlined about 900 times.

This change use the general way of switch lowering for the inline heuristic. It
etimate the number of case clusters with the suitability check for a jump table
or bit test. Considering the binary search tree built for the clusters, this
change modifies the model to be linear with the size of the balanced binary
tree. The model is off by default for now :
  -inline-generic-switch-cost=false

This change was originally proposed by Haicheng in D29870.

Reviewers: hans, bmakam, chandlerc, eraman, haicheng, mcrosier

Reviewed By: hans

Subscribers: joerg, aemerson, llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D31085

llvm-svn: 301649
2017-04-28 16:04:03 +00:00
Simon Pilgrim cce5097ce4 Move variable local to where ita used. NFCI.
llvm-svn: 301646
2017-04-28 14:42:15 +00:00
Teresa Johnson 51177295c4 Memory intrinsic value profile optimization: Avoid divide by 0
Summary:
Skip memops if the total value profiled count is 0, we can't correctly
scale up the counts and there is no point anyway.

Reviewers: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32624

llvm-svn: 301645
2017-04-28 14:30:54 +00:00
Simon Pilgrim 7ae9419dc0 [DAGCombiner] Add ComputeNumSignBits vector demanded elements support to ASHR and INSERT_VECTOR_ELT (reapplied)
Reapplied r299221 after fix for nondeterminism in ThinLTO builder (rL301599), with extra check for implicit truncation of inserted element.

llvm-svn: 301644
2017-04-28 13:21:18 +00:00
Diana Picus 6f975692e5 [ARM] GlobalISel: fixup r301632
Actually remove ARMInstructionSelector.h... Forgot to stage the removal
in the previous commit.

llvm-svn: 301633
2017-04-28 09:20:31 +00:00
Diana Picus 674888d84c [ARM] GlobalISel: Get rid of ARMInstructionSelector.h. NFC.
Declare the ARMInstructionSelector in an anonymous namespace, to make it
more in line with the other targets which were migrated to this in
r299637 in order to avoid TableGen'erated headers being included in
non-GlobalISel builds.

llvm-svn: 301632
2017-04-28 09:10:38 +00:00
George Rimar 96a3de2729 [DWARF] - Fix mistype in dump output of pub* tables. NFC.
There was a garbage character in output introduced by myself in
r290040 "[DWARF] - Introduce DWARFDebugPubTable class for dumping pub* sections."

llvm-svn: 301631
2017-04-28 08:54:10 +00:00
Andrew Ng 03e35b6bc0 [DebugInfo][X86] Improve X86 Optimize LEAs handling of debug values.
This is a follow up to the fix in r298360 to improve the handling of debug
values when redundant LEAs are removed. The fix in r298360 effectively
discarded the debug values. This patch now attempts to preserve the debug
values by using the DWARF DW_OP_stack_value operation via prependDIExpr.

Moved functions appendOffset and prependDIExpr from Local.cpp to
DebugInfoMetadata.cpp and made them available as static member functions of
DIExpression.

Differential Revision: https://reviews.llvm.org/D31604

llvm-svn: 301630
2017-04-28 08:44:30 +00:00
Craig Topper 053cf4da9d [WebAssembly] Update calls to computeKnownBits after the changes from r301620.
I didn't realize WebAssembly wasn't a default build target so I missed that changes were needed.

llvm-svn: 301629
2017-04-28 08:15:33 +00:00
Clement Courbet 5f0ab9e51d [X86][NFC] Refactor RepMovsRepeats in preparation for D32481.
Differential Revision: https://reviews.llvm.org/D32583

llvm-svn: 301628
2017-04-28 07:56:31 +00:00
Craig Topper f42b23f7d8 [ValueTracking] Convert computeKnownBitsFromRangeMetadata to use KnownBits struct.
llvm-svn: 301626
2017-04-28 06:28:56 +00:00
Max Kazantsev 531db9a504 [EarlyCSE] Mark the condition of assume intrinsic as true
EarlyCSE should not just ignore assumes. It should use the fact that its condition is true for all dominated instructions.

Reviewers: sanjoy, reames, apilipenko, anna, skatkov

Reviewed By: reames, sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32482

llvm-svn: 301625
2017-04-28 06:25:39 +00:00
Max Kazantsev 0589d9fa0f [EarlyCSE] Remove guards with conditions known to be true
If a condition is calculated only once, and there are multiple guards on this condition, we should be able
to remove all guards dominated by the first of them. This patch allows EarlyCSE to try to find the condition
of a guard among the known values, and if it is true, remove the guard. Otherwise we keep the guard and
mark its condition as 'true' for future consideration.

Reviewers: sanjoy, reames, apilipenko, skatkov, anna, dberlin

Reviewed By: reames, sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32476

llvm-svn: 301623
2017-04-28 06:05:48 +00:00
Craig Topper d0af7e8ab8 [SelectionDAG] Use KnownBits struct in DAG's computeKnownBits and simplifyDemandedBits
This patch replaces the separate APInts for KnownZero/KnownOne with a single KnownBits struct. This is similar to what was done to ValueTracking's version recently.

This is largely a mechanical transformation from KnownZero to Known.Zero.

Differential Revision: https://reviews.llvm.org/D32569

llvm-svn: 301620
2017-04-28 05:31:46 +00:00
Craig Topper 0e03e74e95 [SelectionDAG] Use various APInt methods to reduce temporary APInt creation
This patch uses various APInt methods to reduce the number of temporary APInts. These were all found while working through converting SelectionDAG's computeKnownBits to also use the KnownBits struct recently added to the ValueTracking version.

llvm-svn: 301618
2017-04-28 04:57:59 +00:00
Sanjoy Das 730edccb24 Remove unnecessary semicolon
This shows up as a -Wpendatic error on GCC.

llvm-svn: 301616
2017-04-28 04:49:32 +00:00
Sanjoy Das ba0daee6b2 [StackMaps] Increase the size of the "location size" field
Summary:
In some cases LLVM (especially the SLP vectorizer) will create vectors
that are 256 bytes (or larger).  Given that this is intentional[0] is
likely to get more common, this patch updates the StackMap binary
format to deal with the spill locations for said vectors.

This change also bumps the stack map version from 2 to 3.

[0]: https://reviews.llvm.org/D32533#738350

Reviewers: reames, kavon, skatkov, javed.absar

Subscribers: mcrosier, nemanjai, llvm-commits

Differential Revision: https://reviews.llvm.org/D32629

llvm-svn: 301615
2017-04-28 04:48:42 +00:00
Craig Topper 24e71017aa [APInt] Use inplace shift methods where possible. NFCI
llvm-svn: 301612
2017-04-28 03:36:24 +00:00
Zachary Turner 7159ab95c7 [llvm-pdbdump] Allow printing only a portion of a stream.
When dumping raw data from a stream, you might know the offset
of a certain record you're interested in, as well as how long
that record is.  Previously, you had to dump the entire stream
and wade through the bytes to find the interesting record.

This patch allows you to specify an offset and length on the
command line, and it will only dump the requested range.

llvm-svn: 301607
2017-04-28 00:43:38 +00:00
Davide Italiano 81a26da1e5 [SROA] Fix nondeterminism exposed by Simon's r299221.
Use a SmallSetSetVector instead of a SmallPtrSet as iterating
over the latter is not stable ('<' relies on addresses).

llvm-svn: 301599
2017-04-27 23:09:01 +00:00
Sanjay Patel 73d8c43da8 [InstCombine] fix matcher to bind to specific operand (PR32830)
Matching any random value would be very wrong:
https://bugs.llvm.org/show_bug.cgi?id=32830

llvm-svn: 301594
2017-04-27 21:55:03 +00:00
Evgeniy Stepanov 964f4663c4 [asan] Fix dead stripping of globals on Linux.
Use a combination of !associated, comdat, @llvm.compiler.used and
custom sections to allow dead stripping of globals and their asan
metadata. Sometimes.

Currently this works on LLD, which supports SHF_LINK_ORDER with
sh_link pointing to the associated section.

This also works on BFD, which seems to treat comdats as
all-or-nothing with respect to linker GC. There is a weird quirk
where the "first" global in each link is never GC-ed because of the
section symbols.

At this moment it does not work on Gold (as in the globals are never
stripped).

This is a second re-land of r298158. This time, this feature is
limited to -fdata-sections builds.

llvm-svn: 301587
2017-04-27 20:27:27 +00:00
Evgeniy Stepanov 716f0ff222 [asan] Put ctor/dtor in comdat.
When possible, put ASan ctor/dtor in comdat.

The only reason not to is global registration, which can be
TU-specific. This is not the case when there are no instrumented
globals. This is also limited to ELF targets, because MachO does
not have comdat, and COFF linkers may GC comdat constructors.

The benefit of this is a lot less __asan_init() calls: one per DSO
instead of one per TU. It's also necessary for the upcoming
gc-sections-for-globals change on Linux, where multiple references to
section start symbols trigger quadratic behaviour in gold linker.

This is a second re-land of r298756. This time with a flag to disable
the whole thing to avoid a bug in the gold linker:
  https://sourceware.org/bugzilla/show_bug.cgi?id=19002

llvm-svn: 301586
2017-04-27 20:27:23 +00:00
Chandler Carruth 1353f9a48b [PM/LoopUnswitch] Introduce a new, simpler loop unswitch pass.
Currently, this pass only focuses on *trivial* loop unswitching. At that
reduced problem it remains significantly better than the current loop
unswitch:
- Old pass is worse than cubic complexity. New pass is (I think) linear.
- New pass is much simpler in its design by focusing on full unswitching. (See
  below for details on this).
- New pass doesn't carry state for thresholds between pass iterations.
- New pass doesn't carry state for correctness (both miscompile and
  infloop) between pass iterations.
- New pass produces substantially better code after unswitching.
- New pass can handle more trivial unswitch cases.
- New pass doesn't recompute the dominator tree for the entire function
  and instead incrementally updates it.

I've ported all of the trivial unswitching test cases from the old pass
to the new one to make sure that major functionality isn't lost in the
process. For several of the test cases I've worked to improve the
precision and rigor of the CHECKs, but for many I've just updated them
to handle the new IR produced.

My initial motivation was the fact that the old pass carried state in
very unreliable ways between pass iterations, and these mechansims were
incompatible with the new pass manager. However, I discovered many more
improvements to make along the way.

This pass makes two very significant assumptions that enable most of these
improvements:

1) Focus on *full* unswitching -- that is, completely removing whatever
   control flow construct is being unswitched from the loop. In the case
   of trivial unswitching, this means removing the trivial (exiting)
   edge. In non-trivial unswitching, this means removing the branch or
   switch itself. This is in opposition to *partial* unswitching where
   some part of the unswitched control flow remains in the loop. Partial
   unswitching only really applies to switches and to folded branches.
   These are very similar to full unrolling and partial unrolling. The
   full form is an effective canonicalization, the partial form needs
   a complex cost model, cannot be iterated, isn't canonicalizing, and
   should be a separate pass that runs very late (much like unrolling).

2) Leverage LLVM's Loop machinery to the fullest. The original unswitch
   dates from a time when a great deal of LLVM's loop infrastructure was
   missing, ineffective, and/or unreliable. As a consequence, a lot of
   complexity was added which we no longer need.

With these two overarching principles, I think we can build a fast and
effective unswitcher that fits in well in the new PM and in the
canonicalization pipeline. Some of the remaining functionality around
partial unswitching may not be relevant today (not many test cases or
benchmarks I can find) but if they are I'd like to add support for them
as a separate layer that runs very late in the pipeline.

Purely to make reviewing and introducing this code more manageable, I've
split this into first a trivial-unswitch-only pass and in the next patch
I'll add support for full non-trivial unswitching against a *fixed*
threshold, exactly like full unrolling. I even plan to re-use the
unrolling thresholds, as these are incredibly similar cost tradeoffs:
we're cloning a loop body in order to end up with simplified control
flow. We should only do that when the total growth is reasonably small.

One of the biggest changes with this pass compared to the previous one
is that previously, each individual trivial exiting edge from a switch
was unswitched separately as a branch. Now, we unswitch the entire
switch at once, with cases going to the various destinations. This lets
us unswitch multiple exiting edges in a single operation and also avoids
numerous extremely bad behaviors, where we would introduce 1000s of
branches to test for thousands of possible values, all of which would
take the exact same exit path bypassing the loop. Now we will use
a switch with 1000s of cases that can be efficiently lowered into
a jumptable. This avoids relying on somehow forming a switch out of the
branches or getting horrible code if that fails for any reason.

Another significant change is that this pass actively updates the CFG
based on unswitching. For trivial unswitching, this is actually very
easy because of the definition of loop simplified form. Doing this makes
the code coming out of loop unswitch dramatically more friendly. We
still should run loop-simplifycfg (at the least) after this to clean up,
but it will have to do a lot less work.

Finally, this pass makes much fewer attempts to simplify instructions
based on the unswitch. Something like loop-instsimplify, instcombine, or
GVN can be used to do increasingly powerful simplifications based on the
now dominating predicate. The old simplifications are things that
something like loop-instsimplify should get today or a very, very basic
loop-instcombine could get. Keeping that logic separate is a big
simplifying technique.

Most of the code in this pass that isn't in the old one has to do with
achieving specific goals:
- Updating the dominator tree as we go
- Unswitching all cases in a switch in a single step.

I think it is still shorter than just the trivial unswitching code in
the old pass despite having this functionality.

Differential Revision: https://reviews.llvm.org/D32409

llvm-svn: 301576
2017-04-27 18:45:20 +00:00
Eli Friedman 10ab923b32 [GlobalOpt] Correctly update metadata when localizing a global.
Just calling dropAllReferences leaves pointers to the ConstantExpr
behind, so we would eventually crash with a null pointer dereference.

Differential Revision: https://reviews.llvm.org/D32551

llvm-svn: 301575
2017-04-27 18:39:08 +00:00
Teresa Johnson f9ea176f05 Memory intrinsic value profile optimization: Improve debug output (NFC)
Summary:
Misc improvements to debug output. Fix a couple typos and also dump the
value profile before we make any profitability checks.

Reviewers: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32607

llvm-svn: 301574
2017-04-27 18:25:22 +00:00
Sanjoy Das 40c32dd9a0 Use a pointer type for target frame indices during statepoint lowering
Summary:
The type of the target frame index is intptr, not the type of the value we're
going to store into it.  Without this change we crash in the attached test case
when trying to type-legalize a TargetFrameIndex.

Patchpoint lowering types the target frame index as intptr as well.

Reviewers: reames, bogner, arsenm

Subscribers: arsenm, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D32256

llvm-svn: 301566
2017-04-27 17:17:16 +00:00
Frederich Munch c1db8cf9c1 Refactor DynamicLibrary so searching for a symbol will have a defined order and
libraries are properly unloaded when llvm_shutdown is called.

Summary:
This was mostly affecting usage of the JIT, where storing the library handles in
a set made iteration unordered/undefined. This lead to disagreement between the
JIT and native code as to what the address and implementation of particularly on
Windows with stdlib functions:

JIT: putenv_s("TEST", "VALUE") // called msvcrt.dll, putenv_s
JIT: getenv("TEST") -> "VALUE" // called msvcrt.dll, getenv
Native: getenv("TEST") -> NULL // called ucrt.dll, getenv

Also fixed is the issue of DynamicLibrary::getPermanentLibrary(0,0) on Windows
not giving priority to the process' symbols as it did on Unix.

Reviewers: chapuni, v.g.vassilev, lhames

Reviewed By: lhames

Subscribers: danalbert, srhines, mgorny, vsk, llvm-commits

Differential Revision: https://reviews.llvm.org/D30107

llvm-svn: 301562
2017-04-27 16:55:24 +00:00
Xinliang David Li d21601a929 [PartialInlining]: Improve partial inlining to handle complex conditions
Differential Revision: http://reviews.llvm.org/D32249

llvm-svn: 301561
2017-04-27 16:34:00 +00:00
Zachary Turner c37cb0c6a5 [CodeView] Isolate Debug Info Fragments into standalone classes.
Previously parsing of these were all grouped together into a
single master class that could parse any type of debug info
fragment.

With writing forthcoming, the complexity of each individual
fragment is enough to warrant them having their own classes so
that reading and writing of each fragment type can be grouped
together, but isolated from the code for reading and writing
other fragment types.

In doing so, I found a place where parsing code was duplicated
for the FileChecksums fragment, across llvm-readobj and the
CodeView library, and one of the implementations had a bug.
Now that the codepaths are merged, the bug is resolved.

Differential Revision: https://reviews.llvm.org/D32547

llvm-svn: 301557
2017-04-27 16:12:16 +00:00
Zachary Turner e509447418 [Support] Make BinaryStreamArray extractors stateless.
Instead, we now pass a context memeber through the extraction
process.

llvm-svn: 301556
2017-04-27 16:11:47 +00:00
Zachary Turner 67c5601404 Rename some PDB classes.
We have a lot of very similarly named classes related to
dealing with module debug info.  This patch has NFC, it just
renames some classes to be more descriptive (albeit slightly
more to type).  The mapping from old to new class names is as
follows:

   Old          |        New
ModInfo         | DbiModuleDescriptor
ModuleSubstream | ModuleDebugFragment
ModStream       | ModuleDebugStream

With the corresponding Builder classes renamed accordingly.

Differential Revision: https://reviews.llvm.org/D32506

llvm-svn: 301555
2017-04-27 16:11:19 +00:00
Sam Kolton 5d99386b4d [AMDGPU] DPP: add support for GFX9
Reviewers: artem.tamazov

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D32588

llvm-svn: 301551
2017-04-27 15:42:38 +00:00
Krzysztof Parzyszek 14f10e03e0 Fix typo and place comment close to its target
Patch by Wei-Ren Chen.

Differential Revision: https://reviews.llvm.org/D32594

llvm-svn: 301546
2017-04-27 14:38:21 +00:00
Zoran Jovanovic ffef3e3c6a [mips][microMIPS] Adding code size reduction pass for MicroMIPS
Author: milena.vujosevic.janicic
Reviewers: sdardis
The code implements size reduction pass for MicroMIPS.
Load and store instructions are examined and transformed, if possible.
lw32 instruction is transformed into 16-bit instruction lwsp
sw32 instruction is transformed into 16-bit instruction swsp
Arithmetic instrcutions are examined and transformed, if possible.
addu32 instruction is transformed into 16-bit instruction addu16
subu32 instruction is transformed into 16-bit instruction subu16
Differential Revision: https://reviews.llvm.org/D15144

llvm-svn: 301540
2017-04-27 13:10:48 +00:00
Jonas Paulsson ac4e022d72 [SystemZ] Remove incorrect assert in SystemZTTIImpl
In getCmpSelInstrCost(), CondTy may actually be scalar while ValTy is a
vector when LoopVectorizer is the caller. Therefore the assert that CondTy
must be a vector type if ValTy is was wrong and is now removed.

Review: Ulrich Weigand
llvm-svn: 301533
2017-04-27 11:01:18 +00:00
Diana Picus 4f46be327c [ARM] GlobalISel: Fix extended stack operands
Fix a crash when trying to extend a value passed as a sign- or
zero-extended stack parameter. The cause of the crash was that we were
setting the size of the loaded value to 32 bits, and then tyring to
extend again to 32 bits.

This patch addresses the issue by also introducing a G_TRUNC after the
load. This will leave the unused bits to their original values set by
the caller, while being consistent about the types. For values that are
not extended, we just use a smaller load.

llvm-svn: 301531
2017-04-27 10:23:30 +00:00
George Rimar e6ef4488e1 [llvm-dwarfdump] - Change format for .gdb_index dump.
It is useful to output size of ranges when address ranges
section of .gdb_index is dumped.

It helps to compare outputs produced by different linkers,
for example. In that case address ranges can look very different,
when they are the same at fact. Difference comes from different 
low address because of different address of .text.

Differential revision: https://reviews.llvm.org/D32492

llvm-svn: 301527
2017-04-27 10:00:13 +00:00
Igor Breger 360d0f23ee [GlobalISel][X86] handle not symmetric G_COPY
Summary: handle not symmetric G_COPY

Reviewers: zvi, guyblank

Reviewed By: guyblank

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D32420

llvm-svn: 301523
2017-04-27 08:02:03 +00:00
Clement Courbet 7b0ec39494 [CodeGen][NFC] Rename 'Src' to 'Val'.
'Src' looks like it was borrowed from memcpy, 'Val' makes more sense for
memset and is consistent with naming within the function.

Differential Revision: https://reviews.llvm.org/D32580

llvm-svn: 301521
2017-04-27 07:22:30 +00:00
Sanjoy Das 6f08789d30 Use accessors for ValueHandleBase::V; NFC
This changes code that touches ValueHandleBase::V to go through
getValPtr and (newly added) setValPtr.  This functionality will be
used later, but also seemed like a generally good cleanup.

I also renamed the field to Val, but that's just to make it obvious
that I fixed all the uses.

llvm-svn: 301518
2017-04-27 06:02:18 +00:00
Craig Topper abd6b1dc76 [Metadata] Fix typos in comments. NFC
llvm-svn: 301517
2017-04-27 05:48:29 +00:00
Craig Topper 9474e9b6c8 [InstCombine] Use APInt bit counting methods to avoid a temporary APInt. NFC
llvm-svn: 301516
2017-04-27 04:51:25 +00:00
Konstantin Zhuravlyov 97a663b6a2 AMDGPU: Fix assert in scheduler
Assert is triggered if DBG_VALUE is first instruction in BB

Differential Revision: https://reviews.llvm.org/D32572

llvm-svn: 301511
2017-04-27 03:22:44 +00:00
Chandler Carruth c246a4c973 Disable GVN Hoist due to still more bugs being found in it. There is
also a discussion about exactly what we should do prior to re-enabling
it.

The current bug is http://llvm.org/PR32821 and the discussion about this
is in the review thread for r300200.

llvm-svn: 301505
2017-04-27 00:28:03 +00:00
Adrian Prantl 9d2f019fb6 Turn DISubprogram into a variable-length node.
DISubprogram currently has 10 pointer operands, several of which are
often nullptr. This patch reduces the amount of memory allocated by
DISubprogram by rearranging the operands such that containing type,
template params, and thrown types come last, and are only allocated
when they are non-null (or followed by non-null operands).

This patch also eliminates the entirely unused DisplayName operand.

This saves up to 4 pointer operands per DISubprogram. (I tried
measuring the effect on peak memory usage on an LTO link of an X86
llc, but the results were very noisy).

This reapplies r301498 with an attempted workaround for g++.

Differential Revision: https://reviews.llvm.org/D32560

llvm-svn: 301501
2017-04-26 23:59:52 +00:00
Adrian Prantl aa1d602fbd Revert "Turn DISubprogram into a variable-length node."
This reverts commit r301498 while investigating bot breakage.

llvm-svn: 301499
2017-04-26 23:49:30 +00:00
Adrian Prantl 82c98fcdbf Turn DISubprogram into a variable-length node.
DISubprogram currently has 10 pointer operands, several of which are
often nullptr. This patch reduces the amount of memory allocated by
DISubprogram by rearranging the operands such that containing type,
template params, and thrown types come last, and are only allocated
when they are non-null (or followed by non-null operands).

This patch also eliminates the entirely unused DisplayName operand.

This saves up to 4 pointer operands per DISubprogram. (I tried
measuring the effect on peak memory usage on an LTO link of an X86
llc, but the results were very noisy).

llvm-svn: 301498
2017-04-26 23:44:54 +00:00
Matthias Braun 90834df0b4 Lanai: Remove unnecessary canRealignStack() override; NFC
It was doing the same as the base implementation and was irritating me
when I was searching for backends that have custom behavior for
canRealignStack.

llvm-svn: 301495
2017-04-26 23:37:01 +00:00
Matthias Braun e4e14ae507 MachineFrameInfo: Move implementation to an own file; NFC
Move implementation of the MachineFrameInfo class into
MachineFrameInfo.cpp

llvm-svn: 301494
2017-04-26 23:36:58 +00:00
Rui Ueyama 0fcbb2893e Revert r301487: Replace HashString algorithm with xxHash64
This reverts commit r301487 to make buildbots green.

llvm-svn: 301491
2017-04-26 23:15:10 +00:00