Commit Graph

102528 Commits

Author SHA1 Message Date
Evgeniy Stepanov 9aff829f78 Remap metadata attached to global variables.
Fix for PR32577.
Global variables may have !associated metadata, which includes a reference to another global. It needs remapping.

llvm-svn: 302203
2017-05-04 23:29:39 +00:00
Marek Olsak 584d2c05d4 AMDGPU: GFX9 GS and HS shaders always have the scratch wave offset in SGPR5
Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D32645

llvm-svn: 302200
2017-05-04 22:25:20 +00:00
Aditya Nandakumar 21d8d317d6 [GISel]:Skip legalizing Intermediate inst(with generic types)
During legalization, targets can create Pseudo Instructions with
generic types. We shouldn't try to legalize them.

Reviewed by Quentin, dsanders
https://reviews.llvm.org/D32575

llvm-svn: 302199
2017-05-04 22:00:42 +00:00
Craig Topper 1f673d4450 [JumpThreading] When processing compares, explicitly check that the result type is not a vector rather than check for it being an integer.
Compares always return a scalar integer or vector of integers. isIntegerTy returns false for vectors, but that's not completely obvious. So using isVectorTy is less confusing.

llvm-svn: 302198
2017-05-04 21:45:49 +00:00
Craig Topper 930689ada4 [JumpThreading] Change a dyn_cast that is already protected by an isa check to a static cast. Combine the with another static cast. NFC
Differential Revision: https://reviews.llvm.org/D32874

llvm-svn: 302197
2017-05-04 21:45:45 +00:00
Aditya Nandakumar 117b667bd9 [GISel]: Add support to translate ConstantVectors
Reviewed by Quentin
https://reviews.llvm.org/D32814

llvm-svn: 302196
2017-05-04 21:43:12 +00:00
Craig Topper 5974dadc69 [Float2Int] Remove return of ConstantRange from seen method. Nothing uses it so it just creates and discards a ConstantRange object for no reason.
llvm-svn: 302193
2017-05-04 21:29:45 +00:00
Simon Pilgrim 11a1637a10 Strip trailing whitespace. NFCI.
llvm-svn: 302192
2017-05-04 20:55:16 +00:00
Sanjay Patel e42b4d566e [InstSimplify] add folds for or-of-casted-icmps
The sibling folds for 'and' with casts were added with https://reviews.llvm.org/rL273200.
This is a preliminary step for adding the 'or' variants for the folds added with https://reviews.llvm.org/rL301260.

The reason for the strange form with constant LHS in the 1st test is because there's another missing fold in that
case for the inverted predicate. That should be fixed when we add the ConstantRange functionality for 'or-of-icmps' 
that already exists for 'and-of-icmps'.

I'm hoping to share more code for the and/or cases, so we won't have these differences. This will allow us to remove
code from InstCombine. It's also possible that we can remove some code here in InstSimplify. I think we have some 
duplicated folds because patterns are not matched in a general way.

Differential Revision: https://reviews.llvm.org/D32876

llvm-svn: 302189
2017-05-04 19:51:34 +00:00
Sam Clegg fc5b5cd29e [WebAssembly] Add wasm symbol table support to llvm-objdump
Differential Revision: https://reviews.llvm.org/D32760

llvm-svn: 302185
2017-05-04 19:32:43 +00:00
Krzysztof Parzyszek 038a0546db [PPC] When restoring R30 (PIC base pointer), mark it as <def>
This happened on the PPC32/SVR4 path and was discovered when building
FreeBSD on PPC32. It was a typo-class error in the frame lowering code.

This fixes PR26519.

llvm-svn: 302183
2017-05-04 19:14:54 +00:00
Greg Clayton 48ff66a280 Don't return an invalid line table if the DW_AT_stmt_list value is not in the .debug_line section.
llvm-svn: 302180
2017-05-04 18:29:44 +00:00
Reid Kleckner 6d2ea6ec80 [ms-inline-asm] Use the frontend size only for ambiguous instructions
This avoids problems on code like this:
  char buf[16];
  __asm {
    movups xmm0, [buf]
    mov [buf], eax
  }

The frontend size in this case (1) is wrong, and the register makes the
instruction matching unambiguous. There are also enough bytes available
that we shouldn't complain to the user that they are potentially using
an incorrectly sized instruction to access the variable.

Supersedes D32636 and D26586 and fixes PR28266

llvm-svn: 302179
2017-05-04 18:19:52 +00:00
Sanjay Patel 142cb83768 [InstSimplify] move logic-of-icmps helper functions; NFC
Putting these next to each other should make it easier to see
what's missing from each side. Patch to plug one of those holes
should be posted soon.

llvm-svn: 302178
2017-05-04 18:19:17 +00:00
Peter Collingbourne 9667b91b13 Re-apply r302108, "IR: Use pointers instead of GUIDs to represent edges in the module summary. NFCI."
with a fix for the clang backend.

llvm-svn: 302176
2017-05-04 18:03:25 +00:00
Michael Zolotukhin 3207d30fdd Fix a typo.
llvm-svn: 302175
2017-05-04 17:42:34 +00:00
Davide Italiano 94bf7846fd [NewGVN] Remove unneeded newline and format assertions. NFCI.
llvm-svn: 302173
2017-05-04 17:26:15 +00:00
Craig Topper 93c68e1189 [APInt] Reduce number of allocations involved in multiplying. Reduce worst case multiply size
Currently multiply is implemented in operator*=. Operator* makes a copy and uses operator*= to modify the copy.

Operator*= itself allocates a temporary buffer to hold the multiply result as it computes it. Then copies it to the buffer in *this.

Operator*= attempts to bound the size of the result based on the number of active bits in its inputs. It also has a couple special cases to handle 0 inputs without any memory allocations or multiply operations. The best case is that it calculates a single word regardless of input bit width. The worst case is that it calculates the a 2x input width result and drop the upper bits.

Since operator* uses operator*= it incurs two allocations, one for a copy of *this and one for the temporary allocation. Neither of these allocations are kept after the method operation is done.

The main usage in the backend appears to be ConstantRange::multiply which uses operator* rather than operator*=.

This patch moves the multiply operation to operator* and implements operator*= using it. This avoids the copy in operator*. operator* now allocates a result buffer sized the same width as its inputs no matter what. This buffer will be used as the buffer for the returned APInt. Finally, we reuse tcMultiply to implement the multiply operation. This function is capable of not calculating additional upper words that will be discarded.

This change does lose the special optimizations for the inputs using less words than their size implies. But it also removed the getActiveBits calls from all multiplies. If we think those optimizations are important we could look at providing additional bounds to tcMultiply to limit the computations.

Differential Revision: https://reviews.llvm.org/D32830

llvm-svn: 302171
2017-05-04 17:00:41 +00:00
Easwaran Raman 5e6f9bd4f8 [PM] Add ProfileSummaryAnalysis as a required pass in the new pipeline.
Differential revision: https://reviews.llvm.org/D32768

llvm-svn: 302170
2017-05-04 16:58:45 +00:00
Chad Rosier 84a238dd62 [DAGCombine] Transform (fadd A, (fmul B, -2.0)) -> (fsub A, (fadd B, B)).
Differential Revision: http://reviews.llvm.org/D32596

llvm-svn: 302153
2017-05-04 14:14:44 +00:00
Krzysztof Parzyszek 41b6e14dc5 Refactoring with range-based for, NFC
Patch by Wei-Ren Chen.

Differential Revision: https://reviews.llvm.org/D32682

llvm-svn: 302148
2017-05-04 13:35:17 +00:00
Jonas Paulsson 4fd156261e [SystemZ] Make copyPhysReg() add impl-use operands of super reg.
When a 128 bit COPY is lowered into two instructions, an impl-use operand of
the super-reg should be added to each new instruction in case one of the
sub-regs is undefined.

Review: Ulrich Weigand
llvm-svn: 302146
2017-05-04 13:33:30 +00:00
Eric Liu f6039f255e Revert "IR: Use pointers instead of GUIDs to represent edges in the module summary. NFCI."
This reverts commit r302108. This causes crash in clang bootstrap with LTO.

Contacted the auther in the original commit.

llvm-svn: 302140
2017-05-04 11:49:39 +00:00
Simon Dardis 080d478bd2 [mips][XRay] Use the base version of emitXRayTable
Follow up rL290858 by removing the MIPS specific version of XRayTable
emission in favour of the basic version.

This resolves a buildbot failure where the ELF sections were malformed
causing the linker to reject the object files with xray related sections.

Reviewers: dberris, slthakur

Differential Revision: https://reviews.llvm.org/D32808

llvm-svn: 302138
2017-05-04 11:03:50 +00:00
Martin Storsjo e81233d0ed [ArgPromotion] Fix a truncated variable
This fixes a regression since SVN rev 273808 (which was supposed to
not change functionality).

The regression caused miscompilations (noted in the wild when targeting
AArch64) on platforms with 32 bit long.

Differential Revision: https://reviews.llvm.org/D32850

llvm-svn: 302137
2017-05-04 10:54:35 +00:00
Michael Zuckerman 763e60e1f8 [LLVM][inline-asm][Altmacor] Altmacro string delimiter '<..>'
In this patch, I introduce a new altmacro string delimiter. 
This review is the second review in a series of four reviews.
(one for each altmacro feature: LOCAL, string delimiter, string '!' escape sign and absolute expression as a string '%' ).

In the alternate macro mode, you can delimit strings with matching angle brackets <..> 
when using it as a part of calling macro arguments.

As described in the https://sourceware.org/binutils/docs-2.27/as/Altmacro.html
"<string>
You can delimit strings with matching angle brackets."

assumptions:

1. If an argument begins with '<' and ends with '>'. The argument is considered as a string.
2. Except adding new string mark '<..>', a regular macro behavior is expected.
3. The altmacro cannot affect the regular less/greater behavior.
4. If a comma is present inside an angle brackets it considered as a character and not as a separator.

Differential Revision: https://reviews.llvm.org/D32701

llvm-svn: 302135
2017-05-04 10:37:00 +00:00
Igor Breger 70583606b1 [X86][AVX-512] Allow EVEX encoded instruction selection when available for mul v8i32.
Differential Revision: https://reviews.llvm.org/D32679

llvm-svn: 302127
2017-05-04 07:34:58 +00:00
Sam Parker df337704f0 [ARM] ACLE Chapter 9 intrinsics
Added the integer data processing intrinsics from ACLE v2.1 Chapter 9
but I have missed out the saturation_occurred intrinsics for now. For
the instructions that read and write the GE bits, a chain is included
and the only instruction that reads these flags (sel) is only
selectable via the implemented intrinsic.

Differential Revision: https://reviews.llvm.org/D32281

llvm-svn: 302126
2017-05-04 07:31:28 +00:00
Oren Ben Simhon 51de0330eb [X86] Disabling PLT in Regcall CC Functions
According to psABI, PLT stub clobbers XMM8-XMM15.
In Regcall calling convention those registers are used for passing parameters. 
Thus we need to prevent lazy binding in Regcall.

Differential Revision: https://reviews.llvm.org/D32430

llvm-svn: 302124
2017-05-04 07:22:49 +00:00
Igor Breger c6eccdd5c0 [AVX] Fix vpcmpeqq predicate.
Summary:
Fix vpcmpeqq predicate. AVX512 version of vpcmpeqq is not equivalent to AVX one.
Split from https://reviews.llvm.org/D32679

Reviewers: craig.topper, zvi, aymanmus

Reviewed By: craig.topper

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32786

llvm-svn: 302119
2017-05-04 06:24:52 +00:00
Jonas Paulsson 8bf1fdcc91 Use right function in LoopVectorize.
-    unsigned AS = getMemInstAlignment(I);
+    unsigned AS = getMemInstAddressSpace(I);

Review: Hal Finkel
llvm-svn: 302114
2017-05-04 05:31:56 +00:00
Dean Michael Berris ebdccd0c2d [XRay] Use wordsize-dependent alignment for index
This makes it simpler for the runtime to consistently handle the entries
in the function sled index in both 32 and 64 bit platforms where the
XRay runtime works.

Follow-up on D32693.

llvm-svn: 302111
2017-05-04 04:55:46 +00:00
Craig Topper d4d09fd73d [SelectionDAG] Improve known bits support for CTPOP.
This is based on the same concept from ValueTracking's version of computeKnownBits.

llvm-svn: 302110
2017-05-04 04:33:27 +00:00
Dean Michael Berris bdfe90050b [XRay] Create an Index of sleds per function
Summary:
This change adds a new section to the xray-instrumented binary that
stores an index into ranges of the instrumentation map, where sleds
associated with the same function can be accessed as an array. At
runtime, we can get access to this index by function ID offset allowing
for selective patching and unpatching by function ID.

Each entry in this new section (xray_fn_idx) will include two pointers
indicating the start and one past the end of the sleds associated with
the same function. These entries will be 16 bytes long on x86 and
aarch64. On arm, we align to 16 bytes anyway so the runtime has to take
that into consideration.

__{start,stop}_xray_fn_idx will be the symbols that the runtime will
look for when we implement the selective patching/unpatching by function
id APIs. Because XRay synthesizes the function id's in a monotonically
increasing manner at runtime now, implementations (and users) can use
this table to look up the sleds associated with a specific function.
This is useful in implementations that want to do things like:

  - Implement coverage mode for functions by patching everything
    pre-main, then as functions are encountered, the installed handler
    can unpatch the function that's been encountered after recording
    that it's been called.
  - Do "learning mode", so that the implementation can figure out some
    statistical information about function calls by function id for a
    time being, and then determine which functions are worth
    uninstrumenting at runtime.
  - Do "selective instrumentation" where an implementation can
    specifically instrument only certain function id's at runtime
    (either based on some external data, or through some other
    heuristics) instead of patching all the instrumented functions at
    runtime.

Reviewers: dblaikie, echristo, chandlerc, javed.absar

Subscribers: pelikan, aemerson, kpw, llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D32693

llvm-svn: 302109
2017-05-04 03:37:57 +00:00
Peter Collingbourne 5f85a9deda IR: Use pointers instead of GUIDs to represent edges in the module summary. NFCI.
When profiling a no-op incremental link of Chromium I found that the functions
computeImportForFunction and computeDeadSymbols were consuming roughly 10% of
the profile. The goal of this change is to improve the performance of those
functions by changing the map lookups that they were previously doing into
pointer dereferences.

This is achieved by changing the ValueInfo data structure to be a pointer to
an element of the global value map owned by ModuleSummaryIndex, and changing
reference lists in the GlobalValueSummary to hold ValueInfos instead of GUIDs.
This means that a ValueInfo will take a client directly to the summary list
for a given GUID.

Differential Revision: https://reviews.llvm.org/D32471

llvm-svn: 302108
2017-05-04 03:36:16 +00:00
Dean Michael Berris 22f2bcf4b9 [XRay] Detect loops in functions being lowered
Summary:
This is an implementation of the loop detection logic that XRay needs to
determine whether a function might take time at runtime. Without this
heuristic, XRay will tend to not instrument short functions that have
loops that might have runtime dependent on inputs or external values.

While this implementation doesn't do any further analysis than just
figuring out whether there is a loop in the MachineFunction being
code-gen'ed, we're paving the way for being able to perform more
sophisticated analysis of the function in the future (for example to
determine whether the trip count for the loop might be constant, and
make a decision on that instead). This enables us to cover more
functions with the default heuristics, and potentially identify ones
that have variable runtime latency just by looking for the presence of
loops.

Reviewers: chandlerc, rnk, pelikan

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32274

llvm-svn: 302103
2017-05-04 01:24:26 +00:00
Michael Zolotukhin 37162adf3e [SCEV] createAddRecFromPHI: Optimize for the most common case.
Summary:
The existing implementation creates a symbolic SCEV expression every
time we analyze a phi node and then has to remove it, when the analysis
is finished. This is very expensive, and in most of the cases it's also
unnecessary. According to the data I collected, ~60-70% of analyzed phi
nodes (measured on SPEC) have the following form:
  PN = phi(Start, OP(Self, Constant))
Handling such cases separately significantly speeds this up.

Reviewers: sanjoy, pete

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32663

llvm-svn: 302096
2017-05-03 23:53:38 +00:00
Craig Topper cff357c322 [InstCombine][KnownBits] Use KnownBits better to detect nsw adds
Change checkRippleForAdd from a heuristic to a full check -
if it is provable that the add does not overflow return true, otherwise false.

Patch by Yoav Ben-Shalom

Differential Revision: https://reviews.llvm.org/D32686

llvm-svn: 302093
2017-05-03 23:22:46 +00:00
Reid Kleckner 5c0bdef5aa Mark functions as not having CFI once we finalize an x86 stack frame
We'll set it back to true in emitPrologue if it gets called. It doesn't
get called for naked functions.

Fixes PR32912

llvm-svn: 302092
2017-05-03 23:13:42 +00:00
Craig Topper 8189a87a1e [KnownBits] Add methods for determining if KnownBits is a constant value
This patch adds isConstant and getConstant for determining if KnownBits represents a constant value and to retrieve the value. Use them to simplify code.

Differential Revision: https://reviews.llvm.org/D32785

llvm-svn: 302091
2017-05-03 23:12:29 +00:00
Craig Topper 6b3940a4b3 [ValueTracking] Remove handling for BitWidth being 0 in ComputeSignBit and isKnownNonZero.
I don't believe its possible to have non-zero values here since DataLayout became required. The APInt constructor inside of the KnownBits object will assert if this ever happens.

llvm-svn: 302089
2017-05-03 22:25:19 +00:00
Craig Topper d938fd1397 [KnownBits] Add zext, sext, and trunc methods to KnownBits
This patch adds zext, sext, and trunc methods to KnownBits and uses them where possible.

Differential Revision: https://reviews.llvm.org/D32784

llvm-svn: 302088
2017-05-03 22:07:25 +00:00
Sanjay Patel e1cf61c69f [TargetLowering] use isSubsetOf in SimplifyDemandedBits; NFCI
This is the DAG equivalent of https://reviews.llvm.org/D32255 , 
which will hopefully be committed again. The functionality
(preferring a 'not' op) is already here in the DAG, so this is
just intended to be a clean-up and performance improvement.

llvm-svn: 302087
2017-05-03 21:55:34 +00:00
Paul Robinson ae2e6f37f3 clang-format and restyle DWARFFormValue before working on it. NFC
llvm-svn: 302086
2017-05-03 21:53:21 +00:00
Saleem Abdulrasool 87f033885e DebugInfo: elide type index entries for synthetic types
Compiler emitted synthetic types may not have an associated DIFile
(translation unit).  In such a case, when generating CodeView debug type
information, we would attempt to compute an absolute filepath which
would result in a segfault due to a NULL DIFile*.  If there is no source
file associated with the type, elide the type index entry for the type
and record the type information.  This actually results in higher
fidelity debug information than clang/C2 as of this writing.

Resolves PR32668!

llvm-svn: 302085
2017-05-03 21:39:01 +00:00
Ahmed Bougacha 39949b16ef [AArch64] Fix variable name ambiguity in r302078.
ArchKind is passed to the function, but it's also a type.

llvm-svn: 302081
2017-05-03 20:51:34 +00:00
Xin Tong 46fb813ac3 [TailCallElim] Remove an unused argument. NFCI
llvm-svn: 302080
2017-05-03 20:37:07 +00:00
Ahmed Bougacha 9097967dd9 [AArch64] Make the TargetParser add CPU exts provided by the arch.
Otherwise, each CPU has to manually specify the extensions it supports,
even though they have to be a superset of the base arch extensions.
And when there's redundant data there's stale data, so most of the CPUs
lie about the features they support (almost none lists AEK_FP).

Instead, do the saner thing: add the optional extensions on top of the
base extensions provided by the architecture.

The ARM TargetParser has the same behavior.

Differential Revision: https://reviews.llvm.org/D32780

llvm-svn: 302078
2017-05-03 20:33:58 +00:00
Ahmed Bougacha a1991bdde2 [AArch64] armv8-A doesn't have CRC.
That's only a required extension as of v8.1a.

Remove it from the "generic" CPU as well: it should only support the
base ISA (and binutils agrees).

Also unify the MC tests into crc.s and arm64-crc32.s

llvm-svn: 302077
2017-05-03 20:33:52 +00:00
Vitaly Buka bec6371fec [libFuzzer] exit without running atexit handlers in libfuzzer's crash handler
Summary:
It's not safe to assume that atexit handlers can be run once the app crashed.

Patch by Jochen Eisinger.

Reviewers: kcc, vitalybuka

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32640

llvm-svn: 302076
2017-05-03 20:31:19 +00:00
Krzysztof Parzyszek 2af5037d34 [Hexagon] Use automatically-generated scheduling information for HVX
Patch by Jyotsna Verma.

llvm-svn: 302073
2017-05-03 20:10:36 +00:00
Zachary Turner 4f145b2a59 Remove unused private field.
llvm-svn: 302069
2017-05-03 19:42:06 +00:00
Anna Thomas f475fa3575 Avoid warning of unused variable in release builds. NFC
llvm-svn: 302068
2017-05-03 19:25:04 +00:00
Sanjoy Das 23f314d04f Fix typos in comment
llvm-svn: 302063
2017-05-03 18:29:34 +00:00
Greg Clayton c5b2d561e8 Break verification down into smaller functions to keep code clean.
Adrian requested that we break things down to make things clean in the DWARFVerifier. This patch breaks everything down into nice individual functions and cleans up the code quite a bit and prepares us for the next round of verifiers.

Differential Revision: https://reviews.llvm.org/D32812

llvm-svn: 302062
2017-05-03 18:25:46 +00:00
Anna Thomas d4c0295cc8 Fix PPC64 warning for missing parantheses. NFC.
llvm-svn: 302061
2017-05-03 18:25:43 +00:00
Reid Kleckner a0b45f4bfc [IR] Abstract away ArgNo+1 attribute indexing as much as possible
Summary:
Do three things to help with that:
- Add AttributeList::FirstArgIndex, which is an enumerator currently set
  to 1. It allows us to change the indexing scheme with fewer changes.
- Add addParamAttr/removeParamAttr. This just shortens addAttribute call
  sites that would otherwise need to spell out FirstArgIndex.
- Remove some attribute-specific getters and setters from Function that
  take attribute list indices.  Most of these were only used from
  BuildLibCalls, and doesNotAlias was only used to test or set if the
  return value is malloc-like.

I'm happy to split the patch, but I think they are probably easier to
review when taken together.

This patch should be NFC, but it sets the stage to change the indexing
scheme to this, which is more convenient when indexing into an array:
  0: func attrs
  1: retattrs
  2...: arg attrs

Reviewers: chandlerc, pete, javed.absar

Subscribers: david2050, llvm-commits

Differential Revision: https://reviews.llvm.org/D32811

llvm-svn: 302060
2017-05-03 18:17:31 +00:00
Davide Italiano 2e23ce4cad [CodeView] Remove constructor initialization of a removed field.
I should've staged this with my last commit.

llvm-svn: 302059
2017-05-03 18:02:46 +00:00
Anna Thomas ac0ec2240b [RuntimeLoopUnroller] Add assert that we dont unroll non-rotated loops
Summary:
Cloning basic blocks in the loop for runtime loop unroller depends on loop being
in rotated form (i.e. loop latch target is the exit block).
Assert that this is true, so that callers of runtime loop unroller pass in
canonical loops.
The single caller of this function has that check recently added:
https://reviews.llvm.org/rL301239

Reviewers: davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32801

llvm-svn: 302058
2017-05-03 17:43:59 +00:00
Alexei Starovoitov 4198f2a702 [bpf] add relocation support
. there should be no runtime relocation inside the bpf function.
  . relocation supported here mostly for debugging.
  . a test case is added.

Signed-off-by: Yonghong Song <yhs@fb.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
llvm-svn: 302055
2017-05-03 17:30:56 +00:00
Zachary Turner cf468d86f3 [CodeView] Use actual strings for dealing with checksums and lines.
The raw CodeView format references strings by "offsets", but it's
confusing what table the offset refers to.  In the case of line
number information, it's an offset into a buffer of records,
and an indirection is required to get another offset into a
different table to find the final string.  And in the case of
checksum information, there is no indirection, and the offset
refers directly to the location of the string in another buffer.

This would be less confusing if we always just referred to the
strings by their value, and have the library be smart enough
to correctly resolve the offsets on its own from the right
location.

This patch makes that possible.  When either reading or writing,
all the user deals with are strings, and the library does the
appropriate translations behind the scenes.

llvm-svn: 302053
2017-05-03 17:11:40 +00:00
Zachary Turner 2d5c2cd3ce [llvm-readobj] Update readobj to re-use parsing code.
llvm-readobj hand rolls some CodeView parsing code for string
tables, so this patch updates it to re-use some of the newly
introduced parsing code in LLVMDebugInfoCodeView.

Differential Revision: https://reviews.llvm.org/D32772

llvm-svn: 302052
2017-05-03 17:11:11 +00:00
Simon Pilgrim 03ccf91d85 [X86][LWP] Add stack folding mappings and tests for LWPINS/LWPVAL instructions
llvm-svn: 302049
2017-05-03 16:46:30 +00:00
Simon Pilgrim eada39d050 Silence a 'enum and non-enum used in conditional' warning.
llvm-svn: 302048
2017-05-03 16:43:57 +00:00
Amaury Sechet 666c705953 [DAGCombine] (addcarry (add|uaddo X, Y), 0, Carry) -> (addcarry X, Y, Carry)
Summary: Do the transform when the carry isn't used. It's a pattern exposed when legalizing large integers.

Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32755

llvm-svn: 302047
2017-05-03 16:28:10 +00:00
Greg Clayton b8c162b53c Create DWARFVerifier.cpp and .h and move all DWARF verification code over into it.
Adrian requested we create a DWARFVerifier.cpp file to contain all of the DWARF verification stuff. This change simply moves the functionality over into DWARFVerifier.h and DWARFVerifier.cpp, renames the DWARFVerifier methods to start with lower case, and switches DWARFContext.cpp over to using the new functionality.

Differential Revision: https://reviews.llvm.org/D32809

llvm-svn: 302044
2017-05-03 16:02:29 +00:00
Zachary Turner c504ae3cef Resubmit r301986 and r301987 "Add codeview::StringTable"
This was reverted due to a "missing" file, but in reality
what happened was that I renamed a file, and then due to
a merge conflict both the old file and the new file got
added to the repository.  This led to an unused cpp file
being in the repo and not referenced by any CMakeLists.txt
but #including a .h file that wasn't in the repo.  In an
even more unfortunate coincidence, CMake didn't report the
unused cpp file because it was in a subdirectory of the
folder with the CMakeLists.txt, and not in the same directory
as any CMakeLists.txt.

The presence of the unused file was then breaking certain
tools that determine file lists by globbing rather than
by what's specified in CMakeLists.txt

In any case, the fix is to just remove the unused file from
the patch set.

llvm-svn: 302042
2017-05-03 15:58:37 +00:00
Simon Pilgrim 99b925bdf3 [X86][LWP] Add llvm support for LWP instructions (reapplied).
This patch adds support for the the LightWeight Profiling (LWP) instructions which are available on all AMD Bulldozer class CPUs (bdver1 to bdver4).

Reapplied - this time without changing line endings of existing files.

Differential Revision: https://reviews.llvm.org/D32769

llvm-svn: 302041
2017-05-03 15:51:39 +00:00
Craig Topper b339c6dcc0 [APInt] Give the value union a name so we can remove assumptions on VAL being the larger member
Currently several places assume the VAL member is always at least the same size as pVal. In particular for a memcpy in the move assignment operator. While this is a true assumption, it isn't good practice to assume this.

This patch gives the union a name so we can write the memcpy in terms of the union itself. This also adds a similar memcpy to the move constructor where we previously just copied using VAL directly.

This patch is mostly just a mechanical addition of the U in front of VAL and pVAL everywhere. But several constructors had to be modified since we can't directly initializer a field of named union from the initializer list.

Differential Revision: https://reviews.llvm.org/D30629

llvm-svn: 302040
2017-05-03 15:46:24 +00:00
Greg Clayton 8df55b43e1 Verify that no compile units share the same line table in "llvm-dwarfdump --verify"
Check to make sure no compile units have the same DW_AT_stmt_list values. Report a verification error if they do.

Differential Revision: https://reviews.llvm.org/D32771

llvm-svn: 302039
2017-05-03 15:45:31 +00:00
Simon Pilgrim a271c54324 Revert rL302028 due to accidental line ending changes.
llvm-svn: 302038
2017-05-03 15:42:29 +00:00
Krzysztof Parzyszek d10df49c90 [Hexagon] Handle S2_storerf_io in HexagonInstrInfo
llvm-svn: 302036
2017-05-03 15:36:51 +00:00
Krzysztof Parzyszek 700a5f99c7 [Hexagon] Misc fixes in HexagonInstrInfo, NFC
Formatting changes + remove unused function.

llvm-svn: 302035
2017-05-03 15:34:52 +00:00
Krzysztof Parzyszek 4763c2d999 [Hexagon] Adjust latency between allocframe and the first store on stack
Allocframe and the following stores on the stack have a latency of 2 cycles
when not in the same packet. This happens because R29 is needed early by the
store instruction. Since one of such stores can be packetized along with
allocframe and use old value of R29, we can assign it 0 cycle latency
while leaving latency of other stores to the default value of 2 cycles.

Patch by Jyotsna Verma.

llvm-svn: 302034
2017-05-03 15:33:09 +00:00
Krzysztof Parzyszek 19635bdcbb [Hexagon] Handle J2_jumptpt and J2_jumpfpt in HexagonInstrInfo
llvm-svn: 302033
2017-05-03 15:30:46 +00:00
Krzysztof Parzyszek 0a8043e1b3 [Hexagon] Implement undoing .cur instructions in packetizer
The packetizer needs to convert .cur instruction to its regular form if
the use is not in the same packet as the .cur. The code in the packetizer
handles one type of .cur, which is the vector load case. This patch
updates the packetizer so that it can undo all the .cur instructions.
In the test case, the .cur is the 128B version, but there are also the
post-increment versions.

Patch by Brendon Cahoon.

llvm-svn: 302032
2017-05-03 15:28:56 +00:00
Krzysztof Parzyszek 4be9d92b69 [Hexagon] Add memory operands to a rewritten load
llvm-svn: 302030
2017-05-03 15:26:13 +00:00
Krzysztof Parzyszek 781324fc7e [Hexagon] Reset spill alignment when variable-sized objects are present
llvm-svn: 302029
2017-05-03 15:23:53 +00:00
Simon Pilgrim b2e0464fde [X86][LWP] Add llvm support for LWP instructions.
This patch adds support for the the LightWeight Profiling (LWP) instructions which are available on all AMD Bulldozer class CPUs (bdver1 to bdver4).

Differential Revision: https://reviews.llvm.org/D32769

llvm-svn: 302028
2017-05-03 15:18:34 +00:00
Guy Blank d0baa524d0 [X86][AVX512] remove unnecessary case. NFC
VFPCLASS is for vector types and not scalar, so it cannot get here.

Differential Revision: https://reviews.llvm.org/D32694

llvm-svn: 302023
2017-05-03 13:34:05 +00:00
Jonas Paulsson f40eac5088 [SystemZ] Properly check number of operands in getCmpOpsType()
It is needed to check that the number of operands are 2 when
finding the case of a logic combination, e.g. 'and' of two compares.

Review: Ulrich Weigand
llvm-svn: 302022
2017-05-03 13:33:45 +00:00
Oren Ben Simhon dbd4bba1ec [X86] Support of no_caller_saved_registers attribute
This patch implements the LLVM part for no_caller_saved_registers attribute as appears here: https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=5ed3cc7b66af4758f7849ed6f65f4365be8223be.
In order to implement the attribute, we use the dynamic CSR mechanism to remove returned/passed arguments from the function regmask/CSR list.

Differential Revision: https://reviews.llvm.org/D31876

llvm-svn: 302020
2017-05-03 13:07:19 +00:00
Elad Cohen ef5798acf5 Support arbitrary address space pointers in masked gather/scatter intrinsics.
Fixes PR31789 - When loop-vectorize tries to use these intrinsics for a
non-default address space pointer we fail with a "Calling a function with a
bad singature!" assertion. This patch solves this by adding the 'vector of
pointers' argument as an overloaded type which will determine the address
space.

Differential revision: https://reviews.llvm.org/D31490

llvm-svn: 302018
2017-05-03 12:28:54 +00:00
Dylan McKay 4aedb8a6b7 [AVR] Reserve the Y register in all functions
llvm-svn: 302017
2017-05-03 11:56:01 +00:00
Anna Thomas 53c8d95c85 [Loop Deletion] Delete loops that are never executed
Summary:
Currently, loop deletion deletes loop where the only values
that are used outside the loop are loop-invariant.
This patch adds logic to delete loops where the loop is proven to be
never executed (i.e. the only predecessor of the loop preheader has a
constant conditional branch as terminator, and the preheader is not the
taken target). This will remove loops that become dead after
loop-unswitching generates constant conditional branches.

The next steps are:
1. moving the loop deletion implementation to LoopUtils.
2. Add logic in loop-simplifyCFG which will support changing conditional
constant branches to unconditional branches. If loops become unreachable in this
process, they can be removed using `deleteDeadLoop` function.

Reviewers: chandlerc, efriedma, sanjoy, reames

Reviewed by: sanjoy

Subscribers: mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D32494

llvm-svn: 302015
2017-05-03 11:47:11 +00:00
Dylan McKay c30d85bd8a Revert "[AVR] Enable the frame pointer for all functions"
This reverts commit 358ad02d999e88853d2cfc954bd2f668308a51f7.

llvm-svn: 302014
2017-05-03 11:36:42 +00:00
Alex Lorenz c748d7b57b [Triple] Add a "macos" OS type that acts as a synonym for "macosx"
The "macosx" OS type is still the canonical type. In the future "macos" will
become the canonical OS type (but we will still support "macosx").

rdar://27043820

Differential Revision: https://reviews.llvm.org/D32748

llvm-svn: 302011
2017-05-03 10:42:35 +00:00
Simon Pilgrim 05cfa83843 [X86] Refactored LowerINTRINSIC_W_CHAIN to use a switch statament. NFCI.
Pre-commit as requested in D32769.

llvm-svn: 302010
2017-05-03 10:40:18 +00:00
Daniel Jasper dff096f217 Revert r301986 (and subsequent r301987).
The patch is failing to add StringTableStreamBuilder.h, but that isn't
even discovered because the corresponding StringTableStreamBuilder.cpp
isn't added to any CMakeLists.txt file and thus never built. I think
this patch is just incomplete.

llvm-svn: 302002
2017-05-03 07:29:25 +00:00
Zachary Turner 59e83892e0 Fix use after free in BinaryStream library.
This was reported by the ASAN bot, and it turned out to be
a fairly fundamental problem with the design of VarStreamArray
and the way it passes context information to the extractor.

The fix was cumbersome, and I'm not entirely pleased with it,
so I plan to revisit this design in the future when I'm not
pressed to get the bots green again.  For now, this fixes
the issue by storing the context information by value instead
of by reference, and introduces some impossibly-confusing
template magic to make things "work".

llvm-svn: 301999
2017-05-03 05:34:00 +00:00
Matt Arsenault 6a288c1e32 Replace hardcoded intrinsic list with speculatable attribute.
No change in which intrinsics should be speculated.

llvm-svn: 301995
2017-05-03 02:26:10 +00:00
Peter Collingbourne e95901caa4 Revert r295861, "[ModuleSummaryAnalysis] Don't crash when referencing unnamed globals."
We should always expect values to be named before running the module summary
analysis (see NameAnonGlobals pass), so it's fine if we crash in that case.

llvm-svn: 301991
2017-05-03 00:18:48 +00:00
Tim Shen e59d06fe78 [PowerPC, DAGCombiner] Fold a << (b % (sizeof(a) * 8)) back to a single instruction
Summary:
This is the corresponding llvm change to D28037 to ensure no performance
regression.

Reviewers: bogner, kbarton, hfinkel, iteratee, echristo

Subscribers: nemanjai, llvm-commits

Differential Revision: https://reviews.llvm.org/D28329

llvm-svn: 301990
2017-05-03 00:07:02 +00:00
Zachary Turner 67736594f7 Fix type conversion error.
llvm-svn: 301987
2017-05-02 23:41:51 +00:00
Zachary Turner 7dba20bd2b Make codeview::StringTable.
Previously we had knowledge of how to serialize and deserialize
a string table inside of DebugInfo/PDB, but the string table
that it serializes contains a piece that is actually considered
CodeView and can appear outside of a PDB.  We already have logic
in llvm-readobj and MCCodeView to read and write this format,
so it doesn't make sense to duplicate the logic in DebugInfoPDB
as well.

This patch makes codeview::StringTable (for writing) and
codeview::StringTableRef (for reading), updates DebugInfoPDB
to use these classes for its own writing, and updates llvm-readobj
to additionally use StringTableRef for reading.

It's a bit more difficult to get MCCodeView to use this for
writing, but it's a logical next step.

llvm-svn: 301986
2017-05-02 23:36:17 +00:00
Greg Clayton 6707046f90 Add line table verification to lldb-dwarfdump --verify
This patch verifies the .debug_line:
- verify all addresses in a line table sequence have ascending addresses
- verify that all line table file indexes are valid

Unit tests added for both cases.

Differential Revision: https://reviews.llvm.org/D32765

llvm-svn: 301984
2017-05-02 22:48:52 +00:00
Tim Northover 4a01ffbd6a ARM: avoid handing a deleted node back to TableGen during ISel.
When we replaced the multiplicand the destination node might already exist.
When that happens the original gets CSEd and deleted. However, it's actually
used as the offset so nonsense is produced.

Should fix PR32726.

llvm-svn: 301983
2017-05-02 22:45:19 +00:00
Reid Kleckner ee4930b688 Re-land r301697 "[IR] Make add/remove Attributes use AttrBuilder instead of AttributeList"
This time, I fixed, built, and tested clang.

This reverts r301712.

llvm-svn: 301981
2017-05-02 22:07:37 +00:00
Joel Jones 6513405735 [AArch64] ILP32 Backend Relocation Support
Remove "_NC" suffix and semantics from TLSDESC_LD{64,32}_LO12 and
  TLSDESC_ADD_LO12 relocations
Rearrange ordering in AArch64.def to follow relocation encoding
Fix name:
  R_AARCH64_P32_LD64_GOT_LO12_NC => R_AARCH64_P32_LD32_GOT_LO12_NC
Add support for several "TLS", "TLSGD", and "TLSLD" relocations for
  ILP32
Fix return values from isNonILP32reloc
Add implementations for
  R_AARCH64_ADR_PREL_PG_HI21_NC, R_AARCH64_P32_LD32_GOT_LO12_NC,
  R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC,
  R_AARCH64_P32_TLSDESC_LD32_LO12, R_AARCH64_LD64_GOT_LO12_NC,
  *TLSLD_LDST128_DTPREL_LO12, *TLSLD_LDST128_DTPREL_LO12_NC,
  *TLSLE_LDST128_TPREL_LO12, *TLSLE_LDST128_TPREL_LO12_NC
Modify error messages to give name of equivalent relocation in the
  ABI not being used, along with better checking for non-existent
  requested relocations.
Added assembler support for "pg_hi21_nc"
Relocation definitions added without implementations:
  R_AARCH64_P32_TLSDESC_ADR_PREL21, R_AARCH64_P32_TLSGD_ADR_PREL21,
  R_AARCH64_P32_TLSGD_ADD_LO12_NC, R_AARCH64_P32_TLSLD_ADR_PREL21, 
  R_AARCH64_P32_TLSLD_ADR_PAGE21, R_AARCH64_P32_TLSLD_ADD_LO12_NC,
  R_AARCH64_P32_TLSLD_LD_PREL19, R_AARCH64_P32_TLSDESC_LD_PREL19,
  R_AARCH64_P32_TLSGD_ADR_PAGE21, R_AARCH64_P32_TLS_DTPREL,
  R_AARCH64_P32_TLS_DTPMOD, R_AARCH64_P32_TLS_TPREL,
  R_AARCH64_P32_TLSDESC
Fix encoding:
  R_AARCH64_P32_TLSDESC_ADR_PAGE21

Reviewers: Peter Smith

Patch by: Joel Jones (jjones@cavium.com)

Differential Revision: https://reviews.llvm.org/D32072

llvm-svn: 301980
2017-05-02 22:01:48 +00:00
Paul Robinson 2bc3873fe6 [DWARFv5] Parse new line-table header format.
The directory and file tables now have form-based content descriptors.
Parse these and extract the per-directory/file records based on the
descriptors.  For now we support only DW_FORM_string (inline) for the
path names; follow-up work will add support for indirect forms (i.e.,
DW_FORM_strp, strx<N>, and line_strp).

Differential Revision: http://reviews.llvm.org/D32713

llvm-svn: 301978
2017-05-02 21:40:47 +00:00
Sanjay Patel d091e76e0e revert r301766: InstructionSimplify: Canonicalize shuffle operands. NFC-ish
Turns out this wasn't NFC-ish at all because there's a bug processing shuffles
that change the size of their input vectors (that case always seems to trip us
up). 

This should fix PR32872 while we investigate how it failed and reduce a testcase:
https://bugs.llvm.org/show_bug.cgi?id=32872
 

llvm-svn: 301977
2017-05-02 21:37:28 +00:00
Davide Italiano 839c7e6cfb [NewGVN] Fix typo and format comment. NFCI.
llvm-svn: 301974
2017-05-02 21:11:40 +00:00
Greg Clayton c7695a8e45 Verify that all references point to actual DIEs in "llvm-dwarfdump --verify"
LTO and other fancy linking previously led to DWARF that contained invalid references. We already validate that CU relative references fall into the CU, and the DW_FORM_ref_addr references fall inside the .debug_info section, but we didn't validate that the references pointed to correct DIE offsets. This new verification will ensure that all references refer to actual DIEs and not an offset in between.

This caught a bug in DWARFUnit::getDIEForOffset() where if you gave it any offset, it would match the DIE that mathes the offset _or_ the next DIE. This has been fixed.

Differential Revision: https://reviews.llvm.org/D32722

llvm-svn: 301971
2017-05-02 20:28:33 +00:00
Tim Northover f9d8eee3db ARM: add arm1176j-f processor
I doubt anyone actually uses it, and I'm not even entirely convinced it exists
myself; but it is our default for "clang -arch armv6". Functionally, if it does
exist it's identical to the arm1176jz-f from LLVM's point of view (the
difference is apparently in the "Security Extensions").

llvm-svn: 301962
2017-05-02 19:06:13 +00:00
Matt Arsenault 6893926b69 PEI: Skip dead objects when looking at CSRs
On AMDGPU if an SGPR is spilled to a VGPR, the frame index
is deleted. If there were any CSR SGPRs, this woudl
assert when setting the offset.

llvm-svn: 301961
2017-05-02 18:56:28 +00:00
Xinliang David Li ab8722f80a [PartialInlining] Add more early filtering
This is a follow up to the previous
inline cost patch for quicker filtering.

llvm-svn: 301959
2017-05-02 18:43:21 +00:00
Matt Arsenault 5c80618fb7 AMDGPU: Don't promote alloca to LDS for leaf functions
LDS use in leaf functions not currently handled.

llvm-svn: 301958
2017-05-02 18:33:18 +00:00
Krzysztof Parzyszek fca6fae463 [Hexagon] Fix uninitialized value caught with valgrind
Patch by Colin LeMahieu.

llvm-svn: 301957
2017-05-02 18:29:49 +00:00
Krzysztof Parzyszek 57a8bb4343 [Hexagon] Change iconst to emit 27bit relocation
Patch by Colin LeMahieu.

llvm-svn: 301956
2017-05-02 18:19:11 +00:00
Krzysztof Parzyszek a750383d0f [Hexagon] Add extenders for GD_PLT_B22_PCREL and LD_PLT_B22_PCREL
Patch by Sid Manning.

llvm-svn: 301955
2017-05-02 18:15:33 +00:00
Krzysztof Parzyszek 9aaf923376 [Hexagon] Don't ignore mult-cycle latency information
The compiler was generating code that ends up ignoring a multiple
latency dependence between two instructions by scheduling the
intructions in back-to-back packets. 

The packetizer needs to end a packet if the latency of the current
current insruction and the source in the previous packet is
greater than 1 cycle. This case occurs when there is still room in
the current packet, but scheduling the instruction causes a stall.
Instead, the packetizer should start a new packet. Also, if the
current packet already contains a stall, then it is okay to add
another instruction to the packet that also causes a stall. This
occurs when there are no instructions that can be scheduled in
between the producer and consumer instructions.

This patch changes the latency for loads to 2 cycles from 3 cycles.
This change refects that a load only needs to be separated by
one extra packet to eliminate the stall.

Patch by Ikhlas Ajbar.

llvm-svn: 301954
2017-05-02 18:12:19 +00:00
Krzysztof Parzyszek 32e20b80c6 [Hexagon] Formatting changes, NFC
llvm-svn: 301953
2017-05-02 18:09:07 +00:00
Krzysztof Parzyszek 188ab98f67 [Hexagon] Remove unused validSubtarget TSFlags
Patch by Colin LeMahieu.

llvm-svn: 301952
2017-05-02 18:05:36 +00:00
Krzysztof Parzyszek b0af1ef741 [Hexagon] Make sure duplexed dealloc_returns are checked for double jumps
Patch by Colin LeMahieu.

llvm-svn: 301951
2017-05-02 18:03:08 +00:00
Matt Arsenault 9ac7d6be3c SpeculativeExecution: Stop using whitelist for costs
Just let TTI's cost do this instead of arbitrarily restricting
this.

llvm-svn: 301950
2017-05-02 18:02:18 +00:00
Krzysztof Parzyszek 49f7e0a98b [Hexagon] Move checking AXOK to checker
Patch by Colin LeMahieu.

llvm-svn: 301949
2017-05-02 18:00:37 +00:00
Zachary Turner e204a6c9a3 Rename pdb::StringTable -> pdb::PDBStringTable.
With the forthcoming codeview::StringTable which a pdb::StringTable
would hold an instance of as one member, this ambiguity becomes
confusing.  Rename to PDBStringTable to avoid this.

llvm-svn: 301948
2017-05-02 18:00:13 +00:00
Krzysztof Parzyszek 57f5046b4a [Hexagon] Remove unneeded code from HexagonShuffler
Patch by Colin LeMahieu.

llvm-svn: 301947
2017-05-02 17:58:52 +00:00
Krzysztof Parzyszek c15f8d2a08 [Hexagon] Extract function that checks endloops with other branches
Change location number to point to conflicting branch instruction.

Patch by Colin LeMahieu.

llvm-svn: 301946
2017-05-02 17:56:11 +00:00
Krzysztof Parzyszek 1cc6bfbc83 [Hexagon] Add new packet iterator which will iterate through duplexes
Patch by Colin LeMahieu.

llvm-svn: 301945
2017-05-02 17:53:51 +00:00
Zachary Turner a0aae2757d Revert "Remove "_NC" suffix and semantics from TLSDESC_LD{64,32}_LO12 and"
This reverts commit c08155afc5d3230792da2ad30a046a8617735a73.

This is causing undefined symbol errors with some of the constants.

llvm-svn: 301944
2017-05-02 17:51:27 +00:00
Krzysztof Parzyszek 107f82d128 [Hexagon] Check for .cur def without use without using a map data structure
Patch by Colin LeMahieu.

llvm-svn: 301943
2017-05-02 17:51:14 +00:00
Peter Collingbourne 7c2c4097a0 Bitcode: Simplify how we enumerate summaries in the index. NFCI.
Instead of defining a custom iterator class, just use a function with a
callback, which is much easier to understand and less error prone.

Differential Revision: https://reviews.llvm.org/D32470

llvm-svn: 301942
2017-05-02 17:48:39 +00:00
Paul Robinson ba1c91564b Make DWARFDebugLine use StringRef for directory/file tables. NFC
Differential Revision: http://reviews.llvm.org/D32728

llvm-svn: 301940
2017-05-02 17:37:32 +00:00
Joel Jones 705103e523 Remove "_NC" suffix and semantics from TLSDESC_LD{64,32}_LO12 and
TLSDESC_ADD_LO12 relocations
Rearrange ordering in AArch64.def to follow relocation encoding
Fix name:
  R_AARCH64_P32_LD64_GOT_LO12_NC => R_AARCH64_P32_LD32_GOT_LO12_NC
Add support for several "TLS", "TLSGD", and "TLSLD" relocations for
  ILP32
Fix return values from isNonILP32reloc
Add implementations for
  R_AARCH64_ADR_PREL_PG_HI21_NC, R_AARCH64_P32_LD32_GOT_LO12_NC,
  R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC,
  R_AARCH64_P32_TLSDESC_LD32_LO12, R_AARCH64_LD64_GOT_LO12_NC,
  *TLSLD_LDST128_DTPREL_LO12, *TLSLD_LDST128_DTPREL_LO12_NC,
  *TLSLE_LDST128_TPREL_LO12, *TLSLE_LDST128_TPREL_LO12_NC
Modify error messages to give name of equivalent relocation in the
  ABI not being used, along with better checking for non-existent
  requested relocations.
Added assembler support for "pg_hi21_nc"
Relocation definitions added without implementations:
  R_AARCH64_P32_TLSDESC_ADR_PREL21, R_AARCH64_P32_TLSGD_ADR_PREL21,
  R_AARCH64_P32_TLSGD_ADD_LO12_NC, R_AARCH64_P32_TLSLD_ADR_PREL21, 
  R_AARCH64_P32_TLSLD_ADR_PAGE21, R_AARCH64_P32_TLSLD_ADD_LO12_NC,
  R_AARCH64_P32_TLSLD_LD_PREL19, R_AARCH64_P32_TLSDESC_LD_PREL19,
  R_AARCH64_P32_TLSGD_ADR_PAGE21, R_AARCH64_P32_TLS_DTPREL,
  R_AARCH64_P32_TLS_DTPMOD, R_AARCH64_P32_TLS_TPREL,
  R_AARCH64_P32_TLSDESC
Fix encoding:
  R_AARCH64_P32_TLSDESC_ADR_PAGE21

Reviewers: Peter Smith

Patch by: Joel Jones (jjones@cavium.com)

Differential Revision: https://reviews.llvm.org/D32072

llvm-svn: 301939
2017-05-02 17:14:31 +00:00
Matt Arsenault b03dd8daae AMDGPU: Refactor AsmPrinter
Avoid analyzing functions multiple times. This allows
asserting that each function is only analyzed once.

llvm-svn: 301938
2017-05-02 17:14:00 +00:00
Matt Arsenault 7b82b4bddb AMDGPU: Make intrinsics speculatable
llvm-svn: 301937
2017-05-02 16:57:44 +00:00
Zachary Turner edef14510e [PDB/CodeView] Read/write codeview inlinee line information.
Previously we wrote line information and file checksum
information, but we did not write information about inlinee
lines and functions.  This patch adds support for that.

llvm-svn: 301936
2017-05-02 16:56:09 +00:00
Marek Olsak a302a736ec AMDGPU: Add AMDGPU_HS calling convention
Reviewers: arsenm, nhaehnle

Subscribers: mehdi_amini, kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D32644

llvm-svn: 301930
2017-05-02 15:41:10 +00:00
Sanjay Patel 6381db18fe [InstCombine] don't use DeMorgan's Law on integer constants (2nd try)
This was originally checked in here:
https://reviews.llvm.org/rL301923

And reverted here:
https://reviews.llvm.org/rL301924

Because there's a clang test that would fail after this. I fixed/removed the
offending CHECK lines in:
https://reviews.llvm.org/rL301928

So let's try this again. Original commit message:

This is the fold that causes the infinite loop in BoringSSL
(https://github.com/google/boringssl/blob/master/crypto/cipher/e_rc2.c)
when we fix instcombine demanded bits to prefer 'not' ops as in https://reviews.llvm.org/D32255.

There are 2 or 3 problems with dyn_castNotVal, and I don't think we can
reinstate https://reviews.llvm.org/D32255 until dyn_castNotVal is completely eliminated.

1. As shown here, it transforms 'not' into random xor. This transform is harmful to SCEV and codegen because 'not' can often be folded while random xor cannot.
2. It does not transform vector constants. This is actually a good thing, but if you don't believe the above argument, then we shouldn't have excluded vectors.
3. It tries to avoid transforming not(not(X)). That's nice, but it doesn't match the greedy nature of instcombine. If we DeMorganize a pattern that has an extra 'not' in it: ~(~(~X) & Y) --> (~X | ~Y)

  That's just another case of DeMorgan, so we should trust that we'll fold that pattern too: (~X | ~ Y) --> ~(X & Y)

Differential Revision: https://reviews.llvm.org/D32665

llvm-svn: 301929
2017-05-02 15:31:40 +00:00
Sanjay Patel da0b4deafa revert r301923 : [InstCombine] don't use DeMorgan's Law on integer constants
There's a clang test that is wrongly using -O1 and failing after this commit.

llvm-svn: 301924
2017-05-02 14:48:23 +00:00
Sanjay Patel 096a981982 [InstCombine] don't use DeMorgan's Law on integer constants
This is the fold that causes the infinite loop in BoringSSL 
(https://github.com/google/boringssl/blob/master/crypto/cipher/e_rc2.c) 
when we fix instcombine demanded bits to prefer 'not' ops as in D32255.

There are 2 or 3 problems with dyn_castNotVal, and I don't think we can 
reinstate D32255 until dyn_castNotVal is completely eliminated.
1. As shown here, it transforms 'not' into random xor. This transform is 
   harmful to SCEV and codegen because 'not' can often be folded while 
   random xor cannot.
2. It does not transform vector constants. This is actually a good thing, 
   but if you don't believe the above argument, then we shouldn't have 
   excluded vectors.
3. It tries to avoid transforming not(not(X)). That's nice, but it doesn't
   match the greedy nature of instcombine. If we DeMorganize a pattern 
   that has an extra 'not' in it:
   ~(~(~X) & Y) --> (~X | ~Y)

   That's just another case of DeMorgan, so we should trust that we'll fold
   that pattern too:
   (~X | ~ Y) --> ~(X & Y)

Differential Revision: https://reviews.llvm.org/D32665

llvm-svn: 301923
2017-05-02 14:31:30 +00:00
Amaury Sechet 106a7eab84 [DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo .

Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32687

llvm-svn: 301922
2017-05-02 14:15:48 +00:00
Rafael Espindola 3ba2573744 Add llvm::object::getELFSectionTypeName().
This is motivated by https://reviews.llvm.org/D32488 where I am trying
to add printing of the section type for incompatible sections to LLD
error messages. This patch allows us to use the same code in
llvm-readobj and LLD instead of duplicating the function inside LLD.

Patch by Alexander Richardson!

llvm-svn: 301921
2017-05-02 14:04:52 +00:00
Amaury Sechet 153911f71d [DAGCombine] (add X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)
Summary: Common pattern when legalizing large integers operations. Similar to D32687, when the carry isn't used.

Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer

Differential Revision: https://reviews.llvm.org/D32738

llvm-svn: 301919
2017-05-02 13:34:25 +00:00
Simon Pilgrim 24d361f7bf [X86] Tidyup subvector insert/extract helpers. NFCI.
Use getConstantOperandVal where possible.

llvm-svn: 301912
2017-05-02 11:08:15 +00:00
Simon Pilgrim 7aca5218b0 Fix typo in comment. NFCI.
llvm-svn: 301911
2017-05-02 10:43:33 +00:00
Simon Pilgrim 89ad89cc73 [SelectionDAG] Improve support for promotion of <1 x fX> floating point argument types (PR31088)
PR31088 demonstrated that we were assuming that only integers require promotion from <1 x iX> types, when in fact float types may require it as well - in this case half floats.

This patch adds support for extension/truncation for both integer and float types.

Differential Revision: https://reviews.llvm.org/D32391

llvm-svn: 301910
2017-05-02 10:33:08 +00:00
Simon Pilgrim 8deb87a6c0 [DAGCombiner] Improve MatchBswapHword logic (PR31357)
The existing code only looks at half of the tree when matching bswap + rol patterns ending in an OR tree (as opposed to a cascade).

Patch originally introduced by Jim Lewis.

Submitted on the behalf of Dinar Temirbulatov.

Differential Revision: https://reviews.llvm.org/D32039

llvm-svn: 301907
2017-05-02 10:16:19 +00:00
Diana Picus 8abcbbb24b [ARM] GlobalISel: Use TableGen instruction selector
Emit and use the TableGen instruction selector for ARM. At the moment,
this allows us to remove the hand-written code for selecting G_SDIV and
G_UDIV.

Future commits will focus on increasing the code coverage for it and
removing more dead code from the current instruction selector.

llvm-svn: 301905
2017-05-02 09:40:49 +00:00
Craig Topper 9881bd9c1d [APInt] Move APInt::getSplat out of line.
I think this method is probably too complex to be inlined.

llvm-svn: 301901
2017-05-02 06:32:27 +00:00
Craig Topper 1e91919ac1 [APInt] Move the setBit and clearBit methods inline.
This makes setBit/clearBit more consistent with setBits which is already inlined.

llvm-svn: 301900
2017-05-02 05:49:40 +00:00
Xinliang David Li 351d9b01b9 Refactor callsite cost computation into a helper function /NFC
Makes code more readable. The function will also be used
by the partial inlining's cost analysis.

llvm-svn: 301899
2017-05-02 05:38:41 +00:00
Xinliang David Li 6133846be1 [PartialInlining] Hook up inline cost analysis
Differential Revision: http://reviews.llvm.org/D32666

llvm-svn: 301894
2017-05-02 02:44:14 +00:00
Dylan McKay 28355efdad [AVR] Save/restore the frame pointer for all functions
A recent commit I made made it so that we only did this for signal or
interrupt handlers. This broke normal functions.

llvm-svn: 301893
2017-05-02 01:57:48 +00:00
Nemanja Ivanovic b89c27f515 [PowerPC] Emit VMX loads/stores for aligned ops to avoid adding swaps on LE
Fixes PR30730.
This is a re-commit of a pulled commit. The commit was pulled because some
software projects contained uses of Altivec vectors that violated alignment
requirements. Known issues have now been fixed.

Committing on behalf of Lei Huang.

Differential Revision: https://reviews.llvm.org/D26861

llvm-svn: 301892
2017-05-02 01:47:34 +00:00
Dylan McKay 634339ab40 [AVR] Fix a bug where the frame pointer is clobbered
Because it was a callee-saved register, we automatically generated code
to spill and unspill its original value so that it is restored after the
function returns.

The problem is that this code was being generated before the epilogue.
The epilogue itself uses the Y register, which could be prematurely
restored by the CSR restoration process.

This removes R29R28 from the CSR list and changes the prologue/epilogue
code to handle it explicitly.

llvm-svn: 301887
2017-05-02 00:11:34 +00:00
George Burgess IV 7bc507a2e8 Revert r301880
This change caused buildbot failures, apparently because we're not
passing around types that InstSimplify is used to seeing. I'm not overly
familiar with InstSimplify, so I'm reverting this until I can figure out
what exactly is wrong.

llvm-svn: 301885
2017-05-01 23:54:41 +00:00
Paul Robinson 9d4eb6922e Stylistic makeover of DWARFDebugLine before working on it. NFC
Rename parameters and locals to CamelCase, doxygenize the header, and
run clang-format on the whole thing.

llvm-svn: 301883
2017-05-01 23:27:55 +00:00
Zachary Turner 8a2ebfb1cd [CodeView] Write CodeView line information.
Differential Revision: https://reviews.llvm.org/D32716

llvm-svn: 301882
2017-05-01 23:27:42 +00:00
Dylan McKay 3bb6eb238e [AVR] Enable the frame pointer for all functions
This is a temporary measure while we figure out a way to get the frame
pointer working correctly.

llvm-svn: 301881
2017-05-01 23:16:59 +00:00
George Burgess IV 6935aefdf0 [InstSimplify] Handle selects of GEPs with 0 offset
In particular (since it wouldn't fit nicely in the summary):
(select (icmp eq V 0) P (getelementptr P V)) -> (getelementptr P V)

Differential Revision: https://reviews.llvm.org/D31435

llvm-svn: 301880
2017-05-01 23:12:08 +00:00
Simon Pilgrim 8d196c88a6 [X86] Reduce code for setting operations actions by merging into loops across multiple types/ops. NFCI.
llvm-svn: 301879
2017-05-01 23:09:01 +00:00
Xin Tong a41bf70bea Empty Space. NFC
llvm-svn: 301878
2017-05-01 23:08:19 +00:00
Peter Collingbourne 440e204c7b Fix a pessimising move warning.
llvm-svn: 301852
2017-05-01 22:48:10 +00:00
Matthias Braun ab9438cb03 MachineFrameInfo: Track whether MaxCallFrameSize is computed yet; NFC
This tracks whether MaxCallFrameSize is computed yet. Ideally we would
assert and fail when the value is queried before it is computed, however
this fails various targets that need to be fixed first.

Differential Revision: https://reviews.llvm.org/D32570

llvm-svn: 301851
2017-05-01 22:32:25 +00:00
Davide Italiano 2dfd46bf08 [NewGVN] Don't derive incorrect implications.
In the testcase attached,  we believe %tmp1 implies %tmp4.
where:
  br i1 %tmp1, label %bb2, label %bb7
  br i1 %tmp4, label %bb5, label %bb7

because Wwhile looking at PredicateInfo stuffs we end up calling
isImpliedTrueByMatchingCmp() with the arguments backwards.

Differential Revision:  https://reviews.llvm.org/D32718

llvm-svn: 301849
2017-05-01 22:26:28 +00:00
Sanjay Patel 59d0aeaafe [InstCombine] check one-use before applying DeMorgan nor/nand folds
If we have ~(~X & Y), it only makes sense to transform it to (X | ~Y) when we do not need 
the intermediate (~X & Y) value. In that case, we would need an extra instruction to 
generate ~Y + 'or' (as shown in the test changes).

It's ok if we have multiple uses of ~X or Y, however. In those cases, we may not reduce the
instruction count or critical path, but we might improve throughput because we can generate 
~X and ~Y in parallel. Whether that actually makes perf sense or not for a target is something 
we can't answer in IR.

Differential Revision: https://reviews.llvm.org/D32703

llvm-svn: 301848
2017-05-01 22:25:42 +00:00
Greg Clayton 48432cfbeb Adds initial llvm-dwarfdump --verify support with unit tests.
lldb-dwarfdump gets a new "--verify" option that will verify a single file's DWARF debug info and will print out any errors that it finds. It will return an non-zero exit status if verification fails, and a zero exit status if verification succeeds. Adding the --quiet option will suppress any output the STDOUT or STDERR.

The first part of the verify does the following:

- verifies that all CU relative references (DW_FORM_ref1, DW_FORM_ref2, DW_FORM_ref4, DW_FORM_ref8, DW_FORM_ref_udata) have valid CU offsets
- verifies that all DW_FORM_ref_addr references have valid .debug_info offsets
- verifies that all DW_AT_ranges attributes have valid .debug_ranges offsets
- verifies that all DW_AT_stmt_list attributes have valid .debug_line offsets
- verifies that all DW_FORM_strp attributes have valid .debug_str offsets

Unit tests were added for each of the above cases.

Differential Revision: https://reviews.llvm.org/D32707

llvm-svn: 301844
2017-05-01 22:07:02 +00:00
Peter Collingbourne 74d22dd7dc Bitcode: Make the summary reader responsible for merging. NFCI.
This is to prepare for an upcoming change which uses pointers instead of
GUIDs to represent references.

Differential Revision: https://reviews.llvm.org/D32469

llvm-svn: 301843
2017-05-01 22:04:36 +00:00
Quentin Colombet cdf8c81127 [AArch64] Move GISel accessor initialization from TargetMachine to Subtarget.
NFC

llvm-svn: 301841
2017-05-01 21:53:19 +00:00
Peter Collingbourne a992f53099 IPO: Add missing build dep.
llvm-svn: 301835
2017-05-01 20:57:20 +00:00
Simon Pilgrim ab1a82764f [X86][AVX] Rename LowerVectorBroadcast to lowerBuildVectorAsBroadcast. NFCI.
Since the shuffle refactor, this is only used during BUILD_VECTOR lowering.

llvm-svn: 301834
2017-05-01 20:56:35 +00:00
Peter Collingbourne c15d60b772 Object: Remove ModuleSummaryIndexObjectFile class.
Differential Revision: https://reviews.llvm.org/D32195

llvm-svn: 301832
2017-05-01 20:42:32 +00:00
Krzysztof Parzyszek 4a1c3f0aaa [Hexagon] Replace CVI_VM_CUR_LD type with CVI_VM_LD
A .cur instruction can be identified by checking isCVINew() && mayLoad().

Patch by Colin LeMahieu.

llvm-svn: 301829
2017-05-01 20:16:35 +00:00
Krzysztof Parzyszek 55db483a46 [Hexagon] Improving error reporting for writing to read only registers
Patch by Colin LeMahieu.

llvm-svn: 301828
2017-05-01 20:10:41 +00:00
Krzysztof Parzyszek e96d27a997 [Hexagon] Give better error messages for solo instruction errors
Patch by Colin LeMahieu.

llvm-svn: 301827
2017-05-01 20:06:01 +00:00
Krzysztof Parzyszek e12d1e70cb [Hexagon] Improve shuffle error reporting
Patch by Colin LeMahieu.

llvm-svn: 301823
2017-05-01 19:41:43 +00:00
Tim Northover 9bb6931c25 X86: initialize a few subtarget variables.
Otherwise an indeterminate value gets read, causing a bunch of UBSan failures.

llvm-svn: 301819
2017-05-01 17:50:15 +00:00
Xin Tong a4b9b9f42a Take indirect branch into account as well when folding.
We may not be able to rewrite indirect branch target, but we also want to take it into
account when folding, i.e. if it and all its successor's predecessors go to the same
destination, we can fold, i.e. no need to thread.

llvm-svn: 301816
2017-05-01 17:15:37 +00:00
Sanjoy Das f1c0eafd5b Add a new WeakVH value handle; NFC
This relands r301425.

llvm-svn: 301813
2017-05-01 17:07:54 +00:00
Sanjoy Das e6bca0eecb Rename WeakVH to WeakTrackingVH; NFC
This relands r301424.

llvm-svn: 301812
2017-05-01 17:07:49 +00:00
Derek Schuff 2fa3604831 [WebAssembly] Fix use of SDNodeFlags after API change in r301803
llvm-svn: 301811
2017-05-01 16:49:39 +00:00
Zachary Turner 7cc13e557c [PDB/CodeView] Rename some classes.
In preparation for introducing writing capabilities for each of
these classes, I would like to adopt a Foo / FooRef naming
convention, where Foo indicates that the class can manipulate and
serialize Foos, and FooRef indicates that it is an immutable view of
an existing Foo.  In other words, Foo is a writer and FooRef is a
reader.  This patch names some existing readers to conform to the
FooRef convention, while offering no functional change.

llvm-svn: 301810
2017-05-01 16:46:39 +00:00
Sanjoy Das 8a6238201f Emulate TrackingVH using WeakVH
Summary:
This frees up one slot in the HandleBaseKind enum, which I will use
later to add a new kind of value handle.  The size of the
HandleBaseKind enum is important because we store a HandleBaseKind in
the low two bits of a (in the worst case) 4 byte aligned pointer.

Reviewers: davide, chandlerc

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D32634

llvm-svn: 301809
2017-05-01 16:28:58 +00:00
Xin Tong 99dce428bc [JumpThread] Add some assertions for expected ConstantInt/BlockAddress
llvm-svn: 301808
2017-05-01 16:19:59 +00:00
Gabor Horvath 43b72d538f Remove unnecessary conditions as suggested by clang-tidy. NFC
Patch by: Gergely Angeli!

Differential Revision: https://reviews.llvm.org/D31936

llvm-svn: 301807
2017-05-01 16:18:42 +00:00
Craig Topper 6b1b630a98 [SelectionDAG] Use known ones to provide a better bound for the known zeros for CTTZ/CTLZ operations.
This is the SelectionDAG version of D32521. If know where at least one 1 is located in the input to these intrinsics we can place an upper bound on the number of bits needed to represent the count and thus increase the number of known zeros in the output.

I think we can also refine this further for CTTZ_UNDEF/CTLZ_UNDEF by assuming that the answer will never be BitWidth. I've left this out for now because it caused other test failures across multiple targets. Usually because of turning ADD into OR based on this new information.

I'll fix CTPOP in a future patch.

Differential Revision: https://reviews.llvm.org/D32692

llvm-svn: 301806
2017-05-01 16:08:06 +00:00
Xin Tong 21f8ac235e [JumpThread] Do RAUW in case Cond folds to a constant in the CFG
Summary: [JumpThread] Do RAUW in case Cond folds to a constant in the CFG

Reviewers: sanjoy

Reviewed By: sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32407

llvm-svn: 301804
2017-05-01 15:34:17 +00:00
Amara Emerson d28f0cd448 Generalize the specialized flag-carrying SDNodes by moving flags into SDNode.
This removes BinaryWithFlagsSDNode, and flags are now all passed by value.

Differential Revision: https://reviews.llvm.org/D32527

llvm-svn: 301803
2017-05-01 15:17:51 +00:00
Michael Zuckerman 56704618aa [LLVM][inline-asm] Altmacro absolute expression '%' feature
In this patch, I introduce a new alt macro feature.
This feature adds meaning for the % when using it as a prefix to the calling macro arguments.

In the altmacro mode, the percent sign '%' before an absolute expression convert the expression first to a string. 
As described in the https://sourceware.org/binutils/docs-2.27/as/Altmacro.html
"Expression results as strings
You can write `%expr' to evaluate the expression expr and use the result as a string."

expression assumptions:

1. '%' can only evaluate an absolute expression.
2. Altmacro '%' must be the first character of the evaluated expression.
3. If no '%' is located before the expression, a regular module operation is expected.
4. The result of Absolute Expressions can be only integer.

Differential Revision: https://reviews.llvm.org/D32526

llvm-svn: 301797
2017-05-01 13:20:12 +00:00
Dylan McKay 59e7fe3da8 [AVR] Implement non-constant bit rotations
This lets us do bit rotations of variable amount.

llvm-svn: 301794
2017-05-01 09:48:55 +00:00
Igor Breger 2452ef0ea2 [GlobalISel][X86] Prioritize Tablegen-erated instruction selection. NFC
Summary:
Prioritizes Tablegen-erated instruction selection over C++ instruction selection.
Remove G_ADD/G_SUB C++ selection - implemented by Tablegen.

Reviewers: dsanders, zvi, guyblank

Reviewed By: guyblank

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D32677

llvm-svn: 301792
2017-05-01 07:06:08 +00:00
Igor Breger c08a783521 [GlobalISel][X86] G_SEXT/G_ZEXT support.
Reviewers: zvi, guyblank

Reviewed By: zvi

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D32591

llvm-svn: 301790
2017-05-01 06:30:16 +00:00
Igor Breger a9edb88d46 [GlobalISel][X86] G_LOAD/G_STORE pointer selection support.
Summary: [GlobalISel][X86] G_LOAD/G_STORE pointer selection support.

Reviewers: zvi, guyblank

Reviewed By: zvi, guyblank

Subscribers: dberris, rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D32217

llvm-svn: 301788
2017-05-01 06:08:32 +00:00
Dylan McKay 2e8718bcbb [AVR] Fix a bug so that we now emit R_AVR_16 fixups with the correct offset
Before this, the LDS/STS instructions would have their opcodes
overwritten while linking.

llvm-svn: 301782
2017-04-30 23:33:52 +00:00
Sanjay Patel ad13826aea [DAGCombiner] shrink/widen a vselect to match its condition operand size (PR14657)
We discussed shrinking/widening of selects in IR in D26556, and I'll try to get back to that
patch eventually. But I'm hoping that this transform is less iffy in the DAG where we can check
legality of the select that we want to produce.

A few things to note:

1. We can't wait until after legalization and do this generically because (at least in the x86
   tests from PR14657), we'll have PACKSS and bitcasts in the pattern.
2. This might benefit more of the SSE codegen if we lifted the legal-or-custom requirement, but
   that requires a closer look to make sure we don't end up worse.
3. There's a 'vblendv' opportunity that we're missing that results in andn/and/or in some cases. 
   That should be fixed next.
4. I'm assuming that AVX1 offers the worst of all worlds wrt uneven ISA support with multiple 
   legal vector sizes, but if there are other targets like that, we should add more tests.
5. There's a codegen miracle in the multi-BB tests from PR14657 (the gcc auto-vectorization tests):
   despite IR that is terrible for the target, this patch allows us to generate the optimal loop
   code because something post-ISEL is hoisting the splat extends above the vector loops.

Differential Revision: https://reviews.llvm.org/D32620

llvm-svn: 301781
2017-04-30 22:44:51 +00:00
Sanjoy Das 08989c7ecd Rename isKnownNotFullPoison to programUndefinedIfPoison; NFC
Summary:
programUndefinedIfPoison makes more sense, given what the function
does; and I'm about to add a function with a name similar to
isKnownNotFullPoison (so do the rename to avoid confusion).

Reviewers: broune, majnemer, bjarke.roune

Reviewed By: broune

Subscribers: mcrosier, llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D30444

llvm-svn: 301776
2017-04-30 19:41:19 +00:00
Amaury Sechet 8ac81f3924 Do not legalize large add with addc/adde, introduce addcarry and do it with uaddo/addcarry
Summary: As per discution on how to get better codegen an large int legalization, it became clear that using a glue for the carry was preventing several desirable optimizations. Passing the carry down as a value allow for more flexibility.

Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer

Subscribers: igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D29872

llvm-svn: 301775
2017-04-30 19:24:09 +00:00
Craig Topper 778f57b4f1 [APInt] Replace calls to setBits with more specific calls to setBitsFrom and setLowBits where possible.
llvm-svn: 301768
2017-04-30 07:44:58 +00:00
Craig Topper d503644a4a [X86] Clear KnownBits instead of reconstructing it. NFC
llvm-svn: 301767
2017-04-30 07:44:55 +00:00
Zvi Rackover 9d8cd821e6 InstructionSimplify: Canonicalize shuffle operands. NFC-ish.
Summary:
 Apply canonicalization rules:
    1. Input vectors with no elements selected from can be replaced with undef.
    2. If only one input vector is constant it shall be the second one.

This allows constant-folding to cover more ad-hoc simplifications that
were in place and avoid duplication for RHS and LHS checks.

There are more rules we may want to add in the future when we see a
justification. e.g. mask elements that select undef elements can be
replaced with undef.

Reviewers: spatel, RKSimon, andreadb, davide

Reviewed By: spatel, RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32338

llvm-svn: 301766
2017-04-30 06:25:04 +00:00
Zvi Rackover 0411e46fff InstructionSimplify: One getShuffleMask() replacing multiple getMaskValue(). NFC.
Summary: This is a preparatory step for D32338.

Reviewers: RKSimon, spatel

Reviewed By: RKSimon, spatel

Subscribers: spatel, llvm-commits

Differential Revision: https://reviews.llvm.org/D32388

llvm-svn: 301765
2017-04-30 06:10:54 +00:00
Zvi Rackover 4086e13e0d InstructionSimplify: Simplify a shuffle with a undef mask to undef
Summary:
Following the discussion in pr32486, adding the simplification:
 shuffle %x, %y, undef -> undef

Reviewers: spatel, RKSimon, andreadb, davide

Reviewed By: spatel

Subscribers: jroelofs, davide, llvm-commits

Differential Revision: https://reviews.llvm.org/D32293

llvm-svn: 301764
2017-04-30 06:06:26 +00:00
Simon Atanasyan 3979f43813 [mips] Emit R_MICROMIPS_TLS_GOTTPREL relocation for %gottprel in case of microMIPS
In case of microMIPS mode %gottprel operator should emit microMIPS
relocation R_MICROMIPS_TLS_GOTTPREL, not R_MIPS_TLS_GOTTPREL.

Differential Revision: http://reviews.llvm.org/D32617

llvm-svn: 301763
2017-04-30 04:27:23 +00:00
Craig Topper 866165309f [ConstantRange] Fix a couple cases where we were possibly throwing away an APInt allocation we could reuse. NFC
This uses setAllBits to replace getMaxValue and operator=(uint64_t) instead of constructing an APInt from uint64_t.

llvm-svn: 301761
2017-04-30 00:44:05 +00:00
Dimitry Andric c12f10fe19 Include <cstdio> in PrettyStackTrace.cpp, since it uses vsnprintf(3).
llvm-svn: 301760
2017-04-29 23:45:30 +00:00
Craig Topper 8c5c6fe48e [ConstantRange] Use APInt::getOneBitSet to shorten some code. NFC
llvm-svn: 301753
2017-04-29 17:59:41 +00:00
Craig Topper 335597f31b [ConstantRange] Replace getMaxValue+zext with getLowBitsSet. Replace zero-init+setBit with getOneBitSet. NFC
llvm-svn: 301752
2017-04-29 17:46:13 +00:00
Craig Topper 685327dd99 [ConstantRange] Use APInt::operator-= to remove temporary APInts.
llvm-svn: 301751
2017-04-29 17:46:11 +00:00