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4 Commits

Author SHA1 Message Date
Tim Northover a962398a3f AArch64/ARM64: make use of ANDS and BICS instructions for comparisons. 
llvm-svn: 206888
 2014-04-22 12:45:42 +00:00
Jim Grosbach f39d752b03 [C++11,ARM64] Range based for loops in pseudo expansion. 
No functional change intended.

llvm-svn: 205441
 2014-04-02 18:00:46 +00:00
Tim Northover 5e3a484e3b ARM64: convert fp16 narrowing ISel to pseudo-instruction 
The previous attempt was fine with optimisations, but was actually rather
cavalier with its types. When compiled at -O0, it produced invalid COPY
MachineInstrs.

llvm-svn: 205422
 2014-04-02 14:38:54 +00:00
Tim Northover 00ed9964c6 ARM64: initial backend import 
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

llvm-svn: 205090
 2014-03-29 10:18:08 +00:00