Commit Graph

196 Commits

Author SHA1 Message Date
David Blaikie 3053029310 Remove unnecessary leading comment characters in lit-only file
llvm-svn: 177327
2013-03-18 22:08:16 +00:00
David Blaikie 99067af791 Include '.test' suffix in target specific lit configs that need it
Apparently my final cleanup to use a relevant suffix for these tests before
committing r176831 caused them to stop running since lit wasn't configured to
run tests with that suffix in those directories (why don't we just have a
global suffix list?). So, add the suffix to the relevant directories & fix the
test that has bitrotted over the last week due to my debug info schema changes.

llvm-svn: 177315
2013-03-18 20:31:44 +00:00
David Blaikie 789beb5300 Remove duplicate test contents.
llvm-svn: 176831
2013-03-11 22:10:14 +00:00
Richard Osborne 9a43772783 Fix handling of aliases to functions.
An alias to a function should use pc relative addressing.

llvm-svn: 168199
2012-11-16 21:12:38 +00:00
Richard Osborne ab7d788eb5 Fix pattern for MKMSK instruction.
llvm-svn: 158409
2012-06-13 17:59:12 +00:00
Chandler Carruth 4190b507c5 Flip the new block-placement pass to be on by default.
This is mostly to test the waters. I'd like to get results from FNT
build bots and other bots running on non-x86 platforms.

This feature has been pretty heavily tested over the last few months by
me, and it fixes several of the execution time regressions caused by the
inlining work by preventing inlining decisions from radically impacting
block layout.

I've seen very large improvements in yacr2 and ackermann benchmarks,
along with the expected noise across all of the benchmark suite whenever
code layout changes. I've analyzed all of the regressions and fixed
them, or found them to be impossible to fix. See my email to llvmdev for
more details.

I'd like for this to be in 3.1 as it complements the inliner changes,
but if any failures are showing up or anyone has concerns, it is just
a flag flip and so can be easily turned off.

I'm switching it on tonight to try and get at least one run through
various folks' performance suites in case SPEC or something else has
serious issues with it. I'll watch bots and revert if anything shows up.

llvm-svn: 154816
2012-04-16 13:49:17 +00:00
Rafael Espindola 2e5c58e77b No need to run llvm-as.
llvm-svn: 153890
2012-04-02 19:44:20 +00:00
Eli Bendersky f33086052d Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu
* Removed test/lib/llvm.exp - it is no longer needed 
* Deleted the dg.exp reading code from test/lit.cfg. There are no dg.exp files
  left in the test suite so this code is no longer required. test/lit.cfg is
  now much shorter and clearer 
* Removed a lot of duplicate code in lit.local.cfg files that need access to
  the root configuration, by adding a "root" attribute to the TestingConfig
  object. This attribute is dynamically computed to provide the same
  information as was previously provided by the custom getRoot functions. 
* Documented the config.root attribute in docs/CommandGuide/lit.pod

llvm-svn: 153408
2012-03-25 09:02:19 +00:00
Eli Bendersky 924f9a671d Replace all instances of dg.exp file with lit.local.cfg, since all tests are run with LIT now and now Dejagnu. dg.exp is no longer needed.
Patch reviewed by Daniel Dunbar. It will be followed by additional cleanup patches.

llvm-svn: 150664
2012-02-16 06:28:33 +00:00
Benjamin Kramer aca1885695 FileCheck hygiene.
llvm-svn: 147580
2012-01-05 00:43:34 +00:00
Chris Lattner 6a144a2227 Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.
llvm-svn: 145171
2011-11-27 06:54:59 +00:00
Richard Osborne 56ce0932db Don't fold negative offsets into cp / dp accesses to avoid relocation errors.
This can happen if the address + addend is less than the start of the cp / dp.

llvm-svn: 143459
2011-11-01 11:31:53 +00:00
Richard Osborne 37fe7d6641 Combine various XCore tests for floating point intrinsic support into a single test.
llvm-svn: 143458
2011-11-01 10:51:48 +00:00
Richard Osborne 8591b6b0ab Move various XCore tests to FileCheck
llvm-svn: 143457
2011-11-01 10:41:28 +00:00
Richard Osborne 97a2a5c4dc Associate a MemOperand with LDWCP nodes introduced during ISel.
This information is required if we want LDWCP to be hoisted out of loops.

llvm-svn: 139495
2011-09-12 14:43:23 +00:00
Duncan Sands a098436b32 Split the init.trampoline intrinsic, which currently combines GCC's
init.trampoline and adjust.trampoline intrinsics, into two intrinsics
like in GCC.  While having one combined intrinsic is tempting, it is
not natural because typically the trampoline initialization needs to
be done in one function, and the result of adjust trampoline is needed
in a different (nested) function.  To get around this llvm-gcc hacks the
nested function lowering code to insert an additional parent variable
holding the adjust.trampoline result that can be accessed from the child
function.  Dragonegg doesn't have the luxury of tweaking GCC code, so it
stored the result of adjust.trampoline in the memory GCC set aside for
the trampoline itself (this is always available in the child function),
and set up some new memory (using an alloca) to hold the trampoline.
Unfortunately this breaks Go which allocates trampoline memory on the
heap and wants to use it even after the parent has exited (!).  Rather
than doing even more hacks to get Go working, it seemed best to just use
two intrinsics like in GCC.  Patch mostly by Sanjoy Das.

llvm-svn: 139140
2011-09-06 13:37:06 +00:00
Richard Osborne 6e3c83eb1c Add Uses=[SP] to call instructions. This fixes a miscompilation with a
variable sized alloca.

llvm-svn: 138433
2011-08-24 13:32:43 +00:00
Richard Osborne 56f3b70225 Add intrinsics for SETEV, GETED, GETET.
llvm-svn: 137938
2011-08-18 13:00:48 +00:00
Richard Osborne 0cc000ef29 Fix crash with varargs function with no named parameters.
llvm-svn: 136623
2011-08-01 16:45:59 +00:00
Richard Osborne f1b800998a Add intrinsics for the zext / sext instructions.
llvm-svn: 135476
2011-07-19 13:28:50 +00:00
Richard Osborne 252c43ee88 Add intrinsics for the testct, testwct instructions.
llvm-svn: 135475
2011-07-19 13:00:40 +00:00
Richard Osborne 707f0beae1 Add intrinsics for the peek and endin instructions.
llvm-svn: 135474
2011-07-19 12:50:25 +00:00
Chris Lattner 5756c16cdf make the asmparser reject function and type redefinitions. 'Merging' hasn't been
needed since llvm-gcc 3.4 days.

llvm-svn: 133248
2011-06-17 07:06:44 +00:00
Richard Osborne 2f14b0bb1d Add XCore intrinsic for crc8.
llvm-svn: 132340
2011-05-31 16:24:49 +00:00
Richard Osborne 542f9a2bcf Add XCore intrinsic for crc32.
llvm-svn: 132336
2011-05-31 14:47:36 +00:00
Richard Osborne 36d027f7f6 Convert test to FileCheck.
llvm-svn: 132335
2011-05-31 14:00:05 +00:00
Jakob Stoklund Olesen d3b2f44c9d Fix register-dependent XCore tests
llvm-svn: 130816
2011-05-04 01:01:41 +00:00
Jakob Stoklund Olesen f4c9754d5c Fix Mips, Sparc, and XCore tests that were dependent on register allocation.
Add an extra run with -regalloc=basic to keep them honest.

llvm-svn: 128654
2011-03-31 18:42:43 +00:00
Richard Osborne 9a827b30ab Add XCore intrinsics for initializing / starting / synchronizing threads.
llvm-svn: 128633
2011-03-31 15:13:13 +00:00
Richard Osborne 6120962d7d Add XCore intrinsic for setpsc.
llvm-svn: 127821
2011-03-17 18:42:05 +00:00
Richard Osborne c871eff3f5 Add XCore intrinsics for setclk, setrdy.
llvm-svn: 127761
2011-03-16 21:56:00 +00:00
Richard Osborne d4346f2388 Add checkevent intrinsic to check if any resources owned by the current thread
can event.

llvm-svn: 127741
2011-03-16 18:34:00 +00:00
Richard Osborne 5f1a26ea39 On the XCore the scavenging slot should be closest to the SP.
llvm-svn: 127680
2011-03-15 15:10:11 +00:00
Richard Osborne 3a68eb150b Add XCore intrinsics for getps, setps, setsr and clrsr.
llvm-svn: 127678
2011-03-15 13:45:47 +00:00
Benjamin Kramer 1885d21700 Fix mistyped CHECK lines.
llvm-svn: 127366
2011-03-09 22:07:31 +00:00
Joerg Sonnenberger 62f759791a Be nice to Xcore and the XMOS assembler and avoid quoting section names
that contain only letters, digits and the characters "_" and ".".

llvm-svn: 127028
2011-03-04 20:03:14 +00:00
Joerg Sonnenberger 852ab890b5 Bug#9033: For the ELF assembler output, always quote the section name.
llvm-svn: 126963
2011-03-03 22:31:08 +00:00
Richard Osborne 42f52e737e Add XCore intrinsic for eeu instruction.
llvm-svn: 126384
2011-02-24 13:39:18 +00:00
Richard Osborne bfa5cc0e08 Add XCore intrinsic for clre instruction.
llvm-svn: 126322
2011-02-23 18:52:05 +00:00
Richard Osborne 4995b05f56 Add llvm.xcore.waitevent intrinsic. The effect of this intrinsic is to enable
events on the thread and wait until a resource is ready to event. The vector
of the resource that is ready is returned.

llvm-svn: 126320
2011-02-23 18:35:59 +00:00
Richard Osborne 2c610aa3ed Add XCore intrinsic for the setv instruction.
llvm-svn: 126315
2011-02-23 16:46:37 +00:00
Richard Osborne aab96995f6 Add XCore intrinsic for settw instruction.
llvm-svn: 126313
2011-02-23 14:45:03 +00:00
Richard Osborne 1ae65c7cb8 Add XCore intrinsics for various instructions on ports.
llvm-svn: 126132
2011-02-21 18:23:30 +00:00
Richard Osborne d9dde78c27 Add intrinsic for setc instruction on the XCore.
llvm-svn: 125186
2011-02-09 13:22:12 +00:00
Richard Osborne a31b9c2f7c Add XCore intrinsics for resource instructions.
llvm-svn: 124794
2011-02-03 13:14:25 +00:00
Richard Osborne 8607a67d37 Add support for trampolines on the XCore.
llvm-svn: 124722
2011-02-02 14:57:41 +00:00
Richard Osborne 272e084bca Fix bug where ReduceLoadWidth was creating illegal ZEXTLOAD instructions.
llvm-svn: 124587
2011-01-31 17:41:44 +00:00
Rafael Espindola ec517cdf24 Update tests.
llvm-svn: 123591
2011-01-16 18:02:57 +00:00
Devang Patel c24048a718 If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.
llvm-svn: 121059
2010-12-06 22:39:26 +00:00
Evan Cheng f3e9a48584 Enable machine sinking critical edge splitting. e.g.
define double @foo(double %x, double %y, i1 %c) nounwind {
  %a = fdiv double %x, 3.2
  %z = select i1 %c, double %a, double %y
  ret double %z
}

Was:
_foo:
        divsd   LCPI0_0(%rip), %xmm0
        testb   $1, %dil
        jne     LBB0_2
        movaps  %xmm1, %xmm0
LBB0_2:
        ret

Now:
_foo:
        testb   $1, %dil
        je      LBB0_2
        divsd   LCPI0_0(%rip), %xmm0
        ret
LBB0_2:
        movaps  %xmm1, %xmm0
        ret

This avoids the divsd when early exit is taken.
rdar://8454886

llvm-svn: 114372
2010-09-20 22:52:00 +00:00
Dan Gohman 4fee6f3bdd Start function numbering at 0.
llvm-svn: 101638
2010-04-17 16:29:15 +00:00
Dale Johannesen f118f9788b Split big test into multiple directories to cater to
those who don't build all targets.

llvm-svn: 100688
2010-04-07 20:43:35 +00:00
Chris Lattner 9efbbcbe45 fix AsmPrinter::GetBlockAddressSymbol to always return a unique
label instead of trying to form one based on the BB name (which
causes collisions if the name is empty).  This fixes PR6608

llvm-svn: 98495
2010-03-14 17:53:23 +00:00
Richard Osborne 4780109254 Add dag combine to simplify lmul(x, 0, a, b)
llvm-svn: 98258
2010-03-11 16:26:35 +00:00
Richard Osborne 54a2c32670 Handle MVT::i64 type in DAG combine for ISD::ADD. Fold 64 bit
expression add(add(mul(x,y),a),b) -> lmul(x,y,a,b) if all
operands are zero extended.

llvm-svn: 98168
2010-03-10 18:12:27 +00:00
Richard Osborne 1a396d53ed Fold add(add(mul(x,y),a),b) -> lmul(x,y,a,b) if the intermediate
results are unused elsewhere.

llvm-svn: 98157
2010-03-10 16:19:31 +00:00
Richard Osborne f57aea3d38 Prefer LMUL to MACCU as LMUL has no tied operands.
llvm-svn: 98153
2010-03-10 13:27:10 +00:00
Richard Osborne 0012bc1e41 Custom lower (S|U)MUL_LOHI -> MACC(S|U)
llvm-svn: 98152
2010-03-10 13:20:07 +00:00
Richard Osborne 54dfa01adc Lower add (mul a, b), c into MACCU / MACCS nodes which translate
directly to the maccu / maccs instructions. We handle this in
ExpandADDSUB since after type legalisation it is messy to
recognise these operations.

llvm-svn: 98150
2010-03-10 11:41:08 +00:00
Richard Osborne e35eabdd69 Convert test to FileCheck.
llvm-svn: 98148
2010-03-10 11:24:03 +00:00
Richard Osborne c420c4cb4e In cases where the carry / borrow unused converted ladd / lsub
to an add or a sub.

llvm-svn: 98059
2010-03-09 16:34:25 +00:00
Richard Osborne f4e76cf44d Add DAG combine for ladd / lsub.
llvm-svn: 98057
2010-03-09 16:07:47 +00:00
Richard Osborne 333300e0df Fix XCoreTargetLowering::isLegalAddressingMode() to handle VoidTy.
Previously LoopStrengthReduce would sometimes be unable to find
a legal formula, causing an assertion failure.

llvm-svn: 97226
2010-02-26 16:44:51 +00:00
Richard Osborne f578196968 Lower BR_JT on the XCore to a jump into a series of jump instructions.
llvm-svn: 96942
2010-02-23 13:25:07 +00:00
Chris Lattner cc9a6f0580 convert the last 3 targets to use EmitFunctionBody() now that
it has before/end body hooks.

 lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp |   49 ++-----------
 lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp   |   87 ++++++------------------
 lib/Target/XCore/AsmPrinter/XCoreAsmPrinter.cpp |   56 +++------------
 test/CodeGen/XCore/ashr.ll                      |    2 
 4 files changed, 48 insertions(+), 146 deletions(-)

llvm-svn: 94741
2010-01-28 06:22:43 +00:00
Dan Gohman fb4193625a Delete useless trailing semicolons.
llvm-svn: 92740
2010-01-05 17:55:26 +00:00
Richard Osborne 3bd09434a6 Add XCore support for indirectbr / blockaddress.
llvm-svn: 89273
2009-11-18 23:20:42 +00:00
Richard Osborne d5f2745965 Add XCore support for arbitrary-sized aggregate returns.
llvm-svn: 88802
2009-11-14 19:33:35 +00:00
Richard Osborne 4e13316bf9 Add some peepholes for signed comparisons using ashr X, X, 32.
llvm-svn: 83549
2009-10-08 15:38:17 +00:00
Dan Gohman c8054d90fb Eliminate more uses of llvm-as and llvm-dis.
llvm-svn: 81293
2009-09-09 00:09:15 +00:00
Richard Osborne 2349fb4d45 Add support for mergeable sections back into the XCore backend.
llvm-svn: 79368
2009-08-18 21:14:31 +00:00
Richard Osborne 934d61648b Put data with relocations in the same sections as data without relocations.
llvm-svn: 79351
2009-08-18 17:58:17 +00:00
Richard Osborne 94a2c1acae Update getSectionForConstant() to to allow mergable sections to be nulled out
if not supported by the ELF subtarget.

llvm-svn: 79249
2009-08-17 16:37:11 +00:00
Chris Lattner 93980d68e4 use XCore-specific section with xcore specific cp/dp flags to restore
support for globals going into the appropriate sections with the flags.

This hopefully finishes unbreaking the previous behavior that I broke before.

llvm-svn: 79079
2009-08-15 06:09:35 +00:00
Richard Osborne bbb772ace9 Add extra SEXT pattern.
llvm-svn: 77920
2009-08-02 22:45:24 +00:00
Chris Lattner 4d2c0f9008 switch off of 'Section' onto MCSection. We're not properly using
MCSection subclasses yet, but this is a step in the right direction.

llvm-svn: 77708
2009-07-31 18:48:30 +00:00
Richard Osborne fc39e417a8 Add tests for handling of globals and tls on the XCore. These currently fail
but pass when run against r76652.

llvm-svn: 76923
2009-07-24 00:38:20 +00:00
Richard Osborne 0cceec520c Combine an unaligned store of unaligned load into a memmove.
llvm-svn: 75908
2009-07-16 12:50:48 +00:00
Richard Osborne bfdc557c8a Expand unaligned 32 bit loads from an address which is a constant
offset from a 32 bit aligned base as follows:

  ldw low, base[offset >> 2]
  ldw high, base[(offset >> 2) + 1]
  shr low_shifted, low, (offset & 0x3) * 8
  shl high_shifted, high, 32 - (offset & 0x3) * 8
  or result, low_shifted, high_shifted

Expand 32 bit loads / stores with 16 bit alignment into two 16 bit
loads / stores.

llvm-svn: 75902
2009-07-16 10:42:35 +00:00
Richard Osborne 25b33cb035 Custom lower unaligned 32 bit stores and loads into libcalls. This is
a big code size win since before they were expanding to upto 16
instructions.

llvm-svn: 75901
2009-07-16 10:21:18 +00:00
Richard Osborne a8edd048c2 Fix pattern for LD16S_3r, add basic tests to check load / store instructions
are being properly selected.

llvm-svn: 75797
2009-07-15 17:06:59 +00:00
Richard Osborne 57489b0658 Fix XCoreTargetLowering::isLegalAddressingMode to handle non simple VTs.
llvm-svn: 75788
2009-07-15 15:46:56 +00:00
Dan Gohman a5b9645c4b Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt

llvm-svn: 72897
2009-06-04 22:49:04 +00:00
Eli Friedman 9030c35eb4 Fix for PR4235: to build a floating-point value from integer parts,
build an integer and cast that to a float.  This fixes a crash 
caused by trying to split an f32 into two f16's.

This changes the behavior in test/CodeGen/XCore/fneg.ll because that 
testcase now triggers a DAGCombine which converts the fneg into an integer
operation.  If someone is interested, it's probably possible to tweak 
the test to generate an actual fneg.

llvm-svn: 72162
2009-05-20 06:02:09 +00:00
Chris Lattner 1e7da23983 testcase for PR3898
llvm-svn: 69473
2009-04-18 20:49:22 +00:00
Rafael Espindola 6de96a1b5d Add the private linkage.
llvm-svn: 62279
2009-01-15 20:18:42 +00:00
Richard Osborne 40119780a8 Don't fold address calculations which use negative offsets into
the ADDRspii addressing mode.

llvm-svn: 62258
2009-01-15 11:32:30 +00:00
Richard Osborne 4359325ba8 Add pseudo instructions to the XCore for (load|store|load address) of a
frame index. eliminateFrameIndex will replace these instructions with
(LDWSP|STWSP|LDAWSP) or (LDW|STW|LDAWF) if a frame pointer is in use.

This fixes PR 3324. Previously we used LDWSP, STWSP, LDAWSP before frame
pointer elimination. However since they were marked as implicitly using
SP they could not be rematerialised.

llvm-svn: 62238
2009-01-14 18:26:46 +00:00
Richard Osborne feece7edab Add support for ISD::TRAP to the XCore backend
llvm-svn: 60479
2008-12-03 10:59:16 +00:00
Duncan Sands 1315f80ea8 Reapply r59464, this time using the correct type
when softening FNEG.

llvm-svn: 59513
2008-11-18 09:15:03 +00:00
Bill Wendling e0d5e67c98 Revert r59464. It was causing this failure:
Running /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/dg.exp ...
FAIL: /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll
Failed with signal(SIGABRT) at line 1
while running:  llvm-as < /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll |  llc -march=xcore > fneg.ll.tmp1.s
Assertion failed: (VT.isFloatingPoint() && "Cannot create integer FP constant!"), function getConstantFP, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/SelectionDAG.cpp, line 913.
0   llc                                 0x0092115c _ZN4llvm3sys18RemoveFileOnSignalERKNS0_4PathEPSs + 844
1   libSystem.B.dylib                   0x9217809b _sigtramp + 43
2   ???                                 0xffffffff 0x0 + 4294967295
3   libSystem.B.dylib                   0x921f0ec2 raise + 26
4   libSystem.B.dylib                   0x9220047f abort + 73
5   libSystem.B.dylib                   0x921f2063 __assert_rtn + 101
6   llc                                 0x005a5b0a _ZN4llvm12SelectionDAG13getConmake[1]: *** [check-local] Error 1
make: *** [check] Error 2

llvm-svn: 59487
2008-11-18 01:49:24 +00:00
Duncan Sands f046b50ecd Add soft float support for a bunch more operations. Original
patch by Richard Osborne, tweaked and extended by your humble
servant.

llvm-svn: 59464
2008-11-17 20:52:38 +00:00
Richard Osborne 6751b4a604 Don't produce ADDC/ADDE when expanding SHL unless they are legal
for the target. This fixes PR3080.

llvm-svn: 59450
2008-11-17 17:34:31 +00:00
Richard Osborne 5fe5933909 [XCore] Fix expansion of 64 bit add/sub. Don't custom expand
these operations if ladd/lsub are not available on the current
subtarget.

llvm-svn: 59305
2008-11-14 15:59:19 +00:00
Richard Osborne d16b37efae Add XCore intrinsics for getid (returns thread id) and bitrev (reverses
bits in a word).

llvm-svn: 59296
2008-11-14 10:12:16 +00:00
Richard Osborne 86d68a492a Add basic test for XCore backend
llvm-svn: 58841
2008-11-07 11:24:12 +00:00