Commit Graph

105 Commits

Author SHA1 Message Date
Andrew Trick e77e84e4b7 Added the MachineSchedulerPass skeleton.
llvm-svn: 148105
2012-01-13 06:30:30 +00:00
Jakob Stoklund Olesen 20f19eb9ab Make data structures private.
llvm-svn: 147979
2012-01-11 23:19:08 +00:00
Jakob Stoklund Olesen 73edbf1682 Sink spillInterferences into RABasic.
This helper method is too simplistic for RAGreedy.

llvm-svn: 147976
2012-01-11 22:52:14 +00:00
Jakob Stoklund Olesen a818d804a1 Move RegAllocBase into its own cpp file separate from RABasic.
No functional change.

llvm-svn: 147972
2012-01-11 22:28:30 +00:00
Jakob Stoklund Olesen d19d3cab09 Freeze reserved registers before starting register allocation.
The register allocators don't currently support adding reserved
registers while they are running.  Extend the MRI API to keep track of
the set of reserved registers when register allocation started.

Target hooks like hasFP() and needsStackRealignment() can look at this
set to avoid reserving more registers during register allocation.

llvm-svn: 147577
2012-01-05 00:26:49 +00:00
Jakob Stoklund Olesen 7519336752 Privatize an unused part of the LiveIntervalUnion::Query interface.
No clients are iterating over interference overlaps.

llvm-svn: 137350
2011-08-11 21:00:42 +00:00
Jakob Stoklund Olesen 4c9a2fb044 Refer to the RegisterCoalescer pass by ID.
A public interface is no longer needed since RegisterCoalescer is not an
analysis any more.

llvm-svn: 137082
2011-08-09 00:29:53 +00:00
Jakob Stoklund Olesen b1459dbc25 Print out the MBB live-in registers.
llvm-svn: 136178
2011-07-26 23:12:08 +00:00
Jakob Stoklund Olesen 54f7c59c1a Better diagnostics when inline asm fails to allocate.
asm.c:2:7: error: ran out of registers during register allocation
  asm(""::"r"(0), "r"(1), "r"(2), "r"(3), "r"(4), "r"(5), "r"(6), "r"(7), "r"(8), "r"(9));
        ^

llvm-svn: 134310
2011-07-02 07:17:37 +00:00
Rafael Espindola 676c405acb There is only one register coalescer. Merge it into the base class and
remove the analysis group.

llvm-svn: 133899
2011-06-26 22:34:10 +00:00
Rafael Espindola fef3c64a1f Move RegisterCoalescer.h to lib/CodeGen.
llvm-svn: 133895
2011-06-26 21:41:06 +00:00
Jakob Stoklund Olesen b8bf3c0f8b Switch AllocationOrder to using RegisterClassInfo instead of a BitVector
of reserved registers.

Use RegisterClassInfo in RABasic as well. This slightly changes som
allocation orders because RegisterClassInfo puts CSR aliases last.

llvm-svn: 132581
2011-06-03 20:34:53 +00:00
Jakob Stoklund Olesen 50215afd8a Fix PR9883. Make sure all caches are invalidated when a live range is repaired.
The previous invalidation missed the alias interference caches.

Also add a stats counter for the number of repaired ranges.

llvm-svn: 131133
2011-05-10 17:37:41 +00:00
Jakob Stoklund Olesen a5c889982a Emit a proper error message when register allocators run out of registers.
This can't be just an assertion, users can always write impossible inline
assembly. Such an assembly statement should be included in the error message.

llvm-svn: 131024
2011-05-06 21:58:30 +00:00
Jakob Stoklund Olesen 0e34c1dfac Prefer cheap registers for busy live ranges.
On the x86-64 and thumb2 targets, some registers are more expensive to encode
than others in the same register class.

Add a CostPerUse field to the TableGen register description, and make it
available from TRI->getCostPerUse. This represents the cost of a REX prefix or a
32-bit instruction encoding required by choosing a high register.

Teach the greedy register allocator to prefer cheap registers for busy live
ranges (as indicated by spill weight).

llvm-svn: 129864
2011-04-20 18:19:48 +00:00
Jakob Stoklund Olesen 68e84581c5 Fix a bug in RegAllocBase::addMBBLiveIns() where a basic block could accidentally be skipped.
llvm-svn: 129373
2011-04-12 18:11:28 +00:00
Jakob Stoklund Olesen 507992e909 Reuse live interval union between functions. This saves a bit of compile time
when compiling many small functions.

llvm-svn: 129321
2011-04-11 23:57:14 +00:00
Jakob Stoklund Olesen 7d05bce70c Use a faster algorithm for computing MBB live-in registers after register allocation.
LiveIntervals::findLiveInMBBs has to do a full binary search for each segment.

llvm-svn: 129292
2011-04-11 20:01:41 +00:00
Jakob Stoklund Olesen bfabc494f5 Time the initial seeding of live registers
llvm-svn: 129276
2011-04-11 15:00:42 +00:00
Jakob Stoklund Olesen 6aa0fbf4c0 Run LiveDebugVariables in RegAllocBasic and RegAllocGreedy.
llvm-svn: 128935
2011-04-05 21:40:37 +00:00
Jakob Stoklund Olesen 6e597dc8e7 The basic register allocator must also use the inline spiller.
It is using a trivial rewriter that doesn't know how to insert spill code
requested by the standard spiller.

llvm-svn: 128688
2011-03-31 23:02:17 +00:00
Jakob Stoklund Olesen f7eb955046 Allow the allocation of empty live ranges that have uses.
Empty ranges may represent undef values.

llvm-svn: 128144
2011-03-23 04:32:51 +00:00
Jakob Stoklund Olesen e29d63e98a Tag cached interference with a user-provided tag instead of the virtual register number.
The live range of a virtual register may change which invalidates the cached
interference information.

llvm-svn: 127772
2011-03-16 22:56:11 +00:00
Jakob Stoklund Olesen a86595e06b Spill multiple registers at once.
Live range splitting can create a number of small live ranges containing only a
single real use. Spill these small live ranges along with the large range they
are connected to with copies. This enables memory operand folding and maximizes
the spill to fill distance.

Work in progress with known bugs.

llvm-svn: 127529
2011-03-12 04:17:20 +00:00
Jakob Stoklund Olesen 4d6eafa138 Change the Spiller interface to take a LiveRangeEdit reference.
This makes it possible to register delegates and get callbacks when the spiller
edits live ranges.

llvm-svn: 127389
2011-03-10 01:51:42 +00:00
Jakob Stoklund Olesen c6cc485051 Make SpillIs an optional pointer. Avoid creating a bunch of temporary SmallVectors.
llvm-svn: 127388
2011-03-10 01:21:58 +00:00
Jakob Stoklund Olesen 2329c542e9 Change the RAGreedy register assignment order so large live ranges are allocated first.
This is based on the observation that long live ranges are more difficult to
allocate, so there is a better chance of solving the puzzle by handling the big
pieces first. The allocator will evict and split long alive ranges when they get
in the way.

RABasic is still using spill weights for its priority queue, so the interface to
the queue has been virtualized.

llvm-svn: 126259
2011-02-22 23:01:52 +00:00
Jakob Stoklund Olesen 5bfec69b1d Add VirtRegMap::rewrite() and use it in the new register allocators.
The rewriter works almost identically to -rewriter=trivial, except it also
eliminates any identity copies.

This makes the new register allocators independent of VirtRegRewriter.cpp which
will be going away at the same time as RegAllocLinearScan.

llvm-svn: 125967
2011-02-18 22:03:18 +00:00
Jakob Stoklund Olesen 73e203e3d3 Trim debugging output.
llvm-svn: 125802
2011-02-18 00:32:47 +00:00
Jakob Stoklund Olesen 99827e861f Add basic register allocator statistics.
llvm-svn: 125789
2011-02-17 22:53:48 +00:00
Jakob Stoklund Olesen 1305bc0a65 Evict a lighter single interference before attempting to split a live range.
Registers are not allocated strictly in spill weight order when live range
splitting and spilling has created new shorter intervals with higher spill
weights.

When one of the new heavy intervals conflicts with a single lighter interval,
simply evict the old interval instead of trying to split the heavy one.

The lighter interval is a better candidate for splitting, it has a smaller use
density.

llvm-svn: 125151
2011-02-09 01:14:03 +00:00
Jakob Stoklund Olesen bf4550e3fb Pass a Banner argument to the machine code verifier both from
createMachineVerifierPass and MachineFunction::verify.

The banner is printed before the machine code dump, just like the printer pass.

llvm-svn: 122113
2010-12-18 00:06:56 +00:00
Jakob Stoklund Olesen 2e98ee31b3 Make the -verify-regalloc command line option available to base classes as
RegAllocBase::VerifyEnabled.

Run the machine code verifier in a few interesting places during RegAllocGreedy.

llvm-svn: 122107
2010-12-17 23:16:35 +00:00
Jakob Stoklund Olesen 6a5bf7782a Simplyfy RegAllocBasic by using getOverlaps instead of getAliasSet.
llvm-svn: 121801
2010-12-14 23:10:48 +00:00
Jakob Stoklund Olesen d5e38383e0 Use TRI::printReg instead of AbstractRegisterDescription when printing
LiveIntervalUnions.

llvm-svn: 121781
2010-12-14 18:53:47 +00:00
Jakob Stoklund Olesen 92da705261 Add named timer groups for the different stages of register allocation.
llvm-svn: 121604
2010-12-11 00:19:56 +00:00
Jakob Stoklund Olesen 8de03d222f Move MRI into RegAllocBase. Clean up debug output a bit.
llvm-svn: 121599
2010-12-10 23:49:00 +00:00
Andrew Trick ccef09888c Added register reassignment prototype to RAGreedy. It's a simple
heuristic to reshuffle register assignments when we can't find an
available reg.

llvm-svn: 121388
2010-12-09 18:15:21 +00:00
Jakob Stoklund Olesen e0df786c98 Store (priority,regnum) pairs in the priority queue instead of providing an
abstract priority queue interface in subclasses that want to override the
priority calculations.

Subclasses must provide a getPriority() implementation instead.

This approach requires less code as long as priorities are expressable as simple
floats, and it avoids the dangers of defining potentially expensive priority
comparison functions.

It also should speed up priority_queue operations since they no longer have to
chase pointers when comparing registers. This is not measurable, though.

Preferably, we shouldn't use floats to guide code generation. The use of floats
here is derived from the use of floats for spill weights. Spill weights have a
dynamic range that doesn't lend itself easily to a fixpoint implementation.

When someone invents a stable spill weight representation, it can be reused for
allocation priorities.

llvm-svn: 121294
2010-12-08 22:22:41 +00:00
Jakob Stoklund Olesen 5885e99405 Move RABasic::addMBBLiveIns to the base class, it is generally useful.
Minor optimization to the use of IntervalMap iterators. They are fairly
heavyweight, so prefer SI.valid() over SI != end().

llvm-svn: 121217
2010-12-08 01:06:06 +00:00
Jakob Stoklund Olesen db357d71f1 Switch LiveIntervalUnion from std::set to IntervalMap.
This speeds up RegAllocBasic by 20%, not counting releaseMemory which becomes
way faster.

llvm-svn: 121201
2010-12-07 23:18:47 +00:00
Jakob Stoklund Olesen fb207c1cb9 Simplify assertion.
llvm-svn: 121162
2010-12-07 18:51:27 +00:00
Andrew Trick fce64c938a Coding style. No significant functionality. Abandon linear scan style
in favor of the widespread llvm style. Capitalize variables and add
newlines for visual parsing. Rename variables for readability.
And other cleanup.

llvm-svn: 120490
2010-11-30 23:18:47 +00:00
Benjamin Kramer aef5bd049f Namespacify.
llvm-svn: 120146
2010-11-25 16:42:51 +00:00
Andrew Trick ada75c5ad1 RABasic fix. Regalloc is responsible for updating block live ins.
llvm-svn: 119896
2010-11-20 02:57:05 +00:00
Andrew Trick 799ec1c4d6 Whitespace.
llvm-svn: 119895
2010-11-20 02:43:55 +00:00
Andrew Trick f11344d770 Check TRI->getReservedRegs because other allocators do it. Even though
it makes no sense for allocation_order iterators to visit reserved regs.
The inline spiller depends on AliasAnalysis.
Manage the Query state to avoid uninitialized or stale results.

llvm-svn: 118800
2010-11-11 17:46:29 +00:00
Andrew Trick 89eb6a8b94 RABasic is nearly functionally complete. There are a few remaining
benchmarks hitting an assertion.
Adds LiveIntervalUnion::collectInterferingVRegs.
Fixes "late spilling" by checking for any unspillable live vregs among
all physReg aliases.

llvm-svn: 118701
2010-11-10 19:18:47 +00:00
Andrew Trick 488660554e Adds RABasic verification and tracing.
(retry now that the windows build is green)

llvm-svn: 118630
2010-11-09 21:04:34 +00:00
Andrew Trick 42d50e920b Reverting r118604. Windows build broke.
llvm-svn: 118613
2010-11-09 19:47:51 +00:00
Andrew Trick 85064c17be Adds RABasic verification and tracing.
llvm-svn: 118604
2010-11-09 19:01:17 +00:00
Andrew Trick 3528465232 Adds support for spilling previously allocated live intervals to
handle cases in which a register is unavailable for spill code.
Adds LiveIntervalUnion::extract. While processing interferences on a
live virtual register, reuses the same Query object for each
physcial reg.

llvm-svn: 118423
2010-11-08 18:02:08 +00:00
Jakob Stoklund Olesen c913201259 Let RegAllocBasic require MachineDominators - they are already available and
splitting needs them.

llvm-svn: 118194
2010-11-03 20:39:26 +00:00
Andrew Trick 84aef49e32 Jakob's review of the basic register allocator.
llvm-svn: 117384
2010-10-26 18:34:01 +00:00
Andrew Trick 1c24605a57 This is a prototype of an experimental register allocation
framework. It's purpose is not to improve register allocation per se,
but to make it easier to develop powerful live range splitting. I call
it the basic allocator because it is as simple as a global allocator
can be but provides the building blocks for sophisticated register
allocation with live range splitting. 

A minimal implementation is provided that trivially spills whenever it
runs out of registers. I'm checking in now to get high-level design
and style feedback. I've only done minimal testing. The next step is
implementing a "greedy" allocation algorithm that does some register
reassignment and makes better splitting decisions.

llvm-svn: 117174
2010-10-22 23:09:15 +00:00