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1443 Commits

Author SHA1 Message Date
Chris Lattner 07a2677e43 unbreak the build 
llvm-svn: 26260
 2006-02-17 07:09:27 +00:00
Evan Cheng 593bea73ba Unbreak x86 be 
llvm-svn: 26259
 2006-02-17 07:01:52 +00:00
Nate Begeman 5965bd19f8 kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC 
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.

llvm-svn: 26255
 2006-02-17 05:43:56 +00:00
Chris Lattner 67c21b6c46 add note about div by power of 2 
llvm-svn: 26253
 2006-02-17 04:20:13 +00:00
Evan Cheng b590d3a72b Remind ourselves to revisit the "pxor vs. xorps/xorpd to clear XMM registers" 
issue. Need to do more experiments.

llvm-svn: 26247
 2006-02-17 00:04:28 +00:00
Nate Begeman 7e5496d5fe Kill the x86 pattern isel. boom. 
llvm-svn: 26246
 2006-02-17 00:03:04 +00:00
Evan Cheng db1dbbe8d6 Remove the entry about using movapd for SSE reg-reg moves. 
llvm-svn: 26245
 2006-02-17 00:00:58 +00:00
Evan Cheng eb7b3380fd pxor (for FLD0SS) encoding was missing the OpSize prefix. 
llvm-svn: 26244
 2006-02-16 23:59:30 +00:00
Evan Cheng 24c461b51e 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This 
proves to be worth 20% on Ptrdist/ks. Might be related to dependency
   breaking support.
2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These
   are used for FR32 / FR64 reg-to-reg copies.
3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to
   spill / restore FsMOVAPSrr and FsMOVAPDrr.

llvm-svn: 26241
 2006-02-16 22:45:17 +00:00
Evan Cheng 3f99628939 Use movaps / movapd to spill / restore V4F4 / V2F8 registers. 
llvm-svn: 26240
 2006-02-16 21:20:26 +00:00
Nate Begeman 8a77efe4f7 Rework the SelectionDAG-based implementations of SimplifyDemandedBits 
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.

llvm-svn: 26238
 2006-02-16 21:11:51 +00:00
Evan Cheng 01afec2adb MOVAPSrr and MOVAPDrr instruction format should be MRMSrcReg. 
llvm-svn: 26234
 2006-02-16 19:34:41 +00:00
Evan Cheng ae82498e81 Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg 
transfer.

According to the Intel P4 Optimization Manual:

Moves that write a portion of a register can introduce unwanted
dependences. The movsd reg, reg instruction writes only the bottom
64 bits of a register, not to all 128 bits. This introduces a dependence on
the preceding instruction that produces the upper 64 bits (even if those
bits are not longer wanted). The dependence inhibits register renaming,
and thereby reduces parallelism.

Not to mention movaps is shorter than movss.

llvm-svn: 26226
 2006-02-16 01:50:02 +00:00
Evan Cheng 03c1e6f48e A bit more memset / memcpy optimization. 
Turns them into calls to memset / memcpy if 1) buffer(s) are not DWORD aligned,
2) size is not known to be greater or equal to some minimum value (currently 128).

llvm-svn: 26224
 2006-02-16 00:21:07 +00:00
Evan Cheng 7a6c21ac26 Remove an entry. 
llvm-svn: 26197
 2006-02-15 01:56:48 +00:00
Evan Cheng 2d23c9f1ab Use .zerofill on x86/darwin. 
llvm-svn: 26196
 2006-02-15 01:56:23 +00:00
Evan Cheng aacc4c3b4c cvtsd2ss / cvtss2sd encoding bug. 
llvm-svn: 26193
 2006-02-15 00:31:03 +00:00
Evan Cheng 665c26ab40 movaps, movapd encoding bug. 
llvm-svn: 26192
 2006-02-15 00:11:37 +00:00
Chris Lattner e3c793a71a new note 
llvm-svn: 26186
 2006-02-14 22:19:54 +00:00
Evan Cheng f84774ed46 Don't special case XS, XD prefixes. 
llvm-svn: 26183
 2006-02-14 21:52:51 +00:00
Evan Cheng fb7b5ef74b Bug fix: XS, XD prefixes were being emitted twice. 
XMM registers were not being handled.

llvm-svn: 26182
 2006-02-14 21:45:24 +00:00
Evan Cheng 43b72f4421 Duh 
llvm-svn: 26180
 2006-02-14 20:37:37 +00:00
Evan Cheng ad8c20cd2b Remove -disable-x86-sse 
llvm-svn: 26179
 2006-02-14 20:30:14 +00:00
Evan Cheng 4b40a42653 Rename maxStoresPerMemSet to maxStoresPerMemset, etc. 
llvm-svn: 26174
 2006-02-14 08:38:30 +00:00
Evan Cheng f976d79f78 Add a entry. 
llvm-svn: 26173
 2006-02-14 08:25:32 +00:00
Evan Cheng 6a37456d73 Set maxStoresPerMemSet to 16. Ditto for maxStoresPerMemCpy and 
maxStoresPerMemMove. Although the last one is not used.

llvm-svn: 26172
 2006-02-14 08:25:08 +00:00
Evan Cheng 40b6eb9973 Enable SSE (for the right subtargets) 
llvm-svn: 26169
 2006-02-14 08:07:58 +00:00
Chris Lattner 62c3484e43 Switch targets over to using SelectionDAG::getCALLSEQ_START to create 
CALLSEQ_START nodes.

llvm-svn: 26143
 2006-02-13 09:00:43 +00:00
Evan Cheng a86ba85dc5 Prevent certain nodes that have already been selected from being folded into 
X86 addressing mode. Currently we do not allow any node whose target node
produces a chain as well as any node that is at the root of the addressing
mode expression tree.

llvm-svn: 26117
 2006-02-11 02:05:36 +00:00
Evan Cheng 2b6f78b664 Nicer code. :-) 
llvm-svn: 26111
 2006-02-10 22:46:26 +00:00
Evan Cheng d49cc3634e Added X86 isel debugging stuff. 
llvm-svn: 26110
 2006-02-10 22:24:32 +00:00
Evan Cheng 907be3e24c Remove a completed entry; add a new entry about fisttp op 
llvm-svn: 26105
 2006-02-10 05:48:15 +00:00
Evan Cheng 101e4b916a Match tblgen change. 
llvm-svn: 26096
 2006-02-09 22:12:53 +00:00
Evan Cheng d1b82d8db0 Match getTargetNode() changes (now return SDNode* instead of SDOperand). 
llvm-svn: 26085
 2006-02-09 07:17:49 +00:00
Chris Lattner d94a3d2c8a provide an explicit alignment for cp entries 
llvm-svn: 26069
 2006-02-09 02:15:30 +00:00
Evan Cheng 6dc90ca172 Change Select() from 
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);

llvm-svn: 26067
 2006-02-09 00:37:58 +00:00
Chris Lattner 2e07d6370a Darwin doesn't support #APP/#NO_APP 
llvm-svn: 26066
 2006-02-08 23:42:22 +00:00
Chris Lattner b4fc050f0f add a simple optimization 
llvm-svn: 26062
 2006-02-08 17:47:22 +00:00
Chris Lattner b7e074ab9b more email -> README moving 
llvm-svn: 26054
 2006-02-08 07:12:07 +00:00
Chris Lattner 45bb34b715 Add some random notes, not high-prio 
llvm-svn: 26052
 2006-02-08 06:52:06 +00:00
Evan Cheng adeb8fb5a2 Fixed a local common symbol bug. 
llvm-svn: 26044
 2006-02-07 23:32:58 +00:00
Evan Cheng ec212fb66d For ELF, .comm takes alignment value as the optional 3rd argument. It must be 
specified in bytes.

llvm-svn: 26043
 2006-02-07 21:54:08 +00:00
Evan Cheng 5a76680de1 Darwin ABI issues: weak, linkonce, etc. dynamic-no-pic support is complete. 
Also fixed a function stub bug. Added weak and linkonce support for
x86 Linux.

llvm-svn: 26038
 2006-02-07 08:38:37 +00:00
Evan Cheng 227e469c25 Remind myself to add PIC and static asm printer support. 
llvm-svn: 26037
 2006-02-07 08:35:44 +00:00
Chris Lattner d62a3bfa66 Eliminate the printCallOperand method, using a 'call' modifier on 
printOperand instead.

llvm-svn: 26025
 2006-02-06 23:41:19 +00:00
Evan Cheng d5f2ba0d6f - Update load folding checks to match those auto-generated by tblgen. 
- Manually select SDOperand's returned by TryFoldLoad which make up the
  load address.

llvm-svn: 26012
 2006-02-06 06:02:33 +00:00
Evan Cheng 54cb1833a4 Use SelectRoot() as entry of any tblgen based isel. 
llvm-svn: 25997
 2006-02-05 06:46:41 +00:00
Evan Cheng d19d51f414 Re-commit the last bit of change that was backed out. 
llvm-svn: 25983
 2006-02-05 05:25:07 +00:00
Chris Lattner c070cb685d Use getPreferredAlignmentLog. 
llvm-svn: 25980
 2006-02-05 01:45:04 +00:00
Chris Lattner 22b4edfb42 Temporarily revert this patch, which probably breaks with the 
tblgen patch reverted.

llvm-svn: 25971
 2006-02-04 09:24:16 +00:00