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24 Commits

Author SHA1 Message Date
Jan Vesely 06200bd7bc AMDGPU/R600: Don't use REGISTER_{LOAD,STORE} ISD nodes 
This will make transition to SCRATCH_MEMORY easier

Differential Revision: https://reviews.llvm.org/D24746

llvm-svn: 291279
 2017-01-06 21:00:46 +00:00
Matt Arsenault 7bee6ac798 AMDGPU: Refactor exp instructions 
Structure the definitions a bit more like the other classes.

The main change here is to split EXP with the done bit set
to a separate opcode, so we can set mayLoad = 1 so that it won't
be reordered before the other exp stores, since this has the special
constraint that if the done bit is set then this should be the last
exp in she shader.

Previously all exp instructions were inferred to have unmodeled
side effects.

llvm-svn: 288695
 2016-12-05 20:23:10 +00:00
Peter Collingbourne 2261d78cd2 Target: Remove unused patterns and transforms. NFC. 
llvm-svn: 283515
 2016-10-07 00:30:49 +00:00
Matt Arsenault 2712d4a3d8 AMDGPU: Select mulhi 24-bit instructions 
llvm-svn: 279902
 2016-08-27 01:32:27 +00:00
Jan Vesely 0486f739a4 AMDGPU/R600: Convert buffer id to VTX_READ input 
Use patterns instead of multiple instructions
Add buffer id to asm string

https://reviews.llvm.org/D22650

llvm-svn: 278749
 2016-08-15 21:38:30 +00:00
Matt Arsenault 82e5e1e564 AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 
llvm-svn: 275619
 2016-07-15 21:27:08 +00:00
Matt Arsenault 09b2c4aee8 AMDGPU: Remove legacy rsq.clamped intrinsic 
Mesa still has a use of llvm.AMDGPU.rsq.f64 remaining.

Also fix mismatch with non-IEEE rsq selecting to IEEE rsq.

llvm-svn: 275617
 2016-07-15 21:26:52 +00:00
Matt Arsenault ca7f5701f8 AMDGPU/R600: Delete/rename intrinsics no longer used by mesa 
Use the replacement pass to update the tests, and delete old names.

llvm-svn: 275375
 2016-07-14 05:47:17 +00:00
Matt Arsenault 648e422bd9 AMDGPU/R600: Remove intrinsics with no tests and no users 
Mesa removed this path, so nothing is using these anymore.

llvm-svn: 275372
 2016-07-14 05:23:23 +00:00
Jan Vesely 2fa28c330c AMDGPU/R600: Add implicitarg.ptr intrinsic 
Differential Revision: http://reviews.llvm.org/D21622

llvm-svn: 275024
 2016-07-10 21:20:29 +00:00
Tom Stellard 4a105d73a9 AMDGPU/R600: Add PatFrags for selecting the correct vtx id for loads 
This moves of the r600 logic out of isGlobalLoad() and into the
TableGen files.

Differential Revision: http://reviews.llvm.org/D21710

llvm-svn: 274527
 2016-07-05 00:12:51 +00:00
Jan Vesely 991dfd7b07 AMDGPU/R600: Add indentation to VTX and TEX fetch asm strings 
These are printed as part of Fetch clauses.

Differential Revision: http://reviews.llvm.org/D21730

llvm-svn: 274517
 2016-07-04 19:45:00 +00:00
Matt Arsenault 43e92fe306 AMDGPU: Cleanup subtarget handling. 
Split AMDGPUSubtarget into amdgcn/r600 specific subclasses.
This removes most of the static_casting of the basic codegen
classes everywhere, and tries to restrict the features
visible on the wrong target.

llvm-svn: 273652
 2016-06-24 06:30:11 +00:00
Matt Arsenault 9babdf4265 AMDGPU: Fix verifier errors in SILowerControlFlow 
The main sin this was committing was using terminator
instructions in the middle of the block, and then
not updating the block successors / predecessors.
Split the blocks up to avoid this and introduce new
pseudo instructions for branches taken with exec masking.

Also use a pseudo instead of emitting s_endpgm and erasing
it in the special case of a non-void return.

llvm-svn: 273467
 2016-06-22 20:15:28 +00:00
Jan Vesely f97de00745 AMDGPU/R600: Implement memory loads from constant AS 
Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19792

llvm-svn: 269479
 2016-05-13 20:39:29 +00:00
Matt Arsenault 79963e80b8 AMDGPU: Rename intrinsic to better match instruction name 
Also fixes missing f32 test.

llvm-svn: 260780
 2016-02-13 01:03:00 +00:00
Matt Arsenault 295875efda AMDGPU: Remove 24-bit intrinsics 
The known bit matching code seems to work reasonably well,
so these shouldn't really be needed.

llvm-svn: 259180
 2016-01-29 10:05:16 +00:00
Matt Arsenault 7713162c32 AMDGPU: Remove more unused intrinsics 
Replace tests with lrp with basic IR expansion

llvm-svn: 258612
 2016-01-23 05:42:38 +00:00
Matt Arsenault ee0930821a AMDGPU: Remove random TGSI intrinsic 
I don't think this was ever used.

llvm-svn: 258514
 2016-01-22 18:42:44 +00:00
Matt Arsenault 0cbaa1762b AMDGPU: Remove AMDGPU.fract intrinsic 
Mesa doesn't use this, and this is pattern matched already
from fsub x, (ffloor x)

llvm-svn: 258513
 2016-01-22 18:42:38 +00:00
Bruce Mitchener e9ffb45b60 Fix typos. 
Summary: This fixes a variety of typos in docs, code and headers.

Subscribers: jholewinski, sanjoy, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D12626

llvm-svn: 247495
 2015-09-12 01:17:08 +00:00
Tom Stellard 45bb48ea19 R600 -> AMDGPU rename 
llvm-svn: 239657
 2015-06-13 03:28:10 +00:00
Tom Stellard 1be1aa84ec Revert "AMDGPU: Add core backend files for R600/SI codegen v6" 
This reverts commit 4ea70107c5e51230e9e60f0bf58a0f74aa4885ea.

llvm-svn: 160303
 2012-07-16 18:19:53 +00:00
Tom Stellard bcce80fa95 AMDGPU: Add core backend files for R600/SI codegen v6 
llvm-svn: 160270
 2012-07-16 14:17:08 +00:00