2cb85b4020
'static const void *X = &&y' can only be put in the
...
readonly section if a reference to the containing function
is valid in the readonly section.
llvm-svn: 85370
2009-10-28 04:12:16 +00:00
cd139c0373
Rewrite SelectionDAG::isPredecessorOf to be iterative instead of
...
recursive to avoid consuming extraordinary amounts of stack space
when processing tall graphs.
llvm-svn: 85369
2009-10-28 03:44:30 +00:00
3432c62d93
full asmparser support for blockaddress. We can now do:
...
$ llvm-as foo.ll -d -disable-output
which reads and prints the .ll file. BC encoding is the
next project. Testcase will go in once that works.
llvm-svn: 85368
2009-10-28 03:39:23 +00:00
214cc709bc
asmprinter support for BlockAddress.
...
llvm-svn: 85367
2009-10-28 03:38:12 +00:00
3a39530445
when we tear down a module, we need to be careful to
...
zap BlockAddress values.
llvm-svn: 85366
2009-10-28 03:37:35 +00:00
1b44f10ff4
Teach MachineLICM to unfold loads from constant memory from
...
otherwise unhoistable instructions in order to allow the loads
to be hoisted.
llvm-svn: 85364
2009-10-28 03:21:57 +00:00
4a609f3cef
Use fconsts and fconstd to materialize small fp constants.
...
llvm-svn: 85362
2009-10-28 01:44:26 +00:00
83896a59e1
Add a second ValueType argument to isFPImmLegal.
...
llvm-svn: 85361
2009-10-28 01:43:28 +00:00
4b46cbfc23
Mark dead physregdefs dead immediately. This helps MachineSink and
...
MachineLICM and other things which run before LiveVariables is run.
llvm-svn: 85360
2009-10-28 01:13:53 +00:00
75d6a4afd2
Allow constants of different types to share constant pool entries
...
if they have compatible encodings.
llvm-svn: 85359
2009-10-28 01:12:16 +00:00
deab9dee12
Remove getIEEEFloatParts and getIEEEDoubleParts. They are not needed.
...
llvm-svn: 85358
2009-10-28 01:08:17 +00:00
9c6bc1f563
Update SystemZ to use PSW following the way x86 uses EFLAGS. Besides
...
eliminating a use of MVT::Flag, this is needed for an upcoming CodeGen
change.
This unfortunately requires SystemZ to switch to the list-burr
scheduler, in order to handle the physreg defs properly, however
that's what LLVM has available at this time.
llvm-svn: 85357
2009-10-28 00:55:57 +00:00
e4b80c9bee
Add an indirect branch pattern for ARM. Testcase will be coming soon.
...
llvm-svn: 85355
2009-10-28 00:37:03 +00:00
d04cb6d0fa
rename indbr -> indirectbr to appease the residents of #llvm.
...
llvm-svn: 85351
2009-10-28 00:19:10 +00:00
31b132c0b7
IR support for the new BlockAddress constant kind. This is
...
untested and there is no way to use it, next up: doing battle
with asmparser.
llvm-svn: 85349
2009-10-28 00:01:44 +00:00
9693f9d465
Record CodeGen optimization level in the BranchFolding pass so that we can
...
use it to control tail merging when there is a tradeoff between performance
and code size. When there is only 1 instruction in the common tail, we have
been merging. That can be good for code size but is a definite loss for
performance. Now we will avoid tail merging in that case when the
optimization level is "Aggressive", i.e., "-O3". Radar 7338114.
Since the IfConversion pass invokes BranchFolding, it too needs to know
the optimization level. Note that I removed the RegisterPass instantiation
for IfConversion because it required a default constructor. If someone
wants to keep that for some reason, we can add a default constructor with
a hard-wired optimization level.
llvm-svn: 85346
2009-10-27 23:49:38 +00:00
f6ee7bea88
Rename lib/VMCore/ConstantsContext.h:ValueMap<> to ConstantUniqueMap<> to avoid
...
colliding with llvm/ADT/ValueMap.h:ValueMap<>.
llvm-svn: 85344
2009-10-27 23:45:55 +00:00
2e5198ff09
Add new note.
...
llvm-svn: 85341
2009-10-27 23:30:07 +00:00
cd3939ef0e
Fixed a bug in the coalescer where intervals were occasionally merged despite a real interference. This fixes rdar://problem/7157961.
...
llvm-svn: 85338
2009-10-27 23:16:58 +00:00
5607d2cb54
Enable virtual register based frame index scavenging by default for ARM & T2.
...
llvm-svn: 85335
2009-10-27 22:52:29 +00:00
fd2730ee8c
Move and clarify note.
...
llvm-svn: 85334
2009-10-27 22:48:31 +00:00
c1403a0024
Infrastructure for dynamic stack realignment on ARM. For now, this is off by
...
default behind a command line option. This will enable better performance for
vectors on NEON enabled processors.
llvm-svn: 85333
2009-10-27 22:45:39 +00:00
2974f63cb5
Note corrected.
...
llvm-svn: 85332
2009-10-27 22:43:24 +00:00
cd4d148040
Modify note.
...
llvm-svn: 85331
2009-10-27 22:40:45 +00:00
a205402c16
Add a note.
...
llvm-svn: 85329
2009-10-27 22:34:43 +00:00
11cf3f4a27
Factor out redundancy from clone() implementations.
...
llvm-svn: 85327
2009-10-27 22:16:29 +00:00
a5e078b677
Update the MachineBasicBlock CFG for an indirect branch.
...
llvm-svn: 85325
2009-10-27 22:10:34 +00:00
a4374e66f0
Add CodeGen support for indirect branches.
...
llvm-svn: 85323
2009-10-27 21:56:26 +00:00
6d8b15bebc
make the build build.
...
llvm-svn: 85319
2009-10-27 21:43:39 +00:00
67c902147e
Add new APFloat methods that return sign, exp, and mantissa of ieee float and double values.
...
llvm-svn: 85318
2009-10-27 21:35:42 +00:00
c5c281ea44
Random updates to passes for indbr, I need blockaddress before I can do much more.
...
llvm-svn: 85316
2009-10-27 21:27:42 +00:00
e8628a0206
cppbackend support for indbr
...
llvm-svn: 85312
2009-10-27 21:24:48 +00:00
42c979e8d3
CBE support for indbr.
...
llvm-svn: 85311
2009-10-27 21:21:06 +00:00
cde65ec581
Similar to r85280, do not clear the "S" bit for RSBri and RSBrs.
...
llvm-svn: 85299
2009-10-27 20:51:49 +00:00
cfeaa48642
Do not held on to DenseMap slot accross map insertion. The insertion may cause the map to grow rending the slot invalid.
...
Use this opportunity to use ValueMap instead of DenseMap.
llvm-svn: 85298
2009-10-27 20:47:17 +00:00
4f36affe5f
Set condition code bits of BL and BLr9 to 0b1110 (ALways) to distinguish between
...
BL_pred and BLr9_pred.
llvm-svn: 85297
2009-10-27 20:45:15 +00:00
26076a8f10
don't use stdio
...
llvm-svn: 85296
2009-10-27 20:42:54 +00:00
4567db45b8
Change the JIT to compile eagerly by default as agreed in
...
http://llvm.org/PR5184 , and beef up the comments to describe what both options
do and the risks of lazy compilation in the presence of threads.
llvm-svn: 85295
2009-10-27 20:30:28 +00:00
f390e04a47
Rename MallocFreeHelper as MemoryBuiltins
...
llvm-svn: 85286
2009-10-27 20:05:49 +00:00
16993aa30b
Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target.
...
llvm-svn: 85281
2009-10-27 19:56:55 +00:00
b5044ce5a9
Do not clear the "S" bit for RSCri and RSCrs. They inherit from the "sI"
...
instruction format that already takes care of setting this.
llvm-svn: 85280
2009-10-27 19:52:03 +00:00
3ed871fe62
add enough support for indirect branch for the feature test to pass
...
(assembler,asmprinter, bc reader+writer) and document it. Codegen
currently aborts on it.
llvm-svn: 85274
2009-10-27 19:13:16 +00:00
df5dcdaa10
Explicitly specify 0b00, i.e, zero rotation, as the rotate filed (Inst{11-10})
...
for the r/rr fragment of the multiclass AI_unary_rrot/AI_bin_rrot.
llvm-svn: 85271
2009-10-27 18:44:24 +00:00
a789f17ffc
Remove unnecessary gotos to fall-thru successors.
...
llvm-svn: 85257
2009-10-27 17:40:24 +00:00
b678a56fef
Test commit. Added '.' to the comment line.
...
llvm-svn: 85255
2009-10-27 17:25:15 +00:00
26a7ae4fba
Type.h doesn't need to #include LLVMContext.h
...
llvm-svn: 85254
2009-10-27 17:08:31 +00:00
0997991252
pseudosourcevalue is also still using getGlobalContext(), so it isn't
...
thread safe either.
llvm-svn: 85253
2009-10-27 17:02:08 +00:00
fb22a85baf
apparently the X86 JIT isn't fully contextized, it is still using getGlobalContext() :(
...
llvm-svn: 85252
2009-10-27 17:01:03 +00:00
d90d169f9d
Correctly align double arguments in the stack.
...
llvm-svn: 85235
2009-10-27 14:09:44 +00:00
c6b3b25f94
Fix a pretty serious misfeature of the inliner: if it inlines a function
...
with multiple return values it inserts a PHI to merge them all together.
However, if the return values are all the same, it ends up with a pointless
PHI and this pointless PHI happens to really block SRoA from happening in
at least a silly C++ example written by Doug, but probably others. This
fixes rdar://7339069.
llvm-svn: 85206
2009-10-27 05:39:41 +00:00
Chris Lattner