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32 Commits

Author SHA1 Message Date
Michael Kuperstein 5c2cb0eee2 [X86] Fix some non-reserved parameter names in intrinsic headers 
Differential Revision: http://reviews.llvm.org/D13009

llvm-svn: 248150
 2015-09-21 11:45:27 +00:00
Simon Pilgrim 5aba9925c0 [X86][SSE] Add _mm_undefined_* intrinsics 
Added missing SSE/AVX 'undefined' intrinsics (PR24040):

_mm_undefined_pd, _mm_undefined_ps + _mm_undefined_si128
_mm256_undefined_pd, _mm256_undefined_ps + _mm256_undefined_si256
_mm512_undefined, _mm512_undefined_ps, _mm512_undefined_pd + _mm512_undefined_epi32

Added builtin intrinsicss:

__builtin_ia32_undef128, __builtin_ia32_undef256 + __builtin_ia32_undef512

Differential Revision: http://reviews.llvm.org/D12052

llvm-svn: 246083
 2015-08-26 21:17:12 +00:00
Asaf Badouh f6a58b6dff [X86][AVX512F] Add FP scalar intrinsics 
intrinsics for: add/sub/mul/div/min/max in their FP scalar versions

Differential Revision: http://reviews.llvm.org/D11418

llvm-svn: 243009
 2015-07-23 12:13:32 +00:00
Asaf Badouh ffeb624483 [X86][AVX512F] add FP arithmetic intrinsics 
add/div/mul/sub include rounding versions


Differential Revision: http://reviews.llvm.org/D11354

llvm-svn: 242790
 2015-07-21 15:27:28 +00:00
Michael Kuperstein e45af54cdb [X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR 
llvm-svn: 241065
 2015-06-30 13:36:19 +00:00
Elena Demikhovsky c563c2c61a AVX-512: Implemented AVX-512 FMA intrinsics and tests. 
by Igor Breger

http://reviews.llvm.org/D10797

llvm-svn: 240928
 2015-06-29 09:20:57 +00:00
Eric Christopher 9fc7fb274e Update the intel intrinsic headers to use the target attribute support. 
This involved removing the conditional inclusion and replacing them
with target attributes matching the original conditional inclusion
and checks. The testcase update removes the macro checks for each
file and replaces them with usage of the __target__ attribute, e.g.:

int __attribute__((__target__(("sse3")))) foo(int a) {
  _mm_mwait(0, 0);
  return 4;
}

This usage does require the enclosing function have the requisite
__target__ attribute for inlining and code generation - also for
any macro intrinsic uses in the enclosing function. There's no change
for existing uses of the intrinsic headers.

llvm-svn: 239883
 2015-06-17 07:09:32 +00:00
Eric Christopher 4d185168e9 Use a define for per-file function attributes for the Intel intrinsic headers. 
This is a precursor to changing them to use the new target attribute
code.

llvm-svn: 239882
 2015-06-17 07:09:20 +00:00
Elena Demikhovsky 35dc8c0944 AVX-512: added intrinsics for KNL and SKX 
by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 235986
 2015-04-28 13:28:01 +00:00
Elena Demikhovsky 29da2fba46 AVX-512: added clang intrinsics for logical and, or xor for 512 bits 
by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 233794
 2015-04-01 06:54:16 +00:00
David Majnemer 1cf22e690d Headers: Don't use attribute keywords which aren't reserved 
Instead of using 'unavailable', use '__unavailable__'

llvm-svn: 228087
 2015-02-04 00:26:10 +00:00
Craig Topper 53565c60e7 [X86] Add other flavors of AVX512 cmpps/cmppd intrinsics. 
llvm-svn: 227773
 2015-02-01 22:27:40 +00:00
Craig Topper 67826a5883 [X86] Rename _mm512_valign_epi64/32 intrinsics to _mm512_alignr_epi64/32 to match Intel docs. Make immediate argument to them an ICE. Fix mask size for the alignd version. 
llvm-svn: 227713
 2015-02-01 07:35:40 +00:00
Craig Topper 72c7d51251 [X86] Change rounding parameter of all the AVX512 builtins to an ICE. 
llvm-svn: 227712
 2015-02-01 07:35:35 +00:00
Craig Topper 4cac1c2318 [X86] Add AVX512F integer comparision intrinsics to header file. 
llvm-svn: 227067
 2015-01-25 23:30:07 +00:00
Adam Nemet f893edeaea [AVX512] Add sub-vector FP extracts 
Analogous to AVX2, these need to be implemented as macros to properly
propagate the immediate index operand.

Part of <rdar://problem/17688758>

llvm-svn: 226496
 2015-01-19 20:12:05 +00:00
Craig Topper f557b09f14 [x86] Mark that the AVX-512 cmpps/cmppd builtins need an ICE for the comparison immediate. This requires converting to a macro in the header file. 
llvm-svn: 226421
 2015-01-19 01:18:19 +00:00
Adam Nemet c0cff244fc [AVX512] Add intrinsics for masked aligned FP loads and stores 
Part of <rdar://problem/17688758>

llvm-svn: 226298
 2015-01-16 18:51:50 +00:00
Adam Nemet 63a951eb1c [AVX512] Add FP unpack intrinsics 
These are implemented with __builtin_shufflevector just like AVX.

We have some tests on the LLVM side to assert that these shufflevectors do
indeed generate the corresponding unpck instruction.

Part of <rdar://problem/17688758>

llvm-svn: 225922
 2015-01-14 01:31:17 +00:00
Robert Khasanov b9f3a911c9 [AVX512] Added VPCMPEQ intrinisics to headers. 
Added tests.

Patch by Maxim Blumenthal <maxim.blumenthal@intel.com>

llvm-svn: 219319
 2014-10-08 17:18:13 +00:00
Adam Nemet 2278fcbf0c [AVX512] Add FMA intrinsics 
Part of <rdar://problem/17688758>

llvm-svn: 215666
 2014-08-14 17:17:57 +00:00
Adam Nemet 4abc07cb75 [AVX512] Add intrinsics for FP scalar broadcasts 
Similar approach to the set1 intrinsics is used: implement in terms of vector
initializers and then ensure with an LLVM test that a broadcast is generated
at the end.

Part of <rdar://problem/17688758>

llvm-svn: 215486
 2014-08-13 00:29:01 +00:00
Adam Nemet 5bf7baa938 [AVX512] Add intrinsic for valignd/q 
Note that similar to palingr, we could further optimize these to emit
shufflevector when the shift count is <=64.  This however does not
change the overall design that unlike palignr we would still need the LLVM
intrinsic corresponding to this intruction to handle the >64 cases.  (palignr
uses the psrldq intrinsic in this case.)

llvm-svn: 214891
 2014-08-05 17:28:23 +00:00
Adam Nemet da82bcc4dd [AVX512] Add unaligned FP load intrinsics 
Part of <rdar://problem/17688758>

llvm-svn: 214380
 2014-07-31 04:00:39 +00:00
Adam Nemet 2db1d2fb32 [AVX512] Add intrinsic for knot 
Part of <rdar://problem/17688758>

llvm-svn: 214316
 2014-07-30 16:51:27 +00:00
Adam Nemet c871ff95f3 [AVX512] Add some of the FP cast intrinsics 
Part of <rdar://problem/17688758>

llvm-svn: 214315
 2014-07-30 16:51:24 +00:00
Adam Nemet f42e7a274a [AVX512] Add set1 intrinsics 
(Dropped the byte and word variants from the patch.  Turns out these are not
part of AVX512F but only AVX512BW/VL.)

Part of <rdar://problem/17688758>

llvm-svn: 214314
 2014-07-30 16:51:22 +00:00
Adam Nemet fce1ad0b99 [AVX512] Add non-masking FP store intrinsics 
Part of <rdar://problem/17688758>

llvm-svn: 214099
 2014-07-28 17:14:45 +00:00
Adam Nemet a3ebe6214b [AVX512] Add FP add/sub/mul intrinsics 
Part of <rdar://problem/17688758>

llvm-svn: 214098
 2014-07-28 17:14:42 +00:00
Adam Nemet 0d5bb5530d [AVX512] Reorder functions in avx512fintrin.h 
There is no functional change here.

The idea is to have a similar order and categories of functions that we have
in avxintrin.h.

llvm-svn: 214097
 2014-07-28 17:14:40 +00:00
Adam Nemet 9a3ea60a2c [AVX512] Bring the formatting of avx512fintrin.h closer to avxintrin.h 
llvm-svn: 214096
 2014-07-28 17:14:38 +00:00
Elena Demikhovsky fcc6df310d AVX-512: Added intrinsics to clang. 
The set is small, that what I have right now.
Everybody is welcome to add more.

llvm-svn: 213641
 2014-07-22 11:31:39 +00:00