Commit Graph

392371 Commits

Author SHA1 Message Date
Hendrik Greving e15e1417b9 [ModuloSchedule] Pass loop block explicitly to kernel rewriter.
This change is NFC upstream. We pass in the loop's block to the kernel
rewriter explicitly, instead of assuming it's the loop's top block. This
change is made for downstream targets where this assumption doesn't hold.

Differential Revision: https://reviews.llvm.org/D104811
2021-06-25 09:51:22 -07:00
Xun Li b7f24923a3 [Coroutines] Remove all legacy test command
With new pm becomes the default, the old-style test command becomes exactly the same as the new test command, i.e. the two commands are now redundant.
We should just delete the old command. (unless someone wants to add enable-new-pm=0 to all old commands.

Differential Revision: https://reviews.llvm.org/D104895
2021-06-25 09:46:55 -07:00
Sander de Smalen b732e6c9a8 Revert "[GlobalISel] NFC: Have LLT::getSizeInBits/Bytes return a TypeSize."
This patch seems to be causing build errors, reverting it for now.

This reverts commit aeab9d9570.
2021-06-25 17:37:16 +01:00
Nikita Popov 1e6303e60c [OpaquePtr] Allow globals with opaque pointer value type
Do this by making opaque pointers a valid pointer element type,
for which we implicitly create an opaque pointer (moving the logic
from getPointerTo into PointerType::get).

We'll never create something like a "pointer to opaque pointer",
but accept it in the API, because a lot of code reasonably assumes
that you can create a pointer to pointer type.

Differential Revision: https://reviews.llvm.org/D104902
2021-06-25 18:22:26 +02:00
Chris Bond 4d8156ef87 [lldb-vscode] Make extension contribute breakpoints use new package.json schema
See https://code.visualstudio.com/updates/v1_42#_implement-a-debug-adapter-inside-an-extension

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D104882
2021-06-25 18:21:26 +02:00
Sanjay Patel 1076b6c4f0 [Analysis] use better version of getLibFunc to check for alloc/free calls
There's no reason to use the weaker name-only analysis when we
have a function prototype to check (in fact, we probably should
not even have that name-only function exposed for general use,
but removing it requires auditing all of the callers).

The version of getLibFunc that takes a Function argument also
does some prototype checking to make sure the arguments/return
type match the expected signature of a real library call.

This is NFC-intended because the code in MemoryBuiltins does its
own function signature checking. For now, that means there may
be some redundancy in the checking, but that should not be above
the noise for compile-time. Ideally, we can move the checks to
a single location.

There's still a hole in the logic that allows the example in
https://llvm.org/PR50846 to cause a compiler crash.
2021-06-25 12:14:07 -04:00
Sander de Smalen aeab9d9570 [GlobalISel] NFC: Have LLT::getSizeInBits/Bytes return a TypeSize.
To reflect that the size may be scalable, a TypeSize is returned
instead of an unsigned. In places where the result is used,
it currently relies on an implicit cast of TypeSize -> uint64_t,
which asserts that the type is not scalable.

This patch is NFC for fixed-width vectors.

Reviewed By: aemerson

Differential Revision: https://reviews.llvm.org/D104454
2021-06-25 17:06:50 +01:00
Jay Foad c3cc9d1eb2 [AMDGPU] Removed unused Predicate HasOffset3fBug. NFC.
The predicate definition didn't make sense anyway because it was defined
as being the opposite of what the name suggests.
2021-06-25 16:58:44 +01:00
Krzysztof Parzyszek 8a9ec39bd0 [Hexagon] Convert getTypeAlignment to return Align
Plus some minor related changes of the same nature.
2021-06-25 10:53:14 -05:00
Andrzej Warzynski c3ebb53eab [flang][unittest] Add a missing dependency
In https://reviews.llvm.org/D103612, a definition of an instance of
`Fortran::parser::AnalyzedObjectsAsFortran` was moved (that object is
used in unparsing). That, in turn, introduced a dependency of the unit
tests on the `FortranEvaluate` library, which defines
`AnalyzedObjectsAsFortran`.

That dependency was missed in D103612 and has caused shared-library
builds to fail. I'm submitting this without a review, as it's rather
straightforward omission.
2021-06-25 16:42:45 +01:00
Mark de Wever e00969c0b7 [libc++][NFC] Rename include guard. 2021-06-25 17:34:30 +02:00
Sander de Smalen c9acd2f32e [GlobalISel] NFC: Change LLT::changeNumElements to LLT::changeElementCount.
Reviewed By: aemerson

Differential Revision: https://reviews.llvm.org/D104453
2021-06-25 15:54:00 +01:00
Kadir Cetinkaya 8f2bf93b5b
[clangd] Introduce a log-prefix flag to remote-index-server
Differential Revision: https://reviews.llvm.org/D104843
2021-06-25 16:51:29 +02:00
Kadir Cetinkaya 3aa6ca8def
[clangd] Call malloc_trim in clangd-index-server periodically
Differential Revision: https://reviews.llvm.org/D104841
2021-06-25 16:49:31 +02:00
Yaxun (Sam) Liu 4921ecfc81 [clang] Fix build failure due to _S
_S is a reserved identifier in <ctype.h> on Solaris.
2021-06-25 10:10:27 -04:00
Yaxun (Sam) Liu 3193133add [OpenCL] Do not include default header for preprocessor output as input
When clang driver is used with -save-temps to compile OpenCL program,
clang driver first launches clang -cc1 -E to generate preprocessor expansion output,
then launches clang -cc1 with the generated preprocessor expansion output as input
to generate LLVM IR.

Currently clang by default passes "-finclude-default-header" "-fdeclare-opencl-builtins"
in both steps, which causes default header included again in the second step, which
causes error.

This patch let clang not to include default header when input type is preprocessor expansion
output, which fixes the issue.

Reviewed by: Anastasia Stulova

Differential Revision: https://reviews.llvm.org/D104800
2021-06-25 10:01:51 -04:00
Florian Hahn 91053e327c
[LV] Reflow comment for VectorizationCostTy (NFC). 2021-06-25 14:20:06 +01:00
Andrzej Warzynski 2a7bb8494e [flang][driver] Add `-fno-analyzed-objects-for-unparse`
This patch adds a new option for the new Flang driver:
`-fno-analyzed-objects-for-unparse`. The semantics are similar to
`-funparse-typed-exprs-to-f18-fc` from `f18`. For consistency, the
latter is replaced with `-fno-analyzed-objects-for-unparse`.

The new option controls the behaviour of the unparser (i.e. the action
corresponding to `-fdebug-unparse`). The default behaviour is to use the
analyzed objects when unparsing. The new flag can be used to turn this
off, so that the original parse-tree objects are used. The analyzed
objects are generated during the semantic checks [1].

This patch also updates the semantics of
`-fno-analyzed-objects-for-unparse`/`-funparse-typed-exprs-to-f18-fc`
in `f18`, so that this flag is always taken into account when `Unparse`
is used (this way the semantics in `f18` and `flang-new` are identical).

The added test file is based on example from Peter Steinfeld.

[1]
https://github.com/llvm/llvm-project/blob/main/flang/docs/Semantics.md

Differential Revision: https://reviews.llvm.org/D103612
2021-06-25 13:28:12 +01:00
serge-sans-paille f7b1fa6f5e [NFC] remove unreferenced function ResolveIPV4HostName
Differential Revision: https://reviews.llvm.org/D104856
2021-06-25 13:45:11 +02:00
Jon Chesterfield 96f6873dff [OpenMP][NFC] Drop unused headers from amdgpu plugin 2021-06-25 12:08:56 +01:00
Stuart Brady e47027d091 [OpenCL] Use DW_LANG_OpenCL language tag for OpenCL C
Note regarding C++ for OpenCL:

   When compiling C++ for OpenCL, DW_LANG_C_plus_plus* is emitted.

   There is no DWARF language code defined for C++ for OpenCL as of yet,
   but DWARF issue 210514.1 has been raised to request one.

   In the mean time, continuing to emit DW_LANG_C_plus_plus* for C++ for
   OpenCL allows the potential to distinguish between C++ for OpenCL and
   OpenCL C in !DICompileUnit nodes, whereas using DW_LANG_OpenCL for
   C++ for OpenCL would prevent this.

   This change therefore leaves C++ for OpenCL as-is.

Reviewed By: shchenz, Anastasia

Differential Revision: https://reviews.llvm.org/D104118
2021-06-25 11:48:42 +01:00
Sander de Smalen 968980ef08 [GlobalISel] NFC: Change LLT::scalarOrVector to take ElementCount.
Reviewed By: aemerson

Differential Revision: https://reviews.llvm.org/D104452
2021-06-25 11:26:16 +01:00
David Spickett 6e5c4a443d [lldb] Re-enable GDB server client memory tag read tests
These were disabled in 473a3a773e
because they failed on 32 bit platforms. (Arm for sure but I assume
any 32 bit)

This was due to the printf formatter used. These assumed
that types like uint64_t/size_t would be certain size/type and
that changes on 32 bit.

Instead use "z" to print the size_t and PRI<...> formatters
for the addr_t (always uint64_t) and the int32_t.
2021-06-25 10:09:52 +00:00
Sjoerd Meijer 79c98279b6 [SLP][AArch64] Precommit test for D103629, checking <4 x i8> loads. NFC. 2021-06-25 11:03:36 +01:00
Gabor Marton 0646e36254 [Analyzer][solver] Fix crashes during symbol simplification
Consider the code
```
  void f(int a0, int b0, int c)
  {
      int a1 = a0 - b0;
      int b1 = (unsigned)a1 + c;
      if (c == 0) {
          int d = 7L / b1;
      }
  }
```
At the point of divisiion by `b1` that is considered to be non-zero,
which results in a new constraint for `$a0 - $b0 + $c`. The type
of this sym is unsigned, however, the simplified sym is `$a0 -
$b0` and its type is signed. This is probably the result of the
inherent improper handling of casts. Anyway, Range assignment
for constraints use this type information. Therefore, we must
make sure that first we simplify the symbol and only then we
assign the range.

Differential Revision: https://reviews.llvm.org/D104844
2021-06-25 11:49:26 +02:00
Raphael Isemann c3549d4d7a [lldb] Skip TestDataFormatterSynthVal.py with GCC as the test compiler 2021-06-25 11:48:12 +02:00
Raphael Isemann 0adc66ff83 [lldb] Skip libstdc++ tests failing with GCC
Tracked in llvm.org/pr50861

These tests fail with all GCC versions I tested (8.5, 9.4, 10.3, 11.1).
2021-06-25 11:45:59 +02:00
Raphael Isemann 487ac0b3ee [lldb] Skip tests failing with GCC due to LLDB not being able to call constructors
Tracked in llvm.org/pr50814

These tests fail with all GCC versions I tested (8.5, 9.4, 10.3, 11.1).
2021-06-25 11:33:09 +02:00
Florian Hahn 6478f3fb78
[SCEV] Support single-cond range check idiom in applyLoopGuards.
This patch extends applyLoopGuards to detect a single-cond range check
idiom that InstCombine generates.

It extends applyLoopGuards to detect conditions of the form
(-C1 + X < C2). InstCombine will create this form when combining two
checks of the form (X u< C2 + C1) and (X >=u C1).

In practice, this enables us to correctly compute a tight trip count
bounds for code as in the function below. InstCombine will fold the
minimum iteration check created by LoopRotate with the user check (< 8).

    void unsigned_check(short *pred, unsigned width) {
        if (width < 8) {
            for (int x = 0; x < width; x++)
                pred[x] = pred[x] * pred[x];
        }
    }

As a consequence, LLVM creates dead vector loops for the code above,
e.g. see https://godbolt.org/z/cb8eTcqET

https://alive2.llvm.org/ce/z/SHHW4d

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D104741
2021-06-25 10:24:40 +01:00
Nikita Popov 7206ad04d5 [OpaquePtr] Allow alias to opaque pointer
By relaxing the LLParser pointer type assertion.
2021-06-25 11:16:36 +02:00
Nikita Popov 7b8ed2b8b6 [OpaquePtr] Split force-opaque-pointers test (NFC)
Separate out the case that uses llvm-dis without
--force-opaque-pointers. This will generally produce a different
result from the other cases, because things like global symbol
pointers will be non-opaque in this case.
2021-06-25 11:16:35 +02:00
David Spickett 64f98aae40 [lldb] Fix memory tag unsupported test
This corrects the test added in
31f9960c38
and temporarily patched in
3b4aad1186.

This test checks that the memory tag read
command errors when you use it on a platform
without memory tagging.
(which is why we skip the test if you actually
have MTE)

The problem with this test is that there's
two levels of unsupported each with it's own
specific error.

On anything that isn't AArch64, there's no
tagging extension we support. So you're told
that that is the case. As in "this won't ever work".

When you're on AArch64 we know that MTE could
be present on the remote and when we find that it
isn't, we tell you that instead.

Expect a different error message on AArch64 to fix
the test.
2021-06-25 08:57:05 +00:00
serge-sans-paille effc3339f6 [llvm-cov] Enforce alignment of function records
Function Records are required to be aligned on 8 bytes. This is enforced for each
records except the first, when one relies on the default alignment within an
std::string. There's no such guarantee, and indeed on 32 bits for some
implementation of std::string this is not enforced.

Provide a portable implementation based on llvm's MemoryBuffer.

Differential Revision: https://reviews.llvm.org/D104745
2021-06-25 10:56:06 +02:00
Sjoerd Meijer 51e434fc25 [AArch64] Custom lower <4 x i8> loads
This custom lowers <4 x i8> vector loads using a 32-bit load, followed by 2
SSHLL instructions to extend it to e.g. a <4 x i32> vector. Before, it was
really inefficient and expensive to construct a <4 x i32> for this as 4 byte
loads and 4 moves were used. With this improvement SLP vectorisation might for
example become profitable, see D103629.

Differential Revision: https://reviews.llvm.org/D104782
2021-06-25 09:53:51 +01:00
Nikita Popov 18d7e822ab [OpaquePtr] Enumerate alloca type
This is no longer implicitly enumerated through the pointer type.
2021-06-25 10:48:57 +02:00
Nikita Popov 536872a1f7 [OpaquePtr] Enumerate global variable type
This is no longer implicitly enumerated through the pointer type.
2021-06-25 10:46:28 +02:00
Qiu Chaofan a08fc1361a [PowerPC] Change VSRpRC allocation order
On PowerPC, VSRpRC represents the pairs of even and odd VSX register,
and VRRC corresponds to higher 32 VSX registers. In some cases, extra
copies are produced when handling incoming VRRC arguments with VSRpRC.

This patch changes allocation order of VSRpRC to eliminate this kind of
copy.

Stack frame sizes may increase if allocating non-volatile registers, and
some other vector copies happen. They need fix in future changes.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D104855
2021-06-25 16:04:41 +08:00
Martin Storsjö d07f43641f [LLD] [COFF] Fix handling of LTO comdats with nontrivial selection types after 728cc0075e
Commit 728cc0075e made comdat symbols
from LTO objects be treated as any regular comdat symbol. This works
great for symbols that actually are IMAGE_COMDAT_SELECT_ANY, but
if the symbols have a less trivial selection type that require comparing
either the section chunk size or contents, we can't check that before
actually doing the LTO compilation.

Therefore bring back one aspect of handling from before; that comdat
resolution with a leader from an LTO symbol is essentially skipped,
like it was before 728cc0075e.

Differential Revision: https://reviews.llvm.org/D104605
2021-06-25 09:39:56 +03:00
Amara Emerson f9b3840c3d [ARM] Fix crash in chained BFI combine due to incorrectly RAUW'ing a node.
For a bfi chain like:
a = bfi input, x, y
b = bfi a, x', y'

The previous code was RAUW'ing a with x, mutating the second 'b' bfi, and when
SelectionDAG's CSE code ended up deleting it unexpectedly, bad things happend.
There's no need to RAUW in this case because we can just return our newly
created replacement BFI node. It also looked incorrect because it didn't account
for other users of the 'a' bfi.

Since it seems that chains of more than 2 BFI nodes are hard/impossible to
produce without this combine kicking in at some point, I've removed that
functionality since it had no test coverage.

rdar://79095399

Differential Revision: https://reviews.llvm.org/D104868
2021-06-24 23:35:47 -07:00
Fraser Cormack ab1bd25593 [RISCV] Permit larger RVV stacks and stack offsets
This patch teaches the compiler to generate code to handle larger RVV
stack sizes and stack offsets which resolve an amount larger than 2047
vector registers in size.

The previous behaviour was asserting on such large values as it was only
able to materialize the constant by feeding it to the 12-bit immediate
of an `ADDI` instruction. The compiler can now materialize this amount
into a temporary register before continuing with the computation.

A test case for this scenario is included which also checks that the
temporary register used to materialize the amount doesn't require an
additional spill slot over what we're already reserving for RVV code.

Reviewed By: rogfer01

Differential Revision: https://reviews.llvm.org/D104727
2021-06-25 07:17:33 +01:00
Serge Pavlov b36d214bed [X86] Add description of FXAM instruction
Previously this instruction could be used only in assembler. This change
makes it available for compiler also. Scheduling information was copied
from FTST instruction, hopefully this can be a satisfactory approximation.

Differential Revision: https://reviews.llvm.org/D104853
2021-06-25 12:26:51 +07:00
Fangrui Song ca3bdb57fa [MC][ELF] Change SHT_LLVM_CALL_GRAPH_PROFILE relocations from SHT_RELA to SHT_REL
... even on targets preferring RELA. The section is only consumed by ld.lld
which can handle REL.

Follow-up to D104080 as I explained in the review. There are two advantages:

* The D104080 code only handles RELA, so arm/i386/mips32 etc may warn for -fprofile-use=/-fprofile-sample-use= usage.
* Decrease object file size for RELA targets

While here, change the relocation to relocate weights, instead of 0,1,2,3,..
I failed to catch the issue during review.
2021-06-24 21:35:48 -07:00
Arthur Eubanks 1aa02b37e7 Revert "[BuildLibCalls/SimplifyLibCalls] Fix attributes on created CallInst instructions."
This reverts commit 1eda5453f2.

Causes https://crbug.com/1223647:
Incompatible argument and return types for 'returned' attribute
  tail call void @llvm.memset.p0i8.i64(i8* noalias noundef returned writeonly align 1 dereferenceable(255) %arraydecay, i8 0, i64 255, i1 false), !dbg !985
2021-06-24 19:24:34 -07:00
Jez Ng 8aa17d1eae [lld-macho] Move ICF members from InputSection to ConcatInputSection
`icfEqClass` only makes sense on ConcatInputSections since (in contrast
to literal sections) they are deduplicated as an atomic unit.

Similarly, `hasPersonality` and `replacement` don't make sense on
literal sections.

This mirrors LLD-ELF, which stores `icfEqClass` only on non-mergeable
sections.

Reviewed By: #lld-macho, gkm

Differential Revision: https://reviews.llvm.org/D104670
2021-06-24 22:23:12 -04:00
Kai Luo b904574b3d [PowerPC] Move PPCBranchSelector as close to asm printer as possible
Currently, PPCBranchSelector is not immediately preceding asm printer pass. `-debug-pass=Structure` gives
```
      PowerPC Branch Selector
      Contiguously Lay Out Funclets
      StackMap Liveness Analysis
      Live DEBUG_VALUE analysis
      Lazy Machine Block Frequency Analysis
      Machine Optimization Remark Emitter
      Linux PPC Assembly Printer
```
After the patch
```
      Contiguously Lay Out Funclets
      StackMap Liveness Analysis
      Live DEBUG_VALUE analysis
      PowerPC Branch Selector
      Lazy Machine Block Frequency Analysis
      Machine Optimization Remark Emitter
      Linux PPC Assembly Printer
```

Reviewed By: nemanjai, #powerpc

Differential Revision: https://reviews.llvm.org/D104762
2021-06-25 02:05:19 +00:00
Jinsong Ji f3ef4f5bff [PowerPC] Add XL compat __compare_and_swap builtins
Prototype
int __compare_and_swap (volatile int* addr, int* old_val_addr, int
new_val);

int __compare_and_swaplp (volatile long* addr, long* old_val_addr, long
new_val);

Refer to
https://www.ibm.com/docs/en/xl-c-and-cpp-aix/16.1?topic=functions-compare-swap-compare-swaplp

Reviewed By: w2yehia

Differential Revision: https://reviews.llvm.org/D104837
2021-06-25 01:08:48 +00:00
Craig Topper f225367305 [RISCV] Add vget/vset intrinsics for inserting and extracting between different lmuls.
These allow getting a whole register from a larger lmul. Or
inserting a whole register into a larger lmul register. Fractional
lmuls are not supported as they would require a vslide.

Based on this update to the intrinsic doc
https://github.com/riscv/rvv-intrinsic-doc/pull/99

Reviewed By: HsiangKai

Differential Revision: https://reviews.llvm.org/D104822
2021-06-24 18:06:36 -07:00
Muhammad Omair Javaid e8cded57fb Unsupported sanitize-coverage-old-pm.c on 32 bit Arm
sanitize-coverage-old-pm.c is passing intermittently on different
arm v7 machines. This patch moves it to unsupported on all arm 32
targets reporting armv8l core.
2021-06-25 00:57:24 +00:00
Vitaly Buka a9f3ac9e3d Revert "[hwasan] print exact mismatch offset for short granules."
Breaks sanitizer-x86_64-linux-android and sanitizer-x86_64-linux-qemu bots.

This reverts commit 7e3f8b8aff.
2021-06-24 17:33:24 -07:00
Vitaly Buka a435741110 [scudo] Clang-format tests 2021-06-24 17:33:24 -07:00