Commit Graph

392371 Commits

Author SHA1 Message Date
Michael Kruse 5d933c0b0c [Flang][test] Fix Windows buildbot after D104930.
Add

    REQUIRES: shell

to the unpack.f90 test that executes a UNIX shell script.
2021-06-29 17:01:45 +00:00
Raphael Isemann c00032321a [lldb] Skip TestPairFromStdModule for now
I didn't get around to fix this change and the original commit itself seems
fine, so this looks like an existing LLDB/Clang bug that was just uncovered
by this change. Skipping while I'm investigating.
2021-06-29 19:01:11 +02:00
Craig Topper 3b6dfa381e [RISCV] Protect the SHL/SRA/SRL handlers in LowerOperation against being called for an illegal i32 shift amount.
It seems it is possible for DAG combine to create a shl with an
i64 result type and an i32 shift amount. This is ok before type
legalization since the type don't need to match in SelectionDAG.
This results in type legalization calling LowerOperation to
legalize just the amount. We weren't expecting this so we
asserted for not finding a fixed vector shift.

To fix this, I've added a check for the fixed vector case and
returned SDValue() to get the default type legalizer. I've
factored all shifts together and added a fixed vector specific
handler to avoid repeating similar code for each in
LowerOperation.

The particular case I found was exposed by D104581, but the bad
shift is created after that patch triggers.
2021-06-29 09:45:13 -07:00
Arthur O'Dwyer 287847dace [libc++] Update ABI docs. NFCI.
Differential Revision: https://reviews.llvm.org/D103160
2021-06-29 12:39:23 -04:00
Eugene Zhulenev 9ccdaac8f9 [mlir:Async] Fix a bug in automatic refence counting around function calls
Depends On D104998

Function calls "transfer ownership" to the callee and it puts additional constraints on the reference counting optimization pass

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D104999
2021-06-29 09:35:43 -07:00
Eugene Zhulenev 6088f86a2e [mlir:Async] Convert AsyncParallelFor pass to ModuleOp pass
Depends On D104891

Outlining scf.parallel body as a function requires async-parallel-for pass to be a ModuleOp pass

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D104998
2021-06-29 09:28:22 -07:00
Eugene Zhulenev a8f819c6d8 [mlir:Async] Remove async operations if it is statically known that the parallel operation has a single compute block
Depends On D104850

Add a test that verifies that canonicalization removes all async overheads if it is statically known that the scf.parallel operation will be computed using a single block.

Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D104891
2021-06-29 09:26:28 -07:00
gbreynoo a37f558682 [llvm-objdump] Add --no-print-imm-hex to the command guide
The option --no-print-imm-hex was not included in the command guide for
llvm-objdump but appears in the help text. This commit adds it to the
command guide.

Differential Revision: https://reviews.llvm.org/D104717
2021-06-29 17:18:32 +01:00
gbreynoo 56fa49878b [llvm-objdump] Add testing for --print-imm-hex, --headers, --section-headers and --private-headers
llvm-objdump had some missing coverage that is fixed by this change:
- A test specifically for --print-imm-hex, and coverage of --no-print-imm-hex
- section-headers.test checks the aliases --headers or --section-headers
- A test for the use of --private-headers for ELF that checks the output
- A test for ELF program headers

Differential Revision: https://reviews.llvm.org/D103974
2021-06-29 17:03:21 +01:00
Piotr Sobczak f38a8b54ea [AMDGPU] Fix 224-bit spills
Related to D104622.

Differential Revision: https://reviews.llvm.org/D105109
2021-06-29 17:52:16 +02:00
David Green aaf6a7ac34 [ARM] Extra test for gep immediate costs. NFC 2021-06-29 16:51:47 +01:00
LLVM GN Syncbot 2a063173c1 [gn build] Port d03aa7d6b6 2021-06-29 15:41:00 +00:00
Louis Dionne d03aa7d6b6 [libc++] NFCI: Remove __functional/search.h
The __search helper function was once split into __functional for circular
dependency reasons, however this is not an issue anymore now that we have
finer grained headers.
2021-06-29 11:40:47 -04:00
Eugene Zhulenev e88ac7295f [perf] Fix a data race in the PerfJITEventListener
Concurrent JIT compilation + PerfJITEventListener triggers tsan error

Reviewed By: cota

Differential Revision: https://reviews.llvm.org/D104977
2021-06-29 08:30:31 -07:00
Florian Hahn bd4bfe0e0c
[SCCP] Extend tests added 1092357ccd in with UREM/SREM by 0.
Add additional coverage for computing UREM/SREM C, 0.
2021-06-29 16:08:56 +01:00
Philip Reames e49d65f36d [LV] Fix bug when unrolling (only) a loop with non-latch exit
If we unroll a loop in the vectorizer (without vectorizing), and the cost model requires a epilogue be generated for correctness, the code generation must actually do so.

The included test case on an unmodified opt will access memory one past the expected bound.  As a result, this patch is fixing a latent miscompile.

Differential Revision: https://reviews.llvm.org/D103700
2021-06-29 08:04:26 -07:00
Pratyush Das c33ebad735 Print default template argument if manually specified in typedef declaration.
If a default template type argument is manually specified to be of the default
type, then it is committed when printing the template.

Differential revision: https://reviews.llvm.org/D103040
2021-06-29 14:57:26 +00:00
Louis Dionne 58a230455b [libc++] Serialize Lit parameters to make them available to from-scratch configs
Before this patch, Lit parameters that were set as a result of CMake
options were not made available to from-scratch configs. This patch
serializes those parameters into the generated lit config file so that
they are available to all configs.

Differential Revision: https://reviews.llvm.org/D105047
2021-06-29 10:51:42 -04:00
Louis Dionne 7756216547 [libc++] NFCI: Remove code duplication and obsolete declarations in wrap_iter
Differential Revision: https://reviews.llvm.org/D105040
2021-06-29 10:51:07 -04:00
Jeremy Morse e63b18bc84 Catch an extremely obvious memory leak, thanks asan
https://lab.llvm.org/buildbot/#/builders/5/builds/9208

(dbg-phis-merging-in-ldv.mir and dbg-phis-with-loops.mir in the asan
 check stage)
2021-06-29 15:47:17 +01:00
Alex Zinenko bf9dcb4cd2 [mlir] silence -Wunused-variable in Linalg comprehensive bufferize 2021-06-29 16:44:16 +02:00
Johannes Doerfert 4eb90e893f Revert "[OpenMP] Add Two-level Distributed Barrier"
This reverts commit 25073a4ecf.

This breaks non-x86 OpenMP builds for a while now. Until a solution is
ready to be upstreamed we revert the feature and unblock those builds.
See:
  https://reviews.llvm.org/rG25073a4ecfc9b2e3cb76776185e63bfdb094cd98#1005821
and
  https://reviews.llvm.org/rG25073a4ecfc9b2e3cb76776185e63bfdb094cd98#1005821

The currently proposed fix (D104788) seems not to be ready yet:
  https://reviews.llvm.org/D104788#2841928
2021-06-29 09:38:27 -05:00
Johannes Doerfert bc8bb3df35 Revert "[omp] Fix build without ITT after D103121 changes"
This reverts commit eab1fd389b.

This commit fixed a problem with 25073a4ecf (D103121) which is the one
we actually need to revert to unblock non-X86 builds of OpenMP. Can be
reapplied, or merged into, D103121 as it goes in again.
2021-06-29 09:38:27 -05:00
Johannes Doerfert 7af91a2b8f [Attributor][NFCI] Make the state of AAValueSimplify explicit
As we have done with other states we want the AAValueSimplify state to
be explicit to use it more easily in our helpers.
2021-06-29 09:38:22 -05:00
Johannes Doerfert dcbe58d94c [Attributor][NFCI] Remove unneeded namespace 2021-06-29 09:38:20 -05:00
Johannes Doerfert 457bd5c8d5 [Attributor] Teach AAPotentialValues about constant select conditions
There was a TODO but now we actually check if the select condition is
assumed constant and only look at the relevant operand.
2021-06-29 09:38:18 -05:00
Johannes Doerfert 8dc9bb6d85 [Attributor][NFC] Clang format 2021-06-29 09:38:15 -05:00
Johannes Doerfert a33e128012 [InstCombine] Gracefully handle an alloca outside the alloca-AS
While we might eventually want to disallow allocas that do not have the
alloca-AS set, it seems undesirable to crash on them. Add a cast when
required so that we can support such allocas (at least here).

Differential Revision: https://reviews.llvm.org/D104866
2021-06-29 09:38:13 -05:00
Balazs Benics 3dae01911b [analyzer] Make CheckerManager::hasPathSensitiveCheckers() complete again
It turns out that the CheckerManager::hasPathSensitiveCheckers() missed
checking for the BeginFunctionCheckers.
It seems like other callbacks are also missing:
 - ObjCMessageNilCheckers
 - BeginFunctionCheckers
 - NewAllocatorCheckers
 - PointerEscapeCheckers
 - EndOfTranslationUnitCheckers

In this patch, I wanted to use a fold-expression, but until C++17
arrives we are left with the old-school method.

When I tried to write a unittest I observed an interesting behavior. I
subscribed only to the BeginFunction event, it was not fired.
However, when I also defined the PreCall with an empty handler, suddenly
both fired.
I could add this test demonstrating the issue, but I don't think it
would serve much value in a long run. I don't expect regressions for
this.

However, I think it would be great to enforce the completeness of this
list in a runtime check.
I could not come up with a solution for this though.

PS: Thank you @Szelethus for helping me debugging this.

Differential Revision: https://reviews.llvm.org/D105101

Reviewed by: vsavchenko
2021-06-29 16:35:07 +02:00
David Sherwood 9de63367d8 Revert "[NFC] Remove shadowed variable in InnerLoopVectorizer::createInductionVariable"
This reverts commit 9dde514162.
2021-06-29 15:20:22 +01:00
Dylan Fleming c3d3defd11 [SVE] Added CodeGen support for inserting an element into a predicate vector
Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D104722
2021-06-29 14:55:40 +01:00
Jeremy Morse 010108bb2c [DebugInstrRef][3/3] Follow DBG_PHI instructions through LiveDebugValues
This patch reads machine value numbers from DBG_PHI instructions (marking
where SSA PHIs used to be), and matches them up with DBG_INSTR_REF
instructions that refer to them. Essentially they are two separate parts of
a DBG_VALUE: the place to read the value (register and program position),
and where the variable is assigned that value.

Sometimes these DBG_PHIs can be duplicated, usually by tail duplication.
This corresponds to the SSA structure of the program being destroyed, and
the original PHI being split. When this happens: run LLVMs standard
SSAUpdater utility, to work out what values should appear in which blocks.
The majority of this patch is boilerplate to make use of SSAUpdater.

If there are any additional PHIs on the path between multiple DBG_PHIs and
their using DBG_INSTR_REF, their existance is validated, just in case a
value gets clobbered along the way (see dbg-phis-with-loops.mir for
several examples).

Differential Revision: https://reviews.llvm.org/D86814
2021-06-29 14:45:13 +01:00
Ben Shi c85175c5f6 [AVR] Fix a bug in prologue of ISR
The r1 register should be cleared in prologue of ISR as it is used
as constant zero.

Reviewed By: dylanmckay

Differential Revision: https://reviews.llvm.org/D99467
2021-06-29 21:44:50 +08:00
Simon Pilgrim f0d6c9156b [X86] Add cmov i33 sgt test case
Suggested on D101074 - add a 'icmp sgt i64 %0, -2147483649' comparison that can fold to 'icmp sge i64 %0, -2147483648' on D101074 allowing i32 immediate folding
2021-06-29 14:36:33 +01:00
David Sherwood 9dde514162 [NFC] Remove shadowed variable in InnerLoopVectorizer::createInductionVariable
Avoid creating a IRBuilder stack variable with the same name as the
class member.
2021-06-29 14:34:30 +01:00
Nicolas Vasilache b661d9f9c3 [mlir][Linalg] NFC - Drop AliasInfo::existsNonDominatingRead
The case where a non-dominating read can be found is captured by slightly generalizing `AliasInfo::wouldCreaateReadAfterWriteInterference`.

This simplification will make it easier to implement bufferization across function call.

APIs are also simplified were possible.

Differential revision: https://reviews.llvm.org/D104845
2021-06-29 13:30:33 +00:00
Nico Weber aed0a08c69 [lld/mac] Make symbol table order deterministic
SymtabSection::emitStabs() writes the symbol table in the order
of externalSymbols, which has the order of symtab->getSymbols(),
which is just the order symbols are added to the symbol table.

In practice, symbols in the symbol files of input .o files are
sorted, but since that's not guaranteed we sort them in
ObjFile::parseSymbols(). To make sure several symbols with the same
address keep the order they're in the input file, we have to use
stable_sort().

In practice, std::sort() on already-sorted inputs won't change the order
of just adjacent elements, and while in theory std::sort() could use a
random pivot, in practice the code should be deterministic as it was
previously too.

But now lld/test/MachO/stabs.s passes with LLVM_ENABLE_EXPENSIVE_CHECKS=ON
(the last test that was failing with that set).

Fixes a regression from D99972.

While here, remove an empty section in stabs.s and move
.subsections_via_symbols to the end where it usually is (this part no
behavior change).

Differential Revision: https://reviews.llvm.org/D105071
2021-06-29 09:29:49 -04:00
Tim Northover c82957e792 ARM: fix vacuously true assertion to actually check what it should. NFC. 2021-06-29 14:24:03 +01:00
Florian Hahn 1092357ccd
[SCCP] Add tests with urem/srem with 2 constant operands.
Reduced test case for PR49731.
2021-06-29 14:19:52 +01:00
David Sherwood 8a3365fba2 Revert "[NFC] Remove shadowed variable in InnerLoopVectorizer::createInductionVariable"
This reverts commit dcfc2c3fac.
2021-06-29 14:04:42 +01:00
Felipe de Azevedo Piovezan 8ca04b0513 [mlir] Add support for LLVM's dso_local attr
This patch brings support for setting runtime preemption specifiers of
LLVM's GlobalValues. In LLVM semantics, if the `dso_local` attribute
is not explicitly requested, then it is inferred based on linkage and
visibility. We model this same behavior with a UnitAttribute: if it is
present, then we explicitly request the GlobalValue to marked as
`dso_local`, otherwise we rely on the GlobalValue itself to make this
decision.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D104983
2021-06-29 15:00:48 +02:00
Alex Zinenko 355216380b [mlir] Remove SDBM
This data structure and algorithm collection is no longer in use.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D105102
2021-06-29 14:46:26 +02:00
Florian Hahn 47215e1c62
[LV] Fix crash when target instruction for sinking is dead.
This patch fixes a crash when the target instruction for sinking is
dead. In that case, no recipe is created and trying to get the recipe
for it results in a crash. To ensure all sink targets are alive, find &
use the first previous alive instruction.

Note that the case where the sink source is dead is already handled.

Found by
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=35320

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D104603
2021-06-29 13:31:22 +01:00
Alexey Bataev 2098c5dfbd [InstCombine]Add a test for reductions after shuffles, NFC. 2021-06-29 05:27:56 -07:00
Florian Mayer b458bb8c04 [hwasan] Display causes in order of probability.
A heap or global buffer that is far away from the faulting address is
unlikely to be the cause, especially if there is a potential
use-after-free as well, so we want to show it after the other
causes.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D104781
2021-06-29 13:00:05 +01:00
Florian Mayer 400509238a Revert "[hwasan] print exact mismatch offset for short granules."
Broke x86 LAM bot.

This reverts commit 2a60ab76a7.
2021-06-29 11:57:04 +01:00
David Sherwood 303b6d5e98 [LoopVectorize] Add support for scalable vectorization of invariant stores
Previously in setCostBasedWideningDecision if we encountered an
invariant store we just assumed that we could scalarize the store
and called getUniformMemOpCost to get the associated cost.
However, for scalable vectors this is not an option because it is
not currently possibly to scalarize the store. At the moment we
crash in VPReplicateRecipe::execute when trying to scalarize the
store.

Therefore, I have changed setCostBasedWideningDecision so that if
we are storing a scalable vector out to a uniform address and the
target supports scatter instructions, then we should use those
instead.

Tests have been added here:

  Transforms/LoopVectorize/AArch64/sve-inv-store.ll

Differential Revision: https://reviews.llvm.org/D104624
2021-06-29 11:56:09 +01:00
Butygin 293064222a [mlir] Add MemoryEffects::Allocate to memref::CloneOp
Without it BufferDeallocationPass process only CloneOps created during pass itself and ignore all CloneOps that were already present in IR.

For our specific usecase:

```
func @dealloc_existing_clones(%arg0: memref<?x?xf64>, %arg1: memref<?x?xf64>) -> memref<?x?xf64> {
  return %arg0 : memref<?x?xf64>
}
```

Input arguments will be freed immediately after return from function and we want to prolong lifetime for the returned argument.
To achieve this we explicitly add clones to all input memrefs and expect that BufferDeallocationPass will add correct deallocs to them (unnessesary clone+dealloc pairs will be canonicalized away later).

Differential Revision: https://reviews.llvm.org/D104973
2021-06-29 13:37:32 +03:00
Roman Lebedev 6cf6f6f65f
[NFC][InstCombine] foldAggregateConstructionIntoAggregateReuse(): cast to Instruction eagerly
In all of these, the value must be an instruction for us to succeed anyway,
so change it to maybe hopefully make further changes more straight-forward.
2021-06-29 13:29:18 +03:00
Chia-hung Duan 7dec20dbb6 [mlir-reduce] Add doc for usage of mlir-reduce
Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D103683
2021-06-29 18:20:23 +08:00