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228 Commits

Author SHA1 Message Date
David Goodwin 17199b56b0 Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8. 
llvm-svn: 83122
 2009-09-30 00:10:16 +00:00
Evan Cheng 1b38952c99 Reference to hidden symbols do not have to go through non-lazy pointer in non-pic mode. rdar://7187172. 
llvm-svn: 80904
 2009-09-03 07:04:02 +00:00
Evan Cheng 43b9ca6f42 Let Darwin linker auto-synthesize stubs and lazy-pointers. This deletes a bunch of nasty code in ARM asm printer. 
llvm-svn: 80404
 2009-08-28 23:18:09 +00:00
Jim Grosbach f24f9d9cb6 Whitespace cleanup. Remove trailing whitespace. 
llvm-svn: 78666
 2009-08-11 15:33:49 +00:00
David Goodwin a307edbdd5 By default, for cortex-a8 use NEON for single-precision FP. 
llvm-svn: 78200
 2009-08-05 16:01:19 +00:00
David Goodwin 3b9c52c5c1 Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations. 
llvm-svn: 78081
 2009-08-04 17:53:06 +00:00
Daniel Dunbar 31b44e8f6c Normalize Subtarget constructors to take a target triple string instead of 
Module*.

Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.

llvm-svn: 77918
 2009-08-02 22:11:08 +00:00
Evan Cheng 3d8ccdb4be isThumb2 really should mean thumb2 only, not thumb2+. 
llvm-svn: 74871
 2009-07-06 22:29:14 +00:00
Evan Cheng 2c450d35ae Change the meaning of predicate hasThumb2 to mean thumb2 ISA is available, not that it's in thumb mode and thumb2 is available. Added isThumb2 predicate to replace the old predicate. 
llvm-svn: 74692
 2009-07-02 06:38:40 +00:00
Bob Wilson 8f74c88cb6 Revert 74164. We'll want to use this method later. 
llvm-svn: 74176
 2009-06-25 16:03:07 +00:00
Bob Wilson 350abb9799 Remove unused hasV6T2Ops method. We already have a separate feature to 
identify Thumb2.

llvm-svn: 74164
 2009-06-25 05:20:31 +00:00
Evan Cheng 4e712de541 Latency information for ARM v6. It's rough and not yet hooked up. Right now we are only using branch latency to determine if-conversion limits. 
llvm-svn: 73747
 2009-06-19 01:51:50 +00:00
Evan Cheng a0ca298f8a Remove UseThumbBacktraces. Just check if subtarget is darwin. 
llvm-svn: 73734
 2009-06-18 23:14:30 +00:00
Anton Korobeynikov 409105fc95 Rename methods for the sake of consistency. 
llvm-svn: 73428
 2009-06-15 21:46:20 +00:00
Anton Korobeynikov c82b282b34 Separate V6 from V6T2 since the latter has some extra nice instructions 
llvm-svn: 73085
 2009-06-08 21:20:36 +00:00
Anton Korobeynikov cd41a9019e Add helper for checking of Thumb1 mode 
llvm-svn: 73080
 2009-06-08 20:31:02 +00:00
Anton Korobeynikov 12694bd8ac Implement review feedback. Make thumb2 'normal' subtarget feature 
llvm-svn: 72698
 2009-06-01 20:00:48 +00:00
Anton Korobeynikov b6f4538683 Add placeholder for thumb2 stuff 
llvm-svn: 72593
 2009-05-29 23:41:08 +00:00
Anton Korobeynikov 0b91cc4260 Add ARMv7 architecture, Cortex processors and different FPU modes handling. 
llvm-svn: 72337
 2009-05-23 19:51:43 +00:00
Anton Korobeynikov 08bf4c0f5a Propagate CPU string out of SubtargetFeatures 
llvm-svn: 72335
 2009-05-23 19:50:50 +00:00
Dan Gohman 544ab2c50b Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal 
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.

Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.

This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.

Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.

This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.

llvm-svn: 49572
 2008-04-12 04:36:06 +00:00
Chris Lattner f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev. 
llvm-svn: 45418
 2007-12-29 20:36:04 +00:00
Rafael Espindola 419b6d7ce4 Make ARM and X86 LowerMEMCPY identical by moving the isThumb check into getMaxInlineSizeThreshold 
and by restructuring the X86 version.

New I just have to move this to a common place :-)

llvm-svn: 43554
 2007-10-31 14:39:58 +00:00
Rafael Espindola 063f177300 Make ARM an X86 memcpy expansion more similar to each other. 
Now both subtarget define getMaxInlineSizeThreshold and the expansion uses it.

This should not change generated code.

llvm-svn: 43552
 2007-10-31 11:52:06 +00:00
Evan Cheng 9f8301413c Added -march=thumb; removed -enable-thumb. 
llvm-svn: 34521
 2007-02-23 03:14:31 +00:00
Lauro Ramos Venancio 048e16ff8f Add ABI information to ARM subtarget. 
llvm-svn: 34245
 2007-02-13 19:52:28 +00:00
Evan Cheng 181fe36d6c Introduce TargetType's ELF and Darwin. 
llvm-svn: 33363
 2007-01-19 19:22:40 +00:00
Evan Cheng 10043e215b ARM backend contribution from Apple. 
llvm-svn: 33353
 2007-01-19 07:51:42 +00:00