05166740eb
- Add AVX SSE2 Move doubleword and quadword instructions.
...
- Add encode bits for VEX_W
- All 128-bit SSE 1 & SSE2 instructions that are described
in the .td file now have a AVX encoded form already working.
llvm-svn: 107365
2010-07-01 01:20:06 +00:00
cbcebe2950
Add AVX SSE2 mask creation and conditional store instructions
...
llvm-svn: 107306
2010-06-30 18:38:10 +00:00
d079c91683
Add AVX SSE2 packed integer extract/insert instructions
...
llvm-svn: 107293
2010-06-30 17:03:03 +00:00
e82689fea2
Add AVX SSE2 integer unpack instructions
...
llvm-svn: 107246
2010-06-30 04:06:39 +00:00
ec0115c9b7
Add AVX SSE2 packed integer shuffle instructions
...
llvm-svn: 107245
2010-06-30 03:47:56 +00:00
be792feb8b
Add AVX SSE2 pack with saturation integer instructions
...
llvm-svn: 107241
2010-06-30 02:30:25 +00:00
2686ea4555
Add AVX SSE2 integer packed compare instructions
...
llvm-svn: 107240
2010-06-30 02:21:09 +00:00
2e2caefff9
- Add AVX form of all SSE2 logical instructions
...
- Add VEX encoding bits to x86 MRM0r-MRM7r
llvm-svn: 107238
2010-06-30 01:58:37 +00:00
3f71ddfaad
Add *several* AVX integer packed binop instructions
...
llvm-svn: 107225
2010-06-29 23:47:49 +00:00
30689a3a7f
Add AVX ld/st XCSR register.
...
Add VEX encoding bits for MRMXm x86 form
llvm-svn: 107204
2010-06-29 20:35:48 +00:00
a4575f5b31
Add AVX non-temporal stores
...
llvm-svn: 107178
2010-06-29 18:22:01 +00:00
21a9433e9e
Add sqrt, rsqrt and rcp AVX instructions
...
llvm-svn: 107166
2010-06-29 17:26:30 +00:00
d6a091a4d4
Described the missing AVX forms of SSE2 convert instructions
...
llvm-svn: 107108
2010-06-29 00:36:02 +00:00
74d716b9cd
Add AVX convert CVTSS2SI{rr,rm} and CVTDQ2PS{rr,rm} instructions
...
llvm-svn: 106917
2010-06-25 23:47:23 +00:00
83651094ad
Reapply r106896:
...
Add several AVX MOV flavors
Support VEX encoding for MRMDestReg
llvm-svn: 106912
2010-06-25 23:33:42 +00:00
4530fed87e
revert this now, it's using avx instead of sse :)
...
llvm-svn: 106906
2010-06-25 23:04:29 +00:00
a34d9b6d84
Add several AVX MOV flavors
...
Support VEX encoding for MRMDestReg
llvm-svn: 106896
2010-06-25 22:27:51 +00:00
cbdcce6478
Add some AVX convert instructions
...
llvm-svn: 106815
2010-06-25 00:39:30 +00:00
4398fd7b83
- Add AVX COMI{SS,SD}{rr,rm} and UCOMI{SS,SD}{rr,rm}.
...
- Fix a small VEX encoding issue.
- Move compare instructions to their appropriate place.
llvm-svn: 106787
2010-06-24 20:48:23 +00:00
8048662539
Teach the x86 mc assembler that %dr6 = %db6, this implements
...
rdar://8013734
llvm-svn: 106725
2010-06-24 07:29:18 +00:00
191a1cd2bb
Add AVX CMP{SS,SD}{rr,rm} instructions and encoding testcases
...
llvm-svn: 106705
2010-06-24 00:32:06 +00:00
05220c9a0d
Add AVX MOVMSK{PS,PD}rr instructions
...
llvm-svn: 106683
2010-06-23 21:30:27 +00:00
3183dd5692
Add tests for different AVX cmp opcodes, also teach the x86 asm parser to understand the vcmp instruction
...
llvm-svn: 106678
2010-06-23 21:10:57 +00:00
360d6fe299
Add AVX SHUF{PS,PD}{rr,rm} instructions
...
llvm-svn: 106672
2010-06-23 20:07:15 +00:00
337e8db712
Add support for the x86 instructions "pusha" and "popa".
...
llvm-svn: 106671
2010-06-23 20:00:58 +00:00
1e13c17a55
Add AVX compare packed instructions
...
llvm-svn: 106600
2010-06-22 23:37:59 +00:00
535aa8ea91
Reapply support for AVX unpack and interleave instructions, with
...
testcases this time.
llvm-svn: 106593
2010-06-22 23:02:38 +00:00
1a890f9dc0
Add AVX MOV{SS,SD}{rr,rm} instructions
...
llvm-svn: 106588
2010-06-22 22:38:56 +00:00
6250bd9e3c
Move a 64-bit test to the 64-bit file. Fixes an llvm-mc assertion
...
during test runs.
llvm-svn: 106577
2010-06-22 21:11:51 +00:00
8737b7d73d
Refactor aliased packed logical instructions, also add
...
AVX AND,OR,XOR,NAND{P}{S,D}{rr,rm} instructions.
llvm-svn: 106374
2010-06-19 02:44:01 +00:00
1e205f6b1c
Shrink down code and add for free AVX {MIN,MAX}P{S,D}{rm,rr} instructions
...
llvm-svn: 106366
2010-06-19 00:37:31 +00:00
e808a78ac1
fix rdar://7873482 by teaching the instruction encoder to emit
...
segment prefixes. Daniel wrote most of this patch.
llvm-svn: 106364
2010-06-19 00:34:00 +00:00
2323168705
Add {mix,max}{ss,sd}{rr,rm} AVX forms.
...
llvm-svn: 106264
2010-06-18 01:12:56 +00:00
a714ea0f7d
More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rm
...
llvm-svn: 105870
2010-06-12 01:53:48 +00:00
b06f54b852
More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rr
...
Handle OpSize TSFlag for AVX
llvm-svn: 105869
2010-06-12 01:23:26 +00:00
fd5458d4bd
More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm)
...
Introduce the VEX_X field
llvm-svn: 105859
2010-06-11 23:50:47 +00:00
c2f87b7bb2
Reapply r105521, this time appending "LLU" to 64 bit
...
immediates to avoid breaking the build.
llvm-svn: 105652
2010-06-08 22:51:23 +00:00
fdd2614330
revert r105521, which is breaking the buildbots with stuff like this:
...
In file included from X86InstrInfo.cpp:16:
X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type
llvm-svn: 105524
2010-06-05 04:17:30 +00:00
594fa26317
Initial AVX support for some instructions. No patterns matched
...
yet, only assembly encoding support.
llvm-svn: 105521
2010-06-05 03:53:24 +00:00
4c71e08ed8
MC/X86: Add alias for movzx.
...
llvm-svn: 105005
2010-05-28 21:20:21 +00:00
b29228905f
MC/X86: Add alias for fwait.
...
llvm-svn: 105001
2010-05-28 20:59:10 +00:00
76413597a9
Fix the use of x86 control and debug registers so that the assertion failure in
...
getX86RegNum() does not happen. Patch by Shantonu Sen!
llvm-svn: 104994
2010-05-28 19:01:27 +00:00
70e34983e8
Fix the x86 move to/from segment register instructions.
...
llvm-svn: 104731
2010-05-26 20:10:45 +00:00
492d4f409a
Changed the encoding of X86 floating point stack operations where both operands
...
are st(0). These can be encoded using an opcode for storing in st(0) or using
an opcode for storing in st(i), where i can also be 0. To allow testing with
the darwin assembler and get a matching binary the opcode for storing in st(0)
is now used. To do this the same logical trick is use from the darwin assembler
in converting things like this:
fmul %st(0), %st
into this:
fmul %st(0)
by looking for the second operand being X86::ST0 for specific floating point
mnemonics then removing the second X86::ST0 operand. This also has the add
benefit to allow things like:
fmul %st(1), %st
that llvm-mc did not assemble.
llvm-svn: 104634
2010-05-25 20:52:34 +00:00
0e767d7364
MC/X86: Add a hack to allow recognizing 'cmpltps' and friends.
...
llvm-svn: 104626
2010-05-25 19:49:32 +00:00
4a5b2c597b
MC/X86: Define explicit immediate forms of cmp{ss,sd,ps,pd}.
...
llvm-svn: 104622
2010-05-25 18:40:53 +00:00
c798965e63
The BT64ri8 record in X86Instr64bit.td was missing a REX_W which is required
...
for the 64-bit version of the Bit Test instruction.
llvm-svn: 104621
2010-05-25 18:16:58 +00:00
f6562d35ac
Make sure aeskeygenassist uses an unsigned immediate field.
...
Fixes rdar://8017638
llvm-svn: 104617
2010-05-25 17:33:22 +00:00
79b6a0f140
Fix an mmx movd encoding.
...
llvm-svn: 104552
2010-05-24 20:51:08 +00:00
dc71cc794b
MC/X86: Add aliases for CMOVcc variants.
...
llvm-svn: 104549
2010-05-24 20:32:23 +00:00
b52fcd6304
MC/X86: Subdivide immediates a bit more, so that we properly recognize immediates based on the width of the target instruction. For example:
...
addw $0xFFFF, %ax
should match the same as
addw $-1, %ax
but we used to match it to the longer encoding.
llvm-svn: 104453
2010-05-22 21:02:33 +00:00
d459e29a0a
MC/X86: Add alias for setz, setnz, jz, jnz.
...
llvm-svn: 104435
2010-05-22 06:37:33 +00:00
7e7482c80f
Added retl for 32-bit x86 and added retq for 64-bit x86.
...
llvm-svn: 104394
2010-05-21 23:01:38 +00:00
baf2eea6f4
MC/X86: Add movq alias for movabsq, to allow matching 64-bit immediates with movq.
...
llvm-svn: 104275
2010-05-20 20:36:29 +00:00
29790edb93
Fix assembly parsing and encoding of the pushf and popf family of
...
instructions.
llvm-svn: 104231
2010-05-20 16:16:00 +00:00
1e19eab963
Define the x86 pause instruction.
...
llvm-svn: 104204
2010-05-20 01:35:50 +00:00
a3b7570a3a
Fix the sfence instruction to use MRM_F8 instead of MRM7r, since it
...
doesn't have a register operand. Also, use I instead of PSI, for
consistency with mfence and lfence.
llvm-svn: 104203
2010-05-20 01:23:41 +00:00
7cbfa4462f
fix rdar://7986634 - match instruction opcodes case insensitively.
...
llvm-svn: 104183
2010-05-19 23:34:33 +00:00
9635b3da6b
More data/parsing support for tls directives. Add a few more testcases
...
and cleanup comments as well.
llvm-svn: 103985
2010-05-17 22:53:55 +00:00
9b4a824217
llvm-mc: Support reassignment of variables in one special case, when the
...
variable has not yet been used in an expression. This allows us to support a few
cases that show up in real code (mostly because gcc generates it for Objective-C
on Darwin), without giving up a reasonable semantic model for assignment.
llvm-svn: 103950
2010-05-17 17:46:23 +00:00
68b1bbe66a
Assume that we'll handle mangling the symbols earlier and just put the
...
symbol to the file as we have it. Simplifies out tbss handling.
llvm-svn: 103928
2010-05-17 02:13:02 +00:00
7bc111f5a9
Fix so "int3" is correctly accepted, added "into" and fixed "int" with an
...
argument, like "int $4", to not get an Assertion error.
llvm-svn: 103791
2010-05-14 19:16:02 +00:00
9fb6bb07ca
Add AsmParser support for darwin tbss directive.
...
Nothing uses this yet.
llvm-svn: 103757
2010-05-14 01:50:28 +00:00
8cb4728a15
fix rdar://7965971 and a fixme: use ParseIdentifier in
...
ParseDirectiveDarwinZerofill instead of hard coding the
check for identifier. This allows quoted symbol names to
be used.
llvm-svn: 103682
2010-05-13 00:10:34 +00:00
9efef006cf
reapply r103668 with a fix. Never make "minor syntax changes"
...
after testing before committing.
llvm-svn: 103681
2010-05-13 00:02:47 +00:00
e354235512
revert r103668 for now, it is apparently breaking things.
...
llvm-svn: 103677
2010-05-12 23:40:59 +00:00
a6df4650fd
moffset forms of moves are x86-32 only, make the parser
...
lower them to the correct x86-64 instructions since we
don't have a clean way to handle this in td files yet.
rdar://7947184
llvm-svn: 103668
2010-05-12 23:13:36 +00:00
e132b0a92c
fix the encoding of the obscure "moffset" forms of moves, i386
...
part first. rdar://7947184
llvm-svn: 103660
2010-05-12 22:48:24 +00:00
059379a9d7
MC/X86: Extend suffix matching hack to match 'q' suffix.
...
llvm-svn: 103535
2010-05-12 00:54:20 +00:00
21aa523c28
MC/X86: X86AbsMemAsmOperand is subclass of X86NoSegMemAsmOperand.
...
- This fixes "leal 0, %eax", for example.
llvm-svn: 103205
2010-05-06 22:39:14 +00:00
348dc9b15a
fix rdar://7947167 - llvm-mc doesn't match movsq
...
llvm-svn: 103199
2010-05-06 21:48:14 +00:00
b0ceb764b8
Revert r103137, fix for $ in labels. It looks like we can't actually handle this
...
at the token level. Consider the following horrible test case:
a = 1
.globl $a
movl ($a), %eax
movl $a, %eax
movl $$a, %eax
llvm-svn: 103178
2010-05-06 14:46:38 +00:00
482fa218d4
fix rdar://7946934 - in some limited cases, the assembler should
...
allow $ at the start of a symbol name.
llvm-svn: 103137
2010-05-05 23:51:28 +00:00
c3e0bafc6d
MC/X86: Chris pointed that 'as' isn't consistent in accepting the long form of
...
instructions which have no direct register usage.
Darwin 'as' accepts:
add $0, (%rax)
but rejects
mov $0, (%rax)
for example.
Given that, only accept suffix matches which match exactly one form. We still
need to emit nice diagnostics for failures...
llvm-svn: 103015
2010-05-04 17:31:02 +00:00
9b816a1bb3
MC/X86: Add "support" for matching ATT style mnemonic prefixes.
...
- The idea is that when a match fails, we just try to match each of +'b', +'w',
+'l'. If exactly one matches, we assume this is a mnemonic prefix and accept
it. If all match, we assume it is width generic, and take the 'l' form.
- This would be a horrible hack, if it weren't so simple. Therefore it is an
elegant solution! Chris gets the credit for this particular elegant
solution. :)
- Next step to making this more robust is to have the X86 matcher generate the
mnemonic prefix information. Ideally we would also compute up-front exactly
which mnemonic to attempt to match, but this may require more custom code in
the matcher than is really worth it.
llvm-svn: 103012
2010-05-04 16:12:42 +00:00
6f2f8d0798
Changed llvm-mc to use the same suffixes with floating point compare
...
instructions as the Mac OS X darwin assembler. Some of which like 'fcoml'
assembled to different opcodes. While some of the suffixes were just different.
llvm-svn: 102958
2010-05-03 21:31:40 +00:00
e3a1726034
Fixed the encoding of two of the X86 movq instuctions. The Move quadword from
...
mm to mm/m64 and the Move quadword from xmm2/mem64 to xmm1 had the incorrect
encodings.
llvm-svn: 102952
2010-05-03 21:03:31 +00:00
1a51d4cec9
Fixed the encoding of the x86 push instructions. Using a 32-bit immediate value
...
caused the a pushl instruction to be incorrectly encoding using only two bytes
of immediate, causing the following 2 instruction bytes to be part of the 32-bit
immediate value. Also fixed the one byte form of push to be used when the
immediate would fit in a signed extended byte. Lastly changed the names to not
include the 32 of PUSH32 since they actually push the size of the stack pointer.
llvm-svn: 102951
2010-05-03 20:45:05 +00:00
4822841b82
Fixed the word sized Bit Scan Forward/Reverse instructions, they needed the
...
Operand size override prefix to be part of their records.
llvm-svn: 102556
2010-04-28 23:20:40 +00:00
b927073f2e
teach the x86 asm parser how to handle segment prefixes
...
in memory operands. rdar://7874844
llvm-svn: 101661
2010-04-17 18:56:34 +00:00
7f5088e6de
a bunch of ssse3 instructions are misencoded to think they have an
...
i8 field when they really do not. This fixes rdar://7840289
llvm-svn: 101629
2010-04-17 07:38:24 +00:00
6b55cb9cd8
implement mc asmparser support for '.', which gets the
...
current PC. rdar://7834775
We now produce an identical .o file compared to the cctools
assembler for something like this:
_f0:
L0:
jmp L1
.long . - L0
L1:
jmp A
.long . - L1
.zerofill __DATA,_bss,A,0
llvm-svn: 101227
2010-04-14 04:40:28 +00:00
e543e7fcb1
Reapply Kevin's change 94440, now that Chris has fixed the limitation on
...
opcode values fitting in one byte (svn r99494).
llvm-svn: 99514
2010-03-25 16:36:14 +00:00
5b2da69f6d
Speculatively revert this to see if it fixes buildbot failures.
...
--- Reverse-merging r99440 into '.':
U test/MC/AsmParser/X86/x86_32-bit_cat.s
U test/MC/AsmParser/X86/x86_32-encoding.s
U include/llvm/IntrinsicsX86.td
U include/llvm/CodeGen/SelectionDAGNodes.h
U lib/Target/X86/X86InstrSSE.td
U lib/Target/X86/X86ISelLowering.h
llvm-svn: 99450
2010-03-24 23:26:29 +00:00
f5584a7397
Added the Advanced Encryption Standard (AES) Instructions.
...
llvm-svn: 99440
2010-03-24 22:33:33 +00:00
b96eb68497
Fixed the SS42AI template for the SSE 4.2 instructions with TA prefix so it does
...
not get an "Unknown immediate size" assert failure when used. All instructions
of this form have an 8-bit immediate. Also added a test case of an example
instruction that is of this form.
llvm-svn: 99435
2010-03-24 22:28:42 +00:00
cf0843ed93
Fixed the encoding problems of the crc32 instructions. All had the Operand size
...
override prefix and only the r/m16 forms should have had that. Also for variant
one, the AT&T syntax, added suffixes to all forms. Also added the missing
64-bit form for 'CRC32 r64, r/m8'. Plus added test cases for all forms and
tweaked one test case to add the needed suffixes.
llvm-svn: 98980
2010-03-19 20:04:42 +00:00
c532697372
MC/X86: Rename alternate spellings of {ADD64,CMP64} and mark as "code gen only" so they don't get selected by the asm matcher.
...
llvm-svn: 98972
2010-03-19 18:07:48 +00:00
c9deca20e8
X86: Fix encoding for TEST64rr.
...
llvm-svn: 98919
2010-03-19 01:15:03 +00:00
2ca1108254
X86MCCodeEmitter: Fix two minor issues with reloc_riprel_4byte_movq_load, we
...
were missing it on some movq instructions and were not including the appropriate
PCrel bias.
llvm-svn: 98880
2010-03-18 21:53:54 +00:00
63ec093b6e
MC/X86/AsmMatcher: Use the new instruction cleanup routine to implement a
...
temporary workaround for matching inc/dec on x86_64 to the correct instruction.
- This hack will eventually be replaced with a robust mechanism for handling
matching instructions based on the available target features.
llvm-svn: 98858
2010-03-18 20:06:02 +00:00
b3f659c8c8
fix an x86-64 encoding bug Daniel found.
...
llvm-svn: 98855
2010-03-18 20:04:36 +00:00
a3a66b28b6
add a special relocation type for movq loads for object
...
files that produce special relocation types where the
linker changes movq's into lea's.
llvm-svn: 98839
2010-03-18 18:10:56 +00:00
1e2dc539b9
xfail these tests temporarily to get teh buildbots back to happy land.
...
llvm-svn: 98476
2010-03-14 07:32:48 +00:00
d324a7c990
X86: Fix ADD64i32 encoding.
...
llvm-svn: 98457
2010-03-13 22:49:39 +00:00
906a432031
MC/X86_64: Fix matching of leaq.
...
llvm-svn: 98444
2010-03-13 19:31:44 +00:00
e60c883bf4
MC/X86_64: Fix matching of callq.
...
llvm-svn: 98443
2010-03-13 19:31:38 +00:00
18fc344290
MC/X86: Add temporary hack to match shrl $1,%eax correctly, to support testing
...
other functionality on 403.gcc compiled at -O0.
llvm-svn: 98405
2010-03-13 00:47:29 +00:00
b86672059e
MC/X86: Add an XFAIL test where we aren't matching the correct instruction
...
because we don't understand how the specific instruction is doing sign
extension.
llvm-svn: 98404
2010-03-13 00:47:25 +00:00
b70c2f795e
MC/X86: Rename alternate spellings of ADD{8,16,32} and mark as "code gen only" so they don't get selected by the asm matcher.
...
llvm-svn: 98098
2010-03-09 22:50:46 +00:00
f5b6a1118d
MC/X86: Rename alternate spellings of CMP{8,16,32} and mark as "code gen only" so they don't get selected by the asm matcher.
...
llvm-svn: 98097
2010-03-09 22:50:40 +00:00
b59f7734b9
X86: Fix encoding for TEST{8,16,32}rr.
...
llvm-svn: 97982
2010-03-08 21:10:36 +00:00
4964ef88c2
make pcrel immediate values relative to the start of the field,
...
not the end of the field, fixing rdar://7651978
llvm-svn: 96330
2010-02-16 05:03:17 +00:00
f83726f6ba
add encoder support and tests for rdtscp
...
llvm-svn: 96076
2010-02-13 03:42:24 +00:00
d0c6d361fe
MC/AsmParser: Attempt to constant fold expressions up-front. This ensures we avoid fixups for obvious cases like '-(16)'.
...
llvm-svn: 96064
2010-02-13 01:28:07 +00:00
509154e0f9
rip out the 'heinous' x86 MCCodeEmitter implementation.
...
We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.
llvm-svn: 96059
2010-02-13 00:49:29 +00:00
140caa7240
remove special cases for vmlaunch, vmresume, vmxoff, and swapgs
...
fix swapgs to be spelled right.
llvm-svn: 96058
2010-02-13 00:41:14 +00:00
224340cabe
MC/X86: Push immediate operands as immediates not expressions when possible.
...
llvm-svn: 96055
2010-02-13 00:17:21 +00:00
1e827fd8ca
implement the rest of correct x86-64 encoder support for
...
rip-relative addresses, and add a testcase.
llvm-svn: 96040
2010-02-12 23:24:09 +00:00
1572e760bc
fix the encodings of monitor and mwait, which were completely
...
busted in both encoders. I'm not bothering to fix it in the
old one at this point.
llvm-svn: 95947
2010-02-12 01:06:22 +00:00
37993197bf
Remove the few # TAILCALL comments that snuck in. As they may fail on linux.
...
llvm-svn: 95827
2010-02-11 00:18:12 +00:00
cfd0e5a15e
Update the X86 assembler matcher test case now that a few more things match
...
with some of the recent changes that have gone into llvm-mc.
llvm-svn: 95826
2010-02-11 00:13:43 +00:00
3e0c9790f2
MC/X86 AsmMatcher: Fix a use after free spotted by d0k, and de-XFAIL
...
x86_32-encoding.s in on expectation of it passing.
llvm-svn: 95806
2010-02-10 21:19:28 +00:00
df11958895
XFAIL this on linux until I figure out what is happening.
...
llvm-svn: 95804
2010-02-10 21:01:04 +00:00
cc152d6159
Replace this file containing 4 tests of x86 32-bit encodings with a file
...
containing the subset of the full auto generated test case that currently
encodes correctly. Again it is useful as we bring up the the new encoder
to make sure currently working stuff stays working.
llvm-svn: 95791
2010-02-10 19:13:56 +00:00
a7c1d6cfd1
Fix the encoding of the movntdqa X86 instruction. It was missing the 0x66
...
prefix which is part of the opcode encoding.
llvm-svn: 95729
2010-02-10 00:10:31 +00:00
0c3b66cd87
fix X86 encoder to output [disp] only addresses with no SIB byte
...
in X86-32 mode. This is still required in x86-64 mode to avoid
forming [disp+rip] encoding. Rewrite the SIB byte decision logic
to be actually understandable.
llvm-svn: 95693
2010-02-09 21:47:19 +00:00
d00faaa9c7
Implement x86 asm parsing support for %st and %st(4)
...
llvm-svn: 95634
2010-02-09 00:49:22 +00:00
9d624778a3
fix incorrect encoding of SBB8mi that Kevin noticed.
...
llvm-svn: 95448
2010-02-05 22:56:11 +00:00
d91f302a05
fix a case where we'd mis-encode fisttp because of an incorrect (and
...
redundant with a correct one) pattern that was added for the disassembler.
llvm-svn: 95446
2010-02-05 22:49:06 +00:00
d2e879a012
remove fixme
...
llvm-svn: 95444
2010-02-05 22:46:46 +00:00
00f1e6c030
Added support for X86 instruction prefixes so llvm-mc can assemble them. The
...
Lock prefix, Repeat string operation prefixes and the Segment override prefixes.
Also added versions of the move string and store string instructions without the
repeat prefixes to X86InstrInfo.td. And finally marked the rep versions of
move/store string records in X86InstrInfo.td as isCodeGenOnly = 1 so tblgen is
happy building the disassembler files.
llvm-svn: 95252
2010-02-03 21:04:42 +00:00
bdbffbedf0
AsmParser/X86: Add temporary hack to allow parsing "sal". Eventually we need
...
some mechanism for specifying alternative syntaxes, but I'm not sure what form
that should take yet.
llvm-svn: 95158
2010-02-02 23:46:47 +00:00
73051044fd
remove the # TAILCALL markers, which was causing the to fail.
...
It's unclear if the matcher is nondeterminstic of what here,
but I'm getting matches without TAILCALL and some other hosts
are getting matches with it.
llvm-svn: 95149
2010-02-02 22:36:29 +00:00
de9b3ada5d
this apparently depends on the host somehow.
...
llvm-svn: 95122
2010-02-02 20:57:28 +00:00
2481509162
disable this test for now.
...
llvm-svn: 95120
2010-02-02 20:41:39 +00:00
db32c4567b
Added another version of the X86 assembler matcher test case.
...
This test case is different subset of the full auto generated test case, and a
larger subset that is in x86_32-bit.s (that set will encode correctly). These
instructions can pass though llvm-mc as it were a logical cat(1) and then
reassemble to the same instruction. It is useful as we bring up the parser and
matcher so we don't break things that currently work.
llvm-svn: 95107
2010-02-02 19:05:57 +00:00
76e5d70c57
MC/X86 AsmParser: Handle absolute memory operands correctly. We were doing
...
something totally broken and parsing them as immediates, but the .td file also
had the wrong match class so things sortof worked. Except, that is, that we
would parse
movl $0, %eax
as
movl 0, %eax
Feel free to guess how well that worked.
llvm-svn: 94869
2010-01-30 01:02:48 +00:00
7f0421eebb
MC/X86: Add a nice X86 assembler matcher test case from Kevin Enderby.
...
- This test case is auto generated, and has been verified to round-trip
correctly through llvm-mc by checking the assembled .o file before and after
piping through llvm-mc. It will be extended over time as the matcher grows
support for more instructions.
llvm-svn: 94857
2010-01-29 23:32:40 +00:00
d45adf28de
wirte up .file and .file to the mc asmparser.
...
llvm-svn: 94438
2010-01-25 19:02:58 +00:00
807a3bcbbb
fix a parsing problem on instructions like:
...
movw $8, (_cost_table_-L97$pb)+66(%eax)
After the parens, we could still have a binop.
llvm-svn: 94345
2010-01-24 01:07:33 +00:00
ded9af63bb
teach MCAsmStreamer::EmitBytes to use .ascii and .asciz
...
llvm-svn: 94259
2010-01-23 00:15:00 +00:00
862023fcb2
Mark EH_RETURN64 as CodeGenOnly.
...
llvm-svn: 94205
2010-01-22 20:16:37 +00:00
4340cb3246
add an MCAsmStreamer::EmitFill specialization of EmitFill that
...
emits one directive instead of N. Not doing this would be a
significant regression on the # bytes generated by .fill.
llvm-svn: 93889
2010-01-19 18:52:28 +00:00
795bfb7207
only darwin has zerofill
...
llvm-svn: 93866
2010-01-19 06:21:23 +00:00
6a19c14968
Force triple in tests.
...
llvm-svn: 84257
2009-10-16 16:30:02 +00:00
5f339244fb
MC: Tweak variable assignment diagnostics, and make reassignment of non-absolute
...
variables and symbols invalid.
llvm-svn: 84232
2009-10-16 01:57:39 +00:00
d20cda028a
MC: When parsing a variable reference, substitute absolute variables immediately
...
since they are allowed to be redefined.
llvm-svn: 84230
2009-10-16 01:34:54 +00:00
c05f9a60d9
Move ARM and X86 specific AsmParser tests into separate subdirectories, and only
...
run if appropriate target is supported.
llvm-svn: 82419
2009-09-21 00:05:30 +00:00
4479034537
Add an intel syntax MCInstPrinter implementation. You can now
...
transcode from AT&T to intel syntax with "llvm-mc foo.s -output-asm-variant=1"
llvm-svn: 82385
2009-09-20 07:17:49 +00:00
ccab317837
Added the first bits of the ARM target assembler to llvm-mc. For now it only
...
parses the .word directive as 4 bytes and ARMAsmParser::ParseInstruction will
give an error is called. Broke out the test of the .word directive into two
different test cases, one for x86 and one for arm.
llvm-svn: 81817
2009-09-15 00:27:25 +00:00
b4370748b3
unbreak this test by working around an asmparser bug.
...
llvm-svn: 81724
2009-09-13 22:28:17 +00:00
87be9e7c78
Unbreak these tests. Chris, please verify that these changes are intended.
...
llvm-svn: 81217
2009-09-08 14:14:24 +00:00
438380aa4d
use a darwin triple
...
llvm-svn: 80900
2009-09-03 06:15:11 +00:00
17b3a93ad0
adjust expected lines.
...
llvm-svn: 80898
2009-09-03 06:13:45 +00:00
11c989cc47
update test for alignment value in hex
...
llvm-svn: 80876
2009-09-03 04:03:44 +00:00
897ffadd2d
llvm-mc: Pass values to MCStreamer as MCExprs, not MCValues.
...
llvm-svn: 80578
2009-08-31 08:09:28 +00:00
b7b2097aac
llvm-mc: Simplify EmitAssignment ('.set' is identical to '=').
...
llvm-svn: 80577
2009-08-31 08:09:09 +00:00
73da11ebda
llvm-mc: Switch MCInst to storing an MCExpr* instead of an MCValue.
...
Also, use MCInst::print instead of custom code in MCAsmPrinter.
llvm-svn: 80575
2009-08-31 08:08:38 +00:00
03686805e8
Update test.
...
llvm-svn: 80490
2009-08-30 07:01:09 +00:00
6a715dccdf
llvm-mc: MCStreamer cleanups. - Remove EmitLocalSymbol, this is unsupported for now.
...
- Switch Emit{CommonSymbol,Zerofill} to take alignment in bytes (for consistency).
llvm-svn: 80484
2009-08-30 06:17:16 +00:00
96abad185d
llvm-mc: Emit .lcomm as .zerofill.
...
llvm-svn: 80343
2009-08-28 05:48:46 +00:00
a1cb9ba541
For now, only run MC tests if X86 is configured.
...
llvm-svn: 80213
2009-08-27 06:11:15 +00:00
8e5edd81bb
llvm-mc: Accept .fill size of 8.
...
llvm-svn: 79635
2009-08-21 15:43:35 +00:00
45e5670ede
Fix typo
...
llvm-svn: 79445
2009-08-19 18:35:54 +00:00
78b23b0e3f
fix asmstreaming of 2/4 byte elements with pow-2 alignments.
...
llvm-svn: 79408
2009-08-19 06:35:36 +00:00
6cb1eb5a6d
llvm-mc: Fix bugs where bytes were unintentionally being printed as signed.
...
- We now print all of 403.gcc cleanly (llvm-mc -> 'as' as diffed to 'as'), minus two
'rep;movsl' instructions (which I missed before).
llvm-svn: 79031
2009-08-14 19:59:24 +00:00
c2346a3037
llvm-mc: When handling a .set, make sure to print subsequent references to the
...
symbol as the symbol name itself, not the expression it was defined to. These
have different semantics due to the quirky .set behavior (which absolutizes an
expression that would otherwise be treated as a relocation).
llvm-svn: 79025
2009-08-14 19:10:46 +00:00
563a7e87e3
llvm-mc: zerofill shouldn't print quotes around the section,segment.
...
llvm-svn: 79017
2009-08-14 18:51:45 +00:00
ef668c169b
llvm-mc: Support escaped characters in string literals (for .ascii and .asciz)
...
llvm-svn: 79010
2009-08-14 18:19:52 +00:00
80d484e7cc
Update llvm-mc / MCAsmStreamer to print the instruction using the actual target
...
specific printer (this only works on x86, for now).
- This makes it possible to do some correctness checking of the parsing and
matching, since we can compare the results of 'as' on the original input, to
those of 'as' on the output from llvm-mc.
- In theory, we could now have an easy ATT -> Intel syntax converter. :)
llvm-svn: 78986
2009-08-14 03:48:55 +00:00
3fb754af06
llvm-mc/AsmParser: Match hard coded registers (e.g. 'shldl %cl, %eax, %eax')
...
We now match all of 403.gcc (as emitted by clang). :)
llvm-svn: 78750
2009-08-11 23:23:44 +00:00
7f8a9ebc8d
llvm-mc: Fix a crash on invalid due to a typo in relocatable expression
...
evaluation.
llvm-svn: 78692
2009-08-11 17:47:52 +00:00
71527c1493
llvm-mc/X86: Parse '*' correctly (in the way the matcher expects).
...
llvm-svn: 78642
2009-08-11 05:00:25 +00:00
ba95a7cd8d
llvm-mc: Accept .word as a synonym for .short
...
llvm-svn: 78641
2009-08-11 04:44:00 +00:00
a4b069ce00
llvm-mc: Sketch parsing for .file, .line, and .loc. No streamer hooks for these
...
yet (I'm not even sure what they do).
llvm-svn: 78639
2009-08-11 04:24:50 +00:00
9af747b421
llvm-mc: Fix darwin .section parsing. It was skipping the section name and a ','
...
(and outputting a diagnostic pointing at the wrong place), all of which lead to
much confusion.
llvm-svn: 78637
2009-08-11 03:42:33 +00:00
bb98db2d21
llvm-mc/AsmParser: Implement automatic classification of RegisterClass operands.
...
- This drops us to 123 ambiguous instructions (previously ~500) on X86.
llvm-svn: 78636
2009-08-11 02:59:53 +00:00
e4f79d140d
llvm-mc/AsmParser: Disambiguate i64i8imm.
...
llvm-svn: 78598
2009-08-10 21:06:41 +00:00
2587b61533
llvm-mc/AsmParser: Check for matches with super classes when matching
...
instruction operands.
llvm-svn: 78565
2009-08-10 16:05:47 +00:00
5877782962
Disable this test for now, we don't check for super classes when matching yet.
...
llvm-svn: 78531
2009-08-09 07:35:56 +00:00
8e33cb2de1
llvm-mc/AsmParser: Implement user defined super classes.
...
- We can now discriminate SUB32ri8 from SUB32ri, for example.
llvm-svn: 78530
2009-08-09 07:20:21 +00:00
591105c540
sink the 'name' and 'isdirective' state out of MCSection into its derived classes.
...
This totally optimizes PIC16 sections by not having an 'isdirective' bit anymore!! ;-)
llvm-svn: 78517
2009-08-08 23:39:42 +00:00
541efcc5c4
llvm-mc/AsmMatcher: Improve match code.
...
- This doesn't actually improve the algorithm (its still linear), but the
generated (match) code is now fairly compact and table driven. Still need a
generic string matcher.
- The table still needs to be compressed, this is quite simple to do and should
shrink it to under 16k.
- This also simplifies and restructures the code to make the match classes more
explicit, in anticipation of resolving ambiguities.
llvm-svn: 78461
2009-08-08 07:50:56 +00:00
d9f952948e
Added Mac OS X assembler style conditional assembly. I may come back and see if
...
I can clean this up a bit more and do way with the TheCondState and just use
the top element on the TheCondStack if not empty. Also may tweak the code
around ParseConditionalAssemblyDirectives() to simplify the AsmParser code.
llvm-svn: 78423
2009-08-07 22:46:00 +00:00
32d0bb4c4e
Disable X86 AsmMatcher for now, it is causing gcc-4.0 to run out of memory on
...
i386-apple-darwin9. This presumably will get fixed once the generated code
improves.
llvm-svn: 78379
2009-08-07 08:45:03 +00:00
e10787e710
llvm-mc/AsmMatcher: Move to a slightly more sane matching design.
...
- Still not very sane, but a least its not 60k lines on X86. :)
- In terms of correctness, currently some things are hard wired for X86, and we
still don't properly resolve ambiguities (this is ignoring the instructions
we don't even match due to funny .td stuff or other corner cases).
The high level changes:
1. Represent tokens which are significant for matching explicitly as separate
operands. This uniformly handles not only the instruction mnemonic, but
also 'signficiant' syntax like the '*' in "call * ...".
2. Separate the matching of operands to an instruction from the construction of
the MCInst. In theory this can be done during matching, but since the number
of variations is small I think it makes sense to decompose the problems.
3. Improved a few of the mechanisms to at least successfully flatten / tokenize
the assembly strings for PowerPC and ARM.
4. The comment at the top of AsmMatcherEmitter.cpp explains the approach I'm
moving towards for handling ambiguous instructions. The high-bit is to infer
a partial ordering of the operand classes (and force the user to specify one
if we can't) and use that to resolve ambiguities.
llvm-svn: 78378
2009-08-07 08:26:05 +00:00
c54ecb384d
llvm-mc: More quoted identifier support.
...
llvm-svn: 77761
2009-08-01 00:48:30 +00:00
ce24e0043e
llvm-mc: Add -triple, and fix some typos
...
llvm-svn: 77750
2009-07-31 23:13:12 +00:00
e0cbd9b986
llvm-mc: Fix .s output to quote section & symbol names when necessary.
...
llvm-svn: 77749
2009-07-31 23:04:32 +00:00
a4fc8d94ce
llvm-mc: A few more parsing / match tweaks.
...
- Operands which are just a label should be parsed as immediates, not memory
operands (from the assembler perspective).
- Match a few more flavors of immediates.
- Distinguish match functions for memory operands which don't take a segment
register.
- We match the .s for "hello world" now!
llvm-svn: 77745
2009-07-31 22:22:54 +00:00
9ee33ca28e
llvm-mc: Support quoted identifiers.
...
- Uses MCAsmToken::getIdentifier which returns the (sub)string representing the
meaningfull contents a string or identifier token.
- Directives aren't done yet.
llvm-svn: 77739
2009-07-31 21:55:09 +00:00
3ebf848b47
llvm-mc/X86: Sketch match functions for immediates and memory operands.
...
Also, change scale value to always be 1 when unspecified to machine MachineInst
encoding.
llvm-svn: 77728
2009-07-31 20:53:16 +00:00
a93183b8c9
Add this test back, the check pattern was too strict.
...
llvm-svn: 77662
2009-07-31 03:11:49 +00:00
8f416a5138
Remove this test while I figure out why it is failing.
...
llvm-svn: 77659
2009-07-31 02:46:36 +00:00
b6d6aa2d22
llvm-mc: Match a few X86 instructions.
...
- This is "experimental" code, I am feeling my way around and working out the
best way to do things (and learning tblgen in the process). Comments welcome,
but keep in mind this stuff will change radically.
- This is enough to match "subb" and friends, but not much else. The next step is to
automatically generate the matchers for individual operands.
llvm-svn: 77657
2009-07-31 02:32:59 +00:00
eb6bb32bef
llvm-mc: Implement .abort fully in the front end
...
llvm-svn: 77272
2009-07-27 23:20:52 +00:00
ee5513582d
Removed the DumpSymbolsandMacros and LoadSymbolsandMacros MCStreamer API as
...
the parsing of the .dump and .load should be done in the assembly parser and
not have any need for an MCStreamer API. Changed the code for now so these
just produce an error saying these specific directives are not yet implemented
since they are likely no longer used and may never need to be implemented.
llvm-svn: 76462
2009-07-20 20:25:37 +00:00
8c6bad2f66
llvm-mc: Add -triple, and start fetching the target asm printer.
...
llvm-svn: 76257
2009-07-17 22:38:58 +00:00
693fbb8fee
implement .include in the lexer/parser instead of passing it into the streamer.
...
llvm-svn: 75896
2009-07-16 06:14:39 +00:00
09ea5709a2
Added llvm-mc support for parsing the .dump and .load directives.
...
llvm-svn: 75786
2009-07-15 15:30:11 +00:00
d1ea5393c9
Added llvm-mc support for parsing the .include directive.
...
llvm-svn: 75711
2009-07-14 23:21:55 +00:00
cbe475dfe8
Added llvm-mc support for parsing the .lsym directive.
...
llvm-svn: 75685
2009-07-14 21:35:03 +00:00
4c21caa656
Added llvm-mc support for parsing the .desc directive.
...
llvm-svn: 75645
2009-07-14 18:17:10 +00:00
56523ceba1
Added llvm-mc support for parsing the .abort directive.
...
llvm-svn: 75545
2009-07-13 23:15:14 +00:00
c9d93ef2c6
add llvm-mc support for parsing the .subsections_via_symbols directive.
...
llvm-svn: 75500
2009-07-13 21:03:15 +00:00
07cadaf113
add support for .zerofill, patch by Kevin Enderby!
...
llvm-svn: 75301
2009-07-10 22:20:30 +00:00
28ad7547d2
add llvm-mc support for parsing the .lcomm directive, patch by Kevin Enderby!
...
llvm-svn: 75148
2009-07-09 17:25:12 +00:00
a3a9ebf506
Switch all the MC tests to use FileCheck.
...
llvm-svn: 75039
2009-07-08 20:50:34 +00:00
3ffc901c6a
convert to FileCheck style.
...
llvm-svn: 75038
2009-07-08 20:40:54 +00:00
a1e11f530e
Implement parsing support for the .comm directive. Patch by
...
Kevin Enderby!
llvm-svn: 74944
2009-07-07 20:30:46 +00:00
a065149f39
llvm-mc/x86: Test case for x86 operand parsing.
...
llvm-svn: 74688
2009-07-02 02:28:23 +00:00
8561b6aea0
llvm-mc: Symbols in a relocatable expression of the (a - b + cst) form are
...
allowed to be undefined when the expression is seen, we cannot enforce the
same-section requirement until the entire assembly file has been seen.
llvm-svn: 74565
2009-06-30 22:49:27 +00:00
75630b355a
llvm-mc: Accept relocatable expressions for .org, assignments, .byte, etc.
...
llvm-svn: 74498
2009-06-30 02:10:03 +00:00
a5508c893a
llvm-mc: Parse symbol attribute directives.
...
llvm-svn: 74487
2009-06-30 00:33:19 +00:00
cc566a714b
llvm-mc: Parse .{,b,p2}align{,w,l} directives.
...
llvm-svn: 74478
2009-06-29 23:46:59 +00:00
5992b4a211
llvm-mc: Recognize C++ style comments.
...
llvm-svn: 74463
2009-06-29 22:00:57 +00:00
7e8d6c7215
MC: Improve expression parsing and implement evaluation of absolute expressions.
...
llvm-svn: 74448
2009-06-29 20:37:27 +00:00
4a5a561a24
MC: Parse .org directives.
...
llvm-svn: 74218
2009-06-25 22:44:51 +00:00
2d2ee150eb
MC: Parse .set and assignments.
...
llvm-svn: 74208
2009-06-25 21:56:11 +00:00
a10e519e04
Basic .s parsing for .asci[iz], .fill, .space, {.byte, .short, ... }
...
- Includes some DG tests in test/MC/AsmParser, which are rather primitive since
we don't have a -verify mode yet.
llvm-svn: 74139
2009-06-24 23:30:00 +00:00
Bruno Cardoso Lopes