llvm-project

Commit Graph

Author	SHA1	Message	Date
JF Bastien	03855df197	WebAssembly: start instructions Summary: * Add 64-bit address space feature. * Rename SIMD feature to SIMD128. * Handle single-thread model with an IR pass (same way ARM does). * Rename generic processor to MVP, to follow design's lead. * Add bleeding-edge processors, with all features included. * Fix a few DEBUG_TYPE to match other backends. Test Plan: ninja check Reviewers: sunfish Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D10880 llvm-svn: 241211	2015-07-01 23:41:25 +00:00
Dan Gohman	d82494bb75	[WebAssembly] Define separate Target instances for 32-bit and 64-bit. llvm-svn: 241193	2015-07-01 21:42:34 +00:00
Dan Gohman	10e730a263	[WebAssembly] Initial WebAssembly backend This WebAssembly backend is just a skeleton at this time and is not yet functional. llvm-svn: 241022	2015-06-29 23:51:55 +00:00

Author

SHA1

Message

Date

JF Bastien

03855df197

WebAssembly: start instructions

Summary:
* Add 64-bit address space feature.
* Rename SIMD feature to SIMD128.
* Handle single-thread model with an IR pass (same way ARM does).
* Rename generic processor to MVP, to follow design's lead.
* Add bleeding-edge processors, with all features included.
* Fix a few DEBUG_TYPE to match other backends.

Test Plan: ninja check

Reviewers: sunfish

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D10880

llvm-svn: 241211

2015-07-01 23:41:25 +00:00

Dan Gohman

d82494bb75

[WebAssembly] Define separate Target instances for 32-bit and 64-bit.

llvm-svn: 241193

2015-07-01 21:42:34 +00:00

Dan Gohman

10e730a263

[WebAssembly] Initial WebAssembly backend

This WebAssembly backend is just a skeleton at this time and is not yet
functional.

llvm-svn: 241022

2015-06-29 23:51:55 +00:00

3 Commits