Commit Graph

171833 Commits

Author SHA1 Message Date
Bradley Smith 7525b47208 [ARM64] UBFM/BFM is undefined on w registers when imms<5> or immr<5> is 1.
llvm-svn: 205879
2014-04-09 14:43:24 +00:00
Bradley Smith 0243aa33fa [ARM64] Floating point to fixed point scaled conversions are only available on fcvtzs and fcvtzu.
llvm-svn: 205878
2014-04-09 14:43:20 +00:00
Bradley Smith 8f906a3c5f [ARM64] Port over the PostEncoderMethod fix for SMULH/UMULH from AArch64.
llvm-svn: 205877
2014-04-09 14:43:15 +00:00
Bradley Smith 9f29b726d5 [ARM64] Add missing tlbi operands and error for extra/missing register on tlbi aliases.
llvm-svn: 205876
2014-04-09 14:43:11 +00:00
Bradley Smith e8b4166acc [ARM64] Rework system register parsing to overcome SPSel clash in MSR variants.
llvm-svn: 205875
2014-04-09 14:43:06 +00:00
Bradley Smith bc35b1f138 [ARM64] Port over the PostEncoderMethod from AArch64 for exclusive loads and stores, so the unused register fields are set to all-ones canonically but are recognised with any value.
llvm-svn: 205874
2014-04-09 14:43:01 +00:00
Bradley Smith 4925be9b56 [ARM64] Use PStateMapper to ensure that MSRcpsr operands are validated during disassembly.
llvm-svn: 205873
2014-04-09 14:42:56 +00:00
Bradley Smith 3339427e2a [ARM64] Remove PrefetchOp and use ARM64PRFM instead.
llvm-svn: 205872
2014-04-09 14:42:53 +00:00
Bradley Smith 16478c4ccf [ARM64] Add WZR to isGPR32Register, since every use needs to check for this anyway.
llvm-svn: 205871
2014-04-09 14:42:49 +00:00
Bradley Smith 3db2a85853 [ARM64] Remove ARM64SYS.
llvm-svn: 205870
2014-04-09 14:42:45 +00:00
Bradley Smith fb90df563f [ARM64] Move CPSRField and DBarrier operands over to AArch64-style disassembly and assembly. This removes the last users of namespace ARM64SYS.
llvm-svn: 205869
2014-04-09 14:42:42 +00:00
Bradley Smith 08c391c156 [ARM64] Switch the decoder, disassembler, instprinter and asmparser over to using AArch64-style system registers, and fix up test failures discovered in the process.
llvm-svn: 205868
2014-04-09 14:42:36 +00:00
Bradley Smith 2ba17a4a17 [ARM64] Move ARM64BaseInfo.{cpp,h} into a Utils/ subdirectory, a la AArch64. These files are required in the decoder, disassembler and parser, and a layering violation was imminent.
llvm-svn: 205867
2014-04-09 14:42:27 +00:00
Bradley Smith ceeb04df60 [ARM64] Copy the named immediate operand mapping logic and enums from AArch64. AArch64's named immediate mapping and parsing is much more advanced than ARM64's. No functionality change - they're currently living side by side while I switch uses over.
llvm-svn: 205866
2014-04-09 14:42:16 +00:00
Bradley Smith 8c0b88c987 [ARM64] Shifted register ALU ops are reserved if sf=0 and imm6<5>=1, and also (for add/sub only) if shift=11.
llvm-svn: 205865
2014-04-09 14:42:11 +00:00
Bradley Smith 527bf86e56 [ARM64] Add support for NV condition code (exists only for valid assembly/disassembly, equivilant to AL)
llvm-svn: 205864
2014-04-09 14:42:07 +00:00
Bradley Smith 6d7af17a3f [ARM64] Add missing 1Q -> 1q vector kind alias
llvm-svn: 205863
2014-04-09 14:42:01 +00:00
Bradley Smith 7d253f29a4 [ARM64] Add parsing for vector lists such as {v0.8b-v3.8b}
llvm-svn: 205862
2014-04-09 14:41:58 +00:00
Bradley Smith 664aa67153 [ARM64] Correctly alias LSL to UXTW for 32bit instruction variants, rather than UXTX
llvm-svn: 205861
2014-04-09 14:41:53 +00:00
Bradley Smith 35cadc58c9 [ARM64] STRHro and STRBro were not being decoded at all.
llvm-svn: 205860
2014-04-09 14:41:49 +00:00
Bradley Smith 87c60e00d5 [ARM64] MOVK with sf=0 and hw<1>=1 is unallocated. Shift amount for ADD/SUB instructions is unallocated if shift > 4.
llvm-svn: 205859
2014-04-09 14:41:45 +00:00
Bradley Smith cd91e5cd0c [ARM64] Register-offset loads and stores with the 'option' field equal to 00x or 10x are undefined.
llvm-svn: 205858
2014-04-09 14:41:38 +00:00
Filipe Cabecinhas 2c4e8ae0fd Revert "YAMLIO: Encode ambiguous hex strings explicitly"
This reverts commit r205839.

It broke several tests in lld.

llvm-svn: 205857
2014-04-09 14:35:17 +00:00
Arnold Schwaighofer fd0bf5d6e5 SLPVectorizer: Only vectorize intrinsics whose operands are widened equally
The vectorizer only knows how to vectorize intrinics by widening all operands by
the same factor.

Patch by Tyler Nowicki!

llvm-svn: 205855
2014-04-09 14:20:47 +00:00
Samuel Benzaquen 110f3cc45a Extend the check to detect patterns like 'ptr.get() == nullptr'
Summary:
Extend the check to detect patterns like 'ptr.get() == nullptr'
It detects == and != when any argument is a ptr.get() and the other is a
nullptr.
Only supports standard smart pointer types std::unique_ptr and std::shared_ptr.
Does not support the case 'ptr.get() == other.get()' yet.

Reviewers: djasper

CC: cfe-commits, alexfh

Differential Revision: http://llvm-reviews.chandlerc.com/D3294

llvm-svn: 205854
2014-04-09 14:17:23 +00:00
Daniel Jasper b55248278f clang-format: Update flag documentation, and generation script.
llvm-svn: 205853
2014-04-09 14:05:49 +00:00
Viktor Kutuzov 82185a2088 Declare _DYNAMIC and dl_phdr_info in asan_linux.cc on FreeBSD
llvm-svn: 205852
2014-04-09 13:37:19 +00:00
Daniel Jasper f9fc215f82 clang-format: Treat a trailing comment like a trailing comma in braced lists.
Before:
  static StructInitInfo module = {MODULE_BUILTIN, /* type */
                                  "streams" /* name */
  };

After:
  static StructInitInfo module = {
      MODULE_BUILTIN, /* type */
      "streams"       /* name */
  };

This fixes llvm.org/PR19378.

llvm-svn: 205851
2014-04-09 13:18:49 +00:00
Elena Demikhovsky cf0b9bafc3 AVX-512: insert element to mask vector; store i1 data
Implemented INSERT_VECTOR_ELT operation for v16i1 and v8i1 vectors;
Implemented "store" for i1 type

llvm-svn: 205850
2014-04-09 12:37:50 +00:00
Daniel Jasper 21397a3232 clang-format: Fix bug where clang-format would break the code.
Before, it would turn:
  SomeFunction([]() { // Cool function..
    return 43;
  });

Into this:
  SomeFunction([]() { // Cool function.. return 43; });

llvm-svn: 205849
2014-04-09 12:21:48 +00:00
Daniel Jasper 3ae6f5a47b clang-format: Improve format of calls with several lambdas.
Before:
  SomeFunction([]() {
                 int i = 42;
                 return i;
               },
               []() {
    int j = 43;
    return j;
  });

After:
  SomeFunction([]() {
                 int i = 42;
                 return i;
               },
               []() {
                 int j = 43;
                 return j;
               });

llvm-svn: 205848
2014-04-09 12:08:39 +00:00
Viktor Kutuzov 6bd3229616 Add support for building LLVM on FreeBSD 9.2
llvm-svn: 205847
2014-04-09 11:43:34 +00:00
Daniel Jasper f9a0906b98 clang-format: Allow breaking between trailing annotations in more cases.
Before:
  void aaaaaaaaaaaaaa(aaaaaaaa aaa) override AAAAAAAAAAAAAAAAAAAAAAAA(
      aaaaaaaaaaaaaaa);

After:
  void aaaaaaaaaaaaaa(aaaaaaaa aaa) override
      AAAAAAAAAAAAAAAAAAAAAAAA(aaaaaaaaaaaaaaa);

llvm-svn: 205846
2014-04-09 10:29:11 +00:00
Daniel Jasper b48d3afcd5 clang-format: Keep more trailing annotations on the same line.
More precisely keep all short annotations (<10 characters) on the same
line if possible. Previously, clang-format would only prefer to do so
for "const", "override" and "final". However, it seems to be generally
preferable, especially because some codebases have to wrap those in
macros for backwards compatibility.

Before:
  void someLongFunction(int someLongParameter)
      OVERRIDE {}

After:
  void someLongFunction(
      int someLongParameter) OVERRIDE {}

This fixes llvm.org/PR19363.

llvm-svn: 205845
2014-04-09 10:01:49 +00:00
Daniel Sanders b282f1fec5 Re-commit: [mips] abs.[ds], and neg.[ds] should be allowed regardless of -enable-no-nans-fp-math
Summary:
They behave in accordance with the Has2008 and ABS2008 configuration bits of the processor which are used to select between the 1985 and 2008 versions of IEEE 754. In 1985 mode, these instructions are arithmetic (i.e. they raise invalid operation exceptions when given NaN), in 2008 mode they are non-arithmetic (i.e. they are copies).

nmadd.[ds], and nmsub.[ds] are still subject to -enable-no-nans-fp-math because the ISA spec does not explicitly state that they obey Has2008 and ABS2008.

Fixed the issue with the previous version of this patch (r205628). A pre-existing 'let Predicate =' statement was removing some predicates that were necessary for FP64 to behave correctly.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3274

llvm-svn: 205844
2014-04-09 09:56:43 +00:00
Daniel Jasper b175d57edc clang-format: Recognize lists ending in trailing commas correctly.
Previously, this did not look through trailing comments leading to a few
formatting oddities.

llvm-svn: 205843
2014-04-09 09:53:23 +00:00
Daniel Jasper dfacecbd31 clang-format: Add proto files and JavaScript to git-clang-format.
llvm-svn: 205842
2014-04-09 09:22:35 +00:00
NAKAMURA Takumi f605f76519 Sema::SectionInfo() should have an empty body. Sorry for the breakage.
llvm-svn: 205841
2014-04-09 08:26:33 +00:00
NAKAMURA Takumi cdb365000d Sema::SectionInfo: Prune "default" for now. Defaulted function is unavailable on msc17.
llvm-svn: 205840
2014-04-09 07:59:55 +00:00
David Majnemer 815433587c YAMLIO: Encode ambiguous hex strings explicitly
YAMLIO would turn a BinaryRef into the string 0000000004000000.
However, the leading zero causes parsers to interpret it as being an
octal number instead of a hexadecimal one.

Instead, escape such strings as needed.

llvm-svn: 205839
2014-04-09 07:56:27 +00:00
Tobias Grosser c3d9db2336 Delinearize: Extend informationin -analyze output
llvm-svn: 205838
2014-04-09 07:53:49 +00:00
Matt Arsenault 2c33562cd6 R600/SI: Match not instruction.
llvm-svn: 205837
2014-04-09 07:16:16 +00:00
Tim Northover b36d428d27 ARM64: scalarize v1i64 mul operation
This is the second part of fixing PR19367.

llvm-svn: 205836
2014-04-09 07:07:02 +00:00
Tim Northover b430cf6681 ARM64: add pattern for <1 x i64> custom not node.
This should fix PR19367.

llvm-svn: 205835
2014-04-09 06:55:39 +00:00
Saleem Abdulrasool 5c503bf4c4 Object: add type names for ARM/COFF relocations
Add type name mappings for the ARM COFF relocations.  This allows for objdump to
provide a more useful description of relocations in disassembly inline form.

llvm-svn: 205834
2014-04-09 06:18:28 +00:00
Saleem Abdulrasool fedfc2a63f ARM MC: 80 column
llvm-svn: 205833
2014-04-09 06:18:26 +00:00
Saleem Abdulrasool 5019a978ae ARM MC: sort source files in CMakeLists
llvm-svn: 205832
2014-04-09 06:18:23 +00:00
Craig Topper c620761ca5 [C++11] More 'nullptr' conversion or in some cases just using a boolean check instead of comparing to nullptr.
llvm-svn: 205831
2014-04-09 06:08:46 +00:00
Craig Topper 011817a0bf [C++11] Make use of 'nullptr' in TableGen library.
llvm-svn: 205830
2014-04-09 04:50:04 +00:00
Craig Topper 8d399f87af [C++11] Replace some comparisons with 'nullptr' with simple boolean checks to reduce verbosity.
llvm-svn: 205829
2014-04-09 04:20:00 +00:00