llvm-project

Author	SHA1	Message	Date
Craig Topper	65dd32afbc	[InstCombine] Teach the code that pulls logical operators through constant shifts to handle vector splats too. llvm-svn: 310185	2017-08-05 20:00:42 +00:00
Sanjay Patel	3e1ae72fcf	[InstCombine] allow shl demanded bits folds with splat constants More fixes are needed to enable the helper SimplifyShrShlDemandedBits(). llvm-svn: 300898	2017-04-20 21:33:02 +00:00
Sanjay Patel	5f8451afad	[InstCombine] use m_APInt to allow ashr folds for vectors with splat constants llvm-svn: 292064	2017-01-15 16:38:19 +00:00
Sanjay Patel	58109abe91	[InstCombine] use m_APInt to allow icmp ult X, C folds for splat constant vectors llvm-svn: 281107	2016-09-09 21:59:37 +00:00
Sanjay Patel	9b40f98357	[InstCombine] use m_APInt to allow icmp (and (sh X, Y), C2), C1 folds for splat constant vectors llvm-svn: 280873	2016-09-07 22:33:03 +00:00
Sanjay Patel	d391b0d69e	[InstCombine] add tests for missing vector icmp folds llvm-svn: 278704	2016-08-15 18:26:56 +00:00
Sanjay Patel	66a3457a4c	[InstCombine] add test for missing vector icmp fold llvm-svn: 278630	2016-08-14 20:39:42 +00:00
Sanjay Patel	52958dc111	auto-generate checks llvm-svn: 278135	2016-08-09 16:59:54 +00:00
Kay Tiong Khoo	5389f74655	Conservative fix for PR17827 - don't optimize a shift + and + compare sequence where the shift is logical unless the comparison is unsigned llvm-svn: 196129	2013-12-02 18:43:59 +00:00