Evan Cheng
a4c986cbdd
Test for 89905.
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llvm-svn: 89906
2009-11-26 00:35:01 +00:00
Benjamin Kramer
a9268a4525
Turns out stuff gets allocated to different registers depending on the subtarget.
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llvm-svn: 89594
2009-11-22 15:15:52 +00:00
Edward O'Callaghan
7150767800
Fix for bad FileCheck converts in revision 89584.
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llvm-svn: 89586
2009-11-22 12:50:05 +00:00
Edward O'Callaghan
15dd46215e
Convert a few tests to FileCheck for PR5307.
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llvm-svn: 89584
2009-11-22 11:45:44 +00:00
Evan Cheng
73f9a9e2c8
Enable hoisting load from constant memories.
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llvm-svn: 89510
2009-11-20 23:31:34 +00:00
Sean Callanan
c1f532e930
Recommitting PALIGNR shift width fixes.
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Thanks to Daniel Dunbar for fixing clang intrinsics:
http://llvm.org/viewvc/llvm-project?view=rev&revision=89499
llvm-svn: 89500
2009-11-20 22:28:42 +00:00
Sean Callanan
19d92728d0
Reverting PALIGNR fix until I figure out how this
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broke the Clang testsuite.
llvm-svn: 89495
2009-11-20 22:09:28 +00:00
Sean Callanan
fbed130173
Fixed PALIGNR to take 8-bit rotations in all cases.
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Also fixed the corresponding testcase, and the PALIGNR
intrinsic (tested for correctness with llvm-gcc).
llvm-svn: 89491
2009-11-20 21:40:28 +00:00
Dan Gohman
20c8ab655e
Fix fast-isel to avoid selecting the return instruction if a
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tail call has been encountered.
llvm-svn: 89444
2009-11-20 02:51:26 +00:00
Bill Wendling
77f0ea6b93
Test from Dhrystone to make sure that we're not emitting an aligned load for a
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string that's aligned at 8-bytes instead of 16-bytes.
llvm-svn: 89295
2009-11-19 01:33:57 +00:00
Jakob Stoklund Olesen
575c3f3d72
Fix PR5300.
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When TwoAddressInstructionPass deletes a dead instruction, make sure that all
register kills are accounted for. The 2-addr register does not get special
treatment.
llvm-svn: 89246
2009-11-18 21:33:35 +00:00
Jakob Stoklund Olesen
4797e58d6b
Fix inverted test and add testcase from failing self-host.
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llvm-svn: 89167
2009-11-18 00:02:18 +00:00
Jakob Stoklund Olesen
50ee5e7ddb
Remove fragile test.
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llvm-svn: 89150
2009-11-17 21:52:40 +00:00
Jakob Stoklund Olesen
fffff88a3c
Enable -split-phi-edges by default, except when -regalloc=local.
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The local register allocator doesn't like it when LiveVariables is run.
We should also disable edge splitting under -O0, but that has to wait a bit.
llvm-svn: 89125
2009-11-17 19:15:50 +00:00
Evan Cheng
84efacfaad
Revert 89021. It's miscompiling llvm-gcc driver driver at -O0.
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llvm-svn: 89082
2009-11-17 09:55:52 +00:00
Jakob Stoklund Olesen
9f0d55d8d8
Enable -split-phi-edges by default
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llvm-svn: 89021
2009-11-17 01:07:22 +00:00
Evan Cheng
d33400e636
MOV64rm should be marked isReMaterializable.
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llvm-svn: 89019
2009-11-17 00:55:55 +00:00
Dan Gohman
b43e1ff236
Fix this test - there don't appear to be any actual Reload Reuses
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in this testcase.
llvm-svn: 88998
2009-11-16 23:49:55 +00:00
Dan Gohman
9dede3b383
Revert r87049, which was the workaround for the regression triggered
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by the recent FixedStackPseudoSourceValue-related changes, now that
the specific bug that affected it is fixed, in r88954.
llvm-svn: 88997
2009-11-16 23:43:42 +00:00
Evan Cheng
f25ef4ffb0
- Check memoperand alignment instead of checking stack alignment. Most load / store folding instructions are not referencing spill stack slots.
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- Mark MOVUPSrm re-materializable.
llvm-svn: 88974
2009-11-16 21:56:03 +00:00
David Greene
25905c8336
Support spill comments.
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Have the asm printer emit a comment if an instruction is a spill or
reload and have the spiller mark copies it introdues so the asm printer
can also annotate those.
llvm-svn: 88911
2009-11-16 15:12:23 +00:00
Evan Cheng
16797a1f55
Added getSubRegIndex(A,B) that returns subreg index of A to B. Use it to replace broken code in VirtRegRewriter.
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llvm-svn: 88753
2009-11-14 03:42:17 +00:00
Dan Gohman
a627e26d39
Enable the tail call optimization when the caller returns undef.
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llvm-svn: 88737
2009-11-14 02:06:30 +00:00
Dan Gohman
225fa59cac
When optimizing for size, don't tail-merge unless it's likely to be a
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code-size win, and not when it's only likely to be code-size neutral,
such as when only a single instruction would be eliminated and a new
branch would be required.
This fixes rdar://7392894.
llvm-svn: 88692
2009-11-13 21:02:15 +00:00
Dan Gohman
f80dc08059
Don't let a noalias difference disrupt the tailcall optimization.
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llvm-svn: 88672
2009-11-13 18:49:38 +00:00
Daniel Dunbar
3f75f5ddcb
Update test.
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llvm-svn: 87049
2009-11-13 01:01:58 +00:00
Dan Gohman
09478e975d
Tail merge at any size when there are two potentials blocks and one
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can be made to fall through into the other.
llvm-svn: 86909
2009-11-12 00:39:10 +00:00
Kenneth Uildriks
9f34406a90
x86 users can now return arbitrary sized structs. Structs too large to fit in return registers will be returned through a hidden sret parameter introduced during SelectionDAG construction.
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llvm-svn: 86876
2009-11-11 19:59:24 +00:00
Dan Gohman
64b5d0f468
Add support for tail duplication to BranchFolding, and extend
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tail merging support to handle more cases.
- Recognize several cases where tail merging is beneficial even when
the tail size is smaller than the generic threshold.
- Make use of MachineInstrDesc::isBarrier to help detect
non-fallthrough blocks.
- Check for and avoid disrupting fall-through edges in more cases.
llvm-svn: 86871
2009-11-11 19:48:59 +00:00
Evan Cheng
7e5e40c75e
Add nounwind.
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llvm-svn: 86814
2009-11-11 07:11:02 +00:00
Bill Wendling
5831283cb5
Fix test to work on every platform.
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llvm-svn: 86785
2009-11-11 01:41:32 +00:00
Bill Wendling
676f44062e
Make sure that the exception handling data has the same visibility as the
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function it's generated for.
llvm-svn: 86779
2009-11-11 01:24:59 +00:00
Mike Stump
f8a74fc4a5
Add testcase for recent checkin.
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llvm-svn: 86620
2009-11-09 23:10:49 +00:00
Nate Begeman
3a313df69b
x86 vector shuffle cleanup/fixes:
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1. rename the movhp patfrag to movlhps, since thats what it actually matches
2. eliminate the bogus movhps load and store patterns, they were incorrect. The load transforms are already handled (correctly) by shufps/unpack.
3. revert a recent test change to its correct form.
llvm-svn: 86415
2009-11-07 23:17:15 +00:00
Eric Christopher
bd05185ef1
Fix a couple of shuffle patterns to use movhlps instead
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of movhps as the constraint. Changes optimizations so
update testcases as appropriate as well.
llvm-svn: 86360
2009-11-07 08:45:53 +00:00
Chris Lattner
74ab6efbe8
merge cmp1 into cmp0 and filecheckize.
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llvm-svn: 86345
2009-11-07 06:19:20 +00:00
Eric Christopher
80f04dc67d
Fix PR5315, original patch by Nicolas Capens!
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llvm-svn: 86203
2009-11-06 00:11:57 +00:00
Evan Cheng
95bdc5d899
RangeIsDefinedByCopyFromReg() should check for subreg_to_reg, insert_subreg,
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and extract_subreg as a "copy" that defines a valno.
Also fixes a typo. These two issues prevent a simple subreg coalescing from
happening before.
llvm-svn: 86022
2009-11-04 08:33:14 +00:00
Evan Cheng
f42b5af549
Re-apply 85799. It turns out my code isn't buggy.
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llvm-svn: 85947
2009-11-03 21:40:02 +00:00
Kenneth Uildriks
90fedc6ef9
Make opt default to not adding a target data string and update tests that depend on target data to supply it within the test
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llvm-svn: 85900
2009-11-03 15:29:06 +00:00
Evan Cheng
a8a58efc03
Revert 85799 for now. It might be breaking llvm-gcc driver.
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llvm-svn: 85827
2009-11-02 21:49:14 +00:00
Evan Cheng
2729543984
Initilize the machine LICM CSE map upon the first time an instruction is hoisted to
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the loop preheader. Add instructions which are already in the preheader block that
may be common expressions of those that are hoisted out. These does get a few more
instructions CSE'ed.
llvm-svn: 85799
2009-11-02 08:09:49 +00:00
Chris Lattner
50ba5c3dc2
improve x86 codegen support for blockaddress. We now compile
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the testcase into:
_test1: ## @test1
## BB#0: ## %entry
leaq L_test1_bb6(%rip), %rax
jmpq *%rax
L_test1_bb: ## Address Taken
LBB1_1: ## %bb
movb $1, %al
ret
L_test1_bb6: ## Address Taken
LBB1_2: ## %bb6
movb $2, %al
ret
Note, it is very very strange that BlockAddressSDNode doesn't carry
around TargetFlags. Dan, please fix this.
llvm-svn: 85703
2009-11-01 03:25:03 +00:00
Dan Gohman
ea88910dbf
Add a target triple so that this test behaves consistently across hosts.
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llvm-svn: 85640
2009-10-31 00:15:28 +00:00
Dan Gohman
10eed3788d
Fix the -mattr line for this test so that it passes on hosts that lack SSSE3.
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llvm-svn: 85637
2009-10-30 23:18:27 +00:00
Dan Gohman
49fa51d936
Fix MachineLICM to use the correct virtual register class when
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unfolding loads for hoisting. getOpcodeAfterMemoryUnfold returns the
opcode of the original operation without the load, not the load
itself, MachineLICM needs to know the operand index in order to get
the correct register class. Extend getOpcodeAfterMemoryUnfold to
return this information.
llvm-svn: 85622
2009-10-30 22:18:41 +00:00
Evan Cheng
28f052fc89
I forgot to commit this test.
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llvm-svn: 85608
2009-10-30 20:03:40 +00:00
Bob Wilson
3ab552ec74
Reimplement BranchFolding change to avoid tail merging for a 1 instruction
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common tail, except when the OptimizeForSize function attribute is present.
Radar 7338114.
llvm-svn: 85441
2009-10-28 22:10:20 +00:00
Dan Gohman
1b44f10ff4
Teach MachineLICM to unfold loads from constant memory from
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otherwise unhoistable instructions in order to allow the loads
to be hoisted.
llvm-svn: 85364
2009-10-28 03:21:57 +00:00
Dan Gohman
4b46cbfc23
Mark dead physregdefs dead immediately. This helps MachineSink and
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MachineLICM and other things which run before LiveVariables is run.
llvm-svn: 85360
2009-10-28 01:13:53 +00:00