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Author SHA1 Message Date
Evan Cheng e20cbf3068 Enable cross register class coalescing. 
llvm-svn: 76281
 2009-07-18 02:10:10 +00:00
Dan Gohman 7d82e1338e Make GetElementPtr ConstantExprs default to having no pointer overflow. 
llvm-svn: 76280
 2009-07-18 01:49:22 +00:00
Evan Cheng 0c317a99c4 Revert 76177 for now. It's messing up ARM asm printing. Also this significant debate about its efficiency. 
llvm-svn: 76279
 2009-07-18 01:43:53 +00:00
Dan Gohman ff081b0126 Fix this accidentally inverted condition. 
llvm-svn: 76278
 2009-07-18 00:58:38 +00:00
Reid Kleckner fc8a2d5a83 Add EngineBuilder to ExecutionEngine in favor of the five optional argument EE::create(). 
Also a test commit.

llvm-svn: 76276
 2009-07-18 00:42:18 +00:00
Dan Gohman e1019db658 Convert more code to use Operator instead of explicitly handling both 
ConstantExpr and Instruction. This involves duplicating some code
between GetElementPtrInst and GEPOperator, but it's not a lot.

llvm-svn: 76265
 2009-07-17 23:55:56 +00:00
Ted Kremenek 915b1229d4 Update CMake file. 
llvm-svn: 76264
 2009-07-17 23:50:26 +00:00
Evan Cheng a776067d3f Fix pr4552. Stack slot coloring with register must take care not to generate illegal ams. 
llvm-svn: 76258
 2009-07-17 22:42:51 +00:00
Daniel Dunbar 8c6bad2f66 llvm-mc: Add -triple, and start fetching the target asm printer. 
llvm-svn: 76257
 2009-07-17 22:38:58 +00:00
Dan Gohman 1d548d851a Make BasicAliasAnalysis and Value::getUnderlyingObject use 
GEPOperator's hasNoPointer0verflow(), and make a few places in instcombine
that create GEPs that may overflow clear the NoOverflow value. Among
other things, this partially addresses PR2831.

llvm-svn: 76252
 2009-07-17 22:25:10 +00:00
Dan Gohman a565d4f937 Fix some typos in a comment. 
llvm-svn: 76249
 2009-07-17 22:16:21 +00:00
Evan Cheng 18fe458103 Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q', i.e. EAX, EDX, ECX, EBX. In 64-bit mode, it just means all the i64r registers. Yeah, that makes sense. 
llvm-svn: 76248
 2009-07-17 22:13:25 +00:00
Chris Lattner 1fcac9fa09 remove AsmPrinter::findGlobalValue, just use Value::stripPointerCasts instead. 
llvm-svn: 76246
 2009-07-17 22:00:23 +00:00
Dan Gohman d2a251f9f9 Add a GEPOperator class, and move the hasNoPointerOverflow 
accessors into it.

llvm-svn: 76245
 2009-07-17 21:33:58 +00:00
Evan Cheng 97b9a4b412 Simplify some more. 
llvm-svn: 76239
 2009-07-17 21:06:58 +00:00
Chris Lattner 1af5af8640 Use more terse and precise linkage checks. 
llvm-svn: 76237
 2009-07-17 21:00:50 +00:00
Dan Gohman 58b0e71886 Eliminate yet another copy of getOpcode. 
llvm-svn: 76236
 2009-07-17 20:58:59 +00:00
Chris Lattner e03a866b34 these two pieces of code are the same because we always 
emit the EHFrame label next to the section_eh_frame and
eh_frame_common labels.

llvm-svn: 76234
 2009-07-17 20:53:51 +00:00
Dan Gohman 510fdfd92e Fix a typo that Duncan spotted. 
llvm-svn: 76233
 2009-07-17 20:51:47 +00:00
Dan Gohman 80ca01c466 Add a new Operator class, for handling Instructions and ConstantExprs 
in a convenient manner, factoring out some common code from
InstructionCombining and ValueTracking. Move the contents of
BinaryOperators.h into Operator.h and use Operator to generalize them
to support ConstantExprs as well as Instructions.

llvm-svn: 76232
 2009-07-17 20:47:02 +00:00
Chris Lattner e79b2bc088 Untangle a snarl that I discovered when updating the mangler, 
starting in getCurrentFunctionEHName.  Among other problems,
we would try to privative a "foo.eh" label, but end up emitting
the label as _Lfoo.eh instead of L_foo.eh on darwin.  This is really
bad, and the linker has always tolerated these labels existing.
For now, just emit them as _foo.eh.

This patch also fixes problems with ".eh" labels on unnamed
functions and eliminates two strangely defined TargetAsmInfo
hooks.

llvm-svn: 76231
 2009-07-17 20:46:40 +00:00
Daniel Dunbar 71475775b9 Sketch support for target specific assembly parser. 
- Not fully enabled yet, need a configure regeneration.

llvm-svn: 76230
 2009-07-17 20:42:00 +00:00
Mikhail Glushenkov 28309ac04c Trailing whitespace. 
llvm-svn: 76229
 2009-07-17 20:38:17 +00:00
Chris Lattner 7a7cd9294d fix include guard. 
llvm-svn: 76228
 2009-07-17 20:32:07 +00:00
Evan Cheng f08b003bf0 Simplify the coalescer (finally!) by making LiveIntervals::processImplicitDefs a little more aggressive and teaching liveintervals to make use of isUndef marker on MachineOperands. 
llvm-svn: 76223
 2009-07-17 19:43:40 +00:00
Dan Gohman 97190a2c93 GetElementPtr instructions default to having no overflow. 
llvm-svn: 76222
 2009-07-17 19:23:21 +00:00
Daniel Dunbar bdffb1a333 Start generating AsmMatcher.inc for X86. 
llvm-svn: 76213
 2009-07-17 18:55:26 +00:00
Jeffrey Yasskin 15d54b9504 r76102 added the MachineCodeEmitter::processDebugLoc call and called it from 
the X86 Emitter.  This patch extends that to the rest of the targets that can
write to a MachineCodeEmitter: ARM, Alpha, and PPC.

llvm-svn: 76211
 2009-07-17 18:49:39 +00:00
Daniel Dunbar e974dc3eb1 Fix compile warning. 
llvm-svn: 76210
 2009-07-17 18:33:52 +00:00
Anton Korobeynikov acd2f4dcea Add missed return 
llvm-svn: 76209
 2009-07-17 18:28:59 +00:00
Anton Korobeynikov c8ce7b08ba Add support for naked functions 
llvm-svn: 76198
 2009-07-17 18:07:26 +00:00
Bruno Cardoso Lopes 0cded73755 revert one of the loops to use indicies over iterators because there are vector insertions inside the loop 
llvm-svn: 76195
 2009-07-17 18:02:30 +00:00
Dan Gohman 9691e71a4f Add a SubclassOptionalData field to Value. See the doxygen comment for 
details.

llvm-svn: 76189
 2009-07-17 17:16:59 +00:00
Daniel Dunbar 482bd9dcb8 Initialize another Context, in the hopes of unbreaking CBE. 
llvm-svn: 76184
 2009-07-17 16:20:23 +00:00
Daniel Dunbar 50745bf080 Provide slightly more refined error message when trying to lookup a target, and 
none are registered.

llvm-svn: 76181
 2009-07-17 15:50:49 +00:00
David Greene 33d1e7db01 Add logic to align instruction operands to columns for pretty-printing. 
No target uses this currently.  This patch only adds the mechanism so
that local installations can choose to enable this.

llvm-svn: 76177
 2009-07-17 14:24:46 +00:00
Duncan Sands 35e95639c0 Avoid a compiler warning when assertions are turned off. 
llvm-svn: 76176
 2009-07-17 12:25:14 +00:00
Eli Friedman fab6cbe6cd Oops, accidentally set a legal operation to expand. 
llvm-svn: 76165
 2009-07-17 07:34:23 +00:00
Eli Friedman 6a60a66b2b Expand misc operations from test/CodeGen/Generic. 
llvm-svn: 76163
 2009-07-17 07:28:06 +00:00
Eli Friedman efa2215e30 Handle void in XCoreTargetLowering::isLegalAddressingMode. Triggers in 
test/CodeGen/Generic.

llvm-svn: 76162
 2009-07-17 07:16:38 +00:00
Eli Friedman 836024d76d Remove some unnecessary expansion markings. Add a few expansion 
markings that show up in test/CodeGen/Generic.

llvm-svn: 76160
 2009-07-17 07:03:00 +00:00
Eli Friedman aeb44a31f6 Add operation expansion/promotion for a bunch of operations, many of 
which show up in test/CodeGen/Generic.

llvm-svn: 76158
 2009-07-17 06:36:24 +00:00
Evan Cheng aaf48343fb Fix tSUBspi operand definition. It reads and writes sp, which is a high register. 
llvm-svn: 76155
 2009-07-17 05:43:12 +00:00
Eli Friedman f840bc561a Set an operation expansion, noticed while running 
llc over test/CodeGen/Generic with -march=alpha.

llvm-svn: 76154
 2009-07-17 05:23:03 +00:00
Eli Friedman 97f3f965eb Make promotion in operation legalization for SETCC work correctly. 
llvm-svn: 76153
 2009-07-17 05:16:04 +00:00
Eli Friedman b8f6a4fc8e Replace isTrapping with a new, similar method called 
isSafeToSpeculativelyExecute. The new method is a bit closer to what 
the callers actually care about in that it rejects more things callers 
don't want.  It also adds more precise handling for integer 
division, and unifies code for analyzing the legality of a speculative 
load.

llvm-svn: 76150
 2009-07-17 04:28:42 +00:00
Eli Friedman 1fa07e1aea One more operation expansion for MIPS, from test/CodeGen/Generic. 
llvm-svn: 76149
 2009-07-17 04:07:24 +00:00
Daniel Dunbar d0ed53e711 Make sure CWriter's Context get's initialized. 
llvm-svn: 76147
 2009-07-17 03:43:21 +00:00
Eli Friedman 39d6faa31e Expand a bunch of illegal operations on MIPS (found by 
inspection and running over CodeGen/Generic).

llvm-svn: 76146
 2009-07-17 02:28:12 +00:00
Daniel Dunbar 7ecc62d8c1 Fix 'may be used uninitialized' warning. 
- Anton, please review.

llvm-svn: 76144
 2009-07-17 02:19:26 +00:00
Evan Cheng 76b561dd70 Fix my brain cramp by inverting the assertion condition. 
llvm-svn: 76131
 2009-07-17 00:32:06 +00:00
Jeffrey Yasskin 062853552e Fix "no newline at end of file" warning from gcc. 
llvm-svn: 76127
 2009-07-16 23:58:14 +00:00
Owen Anderson 4118ddeeed Privatize the MDNode uniquing table. 
llvm-svn: 76126
 2009-07-16 23:44:30 +00:00
Anton Korobeynikov c5df7e2dc1 Emit cross regclass register moves for thumb2. 
Minor code duplication cleanup.

llvm-svn: 76124
 2009-07-16 23:26:06 +00:00
Daniel Dunbar f60abdbb5a Disable this assert for now, it is firing on an llvm-gcc bootstrap. :( 
llvm-svn: 76123
 2009-07-16 23:02:46 +00:00
Evan Cheng 02a765280f GV with ghost linkage (module being lazily streamed in in JIT lazy compilation mode) do not require extra load from stub. This fixes ExecutionEngine/2005-12-02-TailCallBug.ll. 
llvm-svn: 76121
 2009-07-16 22:53:10 +00:00
Dale Johannesen c4148c4ec7 Assume an inline asm might be a call, so we get 
stack alignment right when it is.  This is not
ideal but conservatively correct.  Adjust a test
to compensate for changed stack offset value.
gcc.apple/asm-block-57.c

llvm-svn: 76120
 2009-07-16 22:34:45 +00:00
David Greene de9cd44ed8 Emit line numbers in asm comments when available. 
llvm-svn: 76117
 2009-07-16 22:24:20 +00:00
Owen Anderson 69ab416d66 Privatize the MDString uniquing table. 
llvm-svn: 76113
 2009-07-16 22:11:26 +00:00
Daniel Dunbar 87b85dd4dc Fix inverted preprocessor conditional. 
llvm-svn: 76111
 2009-07-16 22:08:25 +00:00
Daniel Dunbar bfc2d8e5de Fix compiler warning (for -Asserts). 
llvm-svn: 76110
 2009-07-16 22:06:22 +00:00
Jakob Stoklund Olesen c7895d3cf6 Silence warning in Linux builds: 
X86InstrInfo.cpp:2272: warning: suggest explicit braces to avoid ambiguous 'else'

llvm-svn: 76105
 2009-07-16 21:24:13 +00:00
Daniel Dunbar 95a551ad75 Add raw_null_ostream and llvm::nulls(), a raw_ostream that discards output. 
- No functionality change.

llvm-svn: 76103
 2009-07-16 21:17:53 +00:00
Jeffrey Yasskin efad8e45fe Add line numbers to OProfile. To do this, I added a processDebugLoc() 
call to the MachineCodeEmitter interface and made copying the start
line of a function not conditional on whether we're emitting Dwarf
debug information. I'll propagate the processDebugLoc() calls to the
non-X86 targets in a followup patch.

In the long run, it'll probably be better to gather this information
through the DwarfWriter, but the DwarfWriter currently depends on the
AsmPrinter and TargetAsmInfo, and fixing that would be out of the way
for this patch.

There's a bug in OProfile 0.9.4 that makes it ignore line numbers for
addresses above 4G, and a patch fixing it at
http://thread.gmane.org/gmane.linux.oprofile/7634

Sample output:

$ sudo opcontrol --reset; sudo opcontrol --start-daemon; sudo opcontrol --start; `pwd`/Debug/bin/lli fib.bc; sudo opcontrol --stop
Signalling daemon... done
Profiler running.
fib(40) == 165580141
Stopping profiling.

$ opreport -g -d -l `pwd`/Debug/bin/lli|head -60
Overflow stats not available
CPU: Core 2, speed 1998 MHz (estimated)
Counted CPU_CLK_UNHALTED events (Clock cycles when not halted) with a unit mask of 0x00 (Unhalted core cycles) count 100000
vma      samples  %        linenr info                 image name               symbol name
00007f67a30370b0 25489    61.2554  fib.c:24                    10946.jo                 fib_left
  00007f67a30370b0 1634      6.4106  fib.c:24
  00007f67a30370b1 83        0.3256  fib.c:24
  00007f67a30370b9 1997      7.8348  fib.c:24
  00007f67a30370c6 2080      8.1604  fib.c:27
  00007f67a30370c8 988       3.8762  fib.c:27
  00007f67a30370cd 1315      5.1591  fib.c:27
  00007f67a30370cf 251       0.9847  fib.c:27
  00007f67a30370d3 1191      4.6726  fib.c:27
  00007f67a30370d6 975       3.8252  fib.c:27
  00007f67a30370db 1010      3.9625  fib.c:27
  00007f67a30370dd 242       0.9494  fib.c:27
  00007f67a30370e1 2782     10.9145  fib.c:28
  00007f67a30370e5 3768     14.7828  fib.c:28
  00007f67a30370eb 615       2.4128  (no location information)
  00007f67a30370f3 6558     25.7287  (no location information)
00007f67a3037100 15603    37.4973  fib.c:29                    10946.jo                 fib_right
  00007f67a3037100 1646     10.5493  fib.c:29
  00007f67a3037101 45        0.2884  fib.c:29
  00007f67a3037109 2372     15.2022  fib.c:29
  00007f67a3037116 2234     14.3178  fib.c:32
  00007f67a3037118 612       3.9223  fib.c:32
  00007f67a303711d 622       3.9864  fib.c:32
  00007f67a303711f 385       2.4675  fib.c:32
  00007f67a3037123 404       2.5892  fib.c:32
  00007f67a3037126 634       4.0633  fib.c:32
  00007f67a303712b 870       5.5759  fib.c:32
  00007f67a303712d 62        0.3974  fib.c:32
  00007f67a3037131 1848     11.8439  fib.c:33
  00007f67a3037135 2840     18.2016  fib.c:33
  00007f67a303713a 1         0.0064  fib.c:33
  00007f67a303713b 1023      6.5564  (no location information)
  00007f67a3037143 5         0.0320  (no location information)
000000000080c1e4 15        0.0360  MachineOperand.h:150        lli                      llvm::MachineOperand::isReg() const
  000000000080c1e4 6        40.0000  MachineOperand.h:150
  000000000080c1ec 2        13.3333  MachineOperand.h:150
...

llvm-svn: 76102
 2009-07-16 21:07:26 +00:00
Jakob Stoklund Olesen 070fab8a1f Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands. 
The inline asm operands must be parsed from the first flag, you cannot assume
that an immediate operand preceeding a register use operand is the flag.
PowerPC "m" operands are represented as (flag, imm, reg) triples.
isRegTiedToDefOperand() would incorrectly interpret the imm as the flag.

llvm-svn: 76101
 2009-07-16 20:58:34 +00:00
Evan Cheng 357645efad Changed my mind. We now allow remat of instructions whose defs have subreg indices. 
llvm-svn: 76100
 2009-07-16 20:15:00 +00:00
Owen Anderson c277dc408b Privatize the ConstantFP table. I'm on a roll! 
llvm-svn: 76097
 2009-07-16 19:05:41 +00:00
Evan Cheng fdd0eb4011 With recent MC changes, RIP base register is explicitly modeled. Make sure we add it when x86 V_SET0 / V_SETALLONES (by transforming it into a constpool load) into the use instruction. 
llvm-svn: 76094
 2009-07-16 18:44:05 +00:00
Ted Kremenek 4ded3d3db2 Update CMake file. 
llvm-svn: 76093
 2009-07-16 18:29:22 +00:00
Owen Anderson 20b34ac794 Move the ConstantInt uniquing table into LLVMContextImpl. This exposed a number of issues in 
our current context-passing stuff, which is also fixed here

llvm-svn: 76089
 2009-07-16 18:04:31 +00:00
Kevin Enderby dd27e5e10a Removed the SubsectionsViaSymbols MCStreamer API and replaced it with a generic 
EmitAssemblerFlag API which takes a value from the added AssemblerFlag
enumerated constants.

llvm-svn: 76087
 2009-07-16 17:56:39 +00:00
Dan Gohman 8c129d7687 Fill in some holes in ScalarEvolution's loop iteration condition 
analysis. This allows indvars to emit a simpler loop trip count
expression.

llvm-svn: 76085
 2009-07-16 17:34:36 +00:00
Dan Gohman 1511f701e7 Add an isLoopSimplifyForm() predicate, following the example of 
isLCSSAForm(), to test whether a loop is in the form guaranteed
by the LoopSimplify pass.

llvm-svn: 76077
 2009-07-16 16:16:23 +00:00
Dan Gohman f199ad6ebc Use size_t. 
llvm-svn: 76069
 2009-07-16 15:24:40 +00:00
Anton Korobeynikov 02fc607d54 Unbreak 
llvm-svn: 76064
 2009-07-16 14:36:52 +00:00
Anton Korobeynikov 73fcd3d962 Temporary disable 16 bit bswap 
llvm-svn: 76063
 2009-07-16 14:35:57 +00:00
Anton Korobeynikov 460e59034b Add instruction formats and few opcodes 
llvm-svn: 76062
 2009-07-16 14:35:20 +00:00
Anton Korobeynikov 902facfe96 Add bswap patterns 
llvm-svn: 76061
 2009-07-16 14:34:52 +00:00
Anton Korobeynikov ff21565821 Provide crazy pseudos for regpairs spills / reloads 
llvm-svn: 76060
 2009-07-16 14:34:15 +00:00
Anton Korobeynikov 7fa0ce1a21 Handle long-disp stuff more consistently 
llvm-svn: 76059
 2009-07-16 14:33:52 +00:00
Anton Korobeynikov 30e1cb2ab9 All FP instructions have 12 bit memory displacement field 
llvm-svn: 76058
 2009-07-16 14:33:27 +00:00
Anton Korobeynikov 5b03970c7b Another predicate routine 
llvm-svn: 76057
 2009-07-16 14:33:01 +00:00
Anton Korobeynikov 5761e33ce4 More helpers 
llvm-svn: 76056
 2009-07-16 14:32:41 +00:00
Anton Korobeynikov b22afc7bcc Add bunch of branch folding stuff 
llvm-svn: 76055
 2009-07-16 14:32:19 +00:00
Anton Korobeynikov 0f8c47a7bb Add missed opcodes to short => long displacement conversion 
llvm-svn: 76054
 2009-07-16 14:31:52 +00:00
Anton Korobeynikov 201d49d56a Cleanup 
llvm-svn: 76053
 2009-07-16 14:31:32 +00:00
Anton Korobeynikov 3ae30e08ef Fix logic inversion for RI-mode address selection 
llvm-svn: 76052
 2009-07-16 14:31:14 +00:00
Anton Korobeynikov 4121039bef Expand 32-bit bitconverts via memory 
llvm-svn: 76050
 2009-07-16 14:30:29 +00:00
Anton Korobeynikov bc2ead6ea3 Fix incomin arg stack frame offset in case we need to generate stack frame 
llvm-svn: 76049
 2009-07-16 14:29:57 +00:00
Anton Korobeynikov 3729850b50 Fix instruction mnemonics for some fp_to_sint operations 
llvm-svn: 76048
 2009-07-16 14:29:26 +00:00
Anton Korobeynikov a293caf2ed i32 values are passed extended also on stack. Handle this in generic way 
llvm-svn: 76047
 2009-07-16 14:29:05 +00:00
Anton Korobeynikov 1fa01d307c We definitely have 1-0 bools 
llvm-svn: 76046
 2009-07-16 14:28:46 +00:00
Anton Korobeynikov bd41c83ab0 Revert the commit, it just hides the real bug 
llvm-svn: 76045
 2009-07-16 14:28:26 +00:00
Anton Korobeynikov 6fb6e09781 Out GR128 regclass is not a 'real' i128 one. 
llvm-svn: 76044
 2009-07-16 14:27:53 +00:00
Anton Korobeynikov fef4a3b762 Add missed condbranch opcodes 
llvm-svn: 76043
 2009-07-16 14:27:26 +00:00
Anton Korobeynikov 6c01db428f Handle bitconverts 
llvm-svn: 76042
 2009-07-16 14:27:01 +00:00
Anton Korobeynikov 70d0bceed6 Unbreak mvi and friends - emit only 'significant' part of the operand 
llvm-svn: 76041
 2009-07-16 14:26:38 +00:00
Anton Korobeynikov 573fab1879 Expand fp_to_uint too 
llvm-svn: 76040
 2009-07-16 14:26:06 +00:00
Anton Korobeynikov d57f8cee1d We don't have FP truncstores 
llvm-svn: 76039
 2009-07-16 14:25:46 +00:00
Anton Korobeynikov 3f254d536a Expand uint_to_fp 
llvm-svn: 76038
 2009-07-16 14:25:30 +00:00
Anton Korobeynikov 1ae8098144 Emit proper rounding mode for fp_to_sint 
llvm-svn: 76037
 2009-07-16 14:25:12 +00:00
Anton Korobeynikov 35a5d6f7ca f32/f64 regs are stored on stack if we're short in FP regs 
llvm-svn: 76036
 2009-07-16 14:24:57 +00:00
Anton Korobeynikov 2acdac0f8e Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects 
llvm-svn: 76035
 2009-07-16 14:24:41 +00:00
Anton Korobeynikov 8c18d8972c Make FP zero to be legal FP immediate via LOAD ZERO 
llvm-svn: 76034
 2009-07-16 14:24:16 +00:00
Anton Korobeynikov 3894c8b6c2 Loads are not two-address in any way 
llvm-svn: 76033
 2009-07-16 14:24:01 +00:00
Anton Korobeynikov c8f76f47dd Add LOAD NEGATIVE instruction 
llvm-svn: 76032
 2009-07-16 14:23:44 +00:00
Anton Korobeynikov ae2d8abf2c LOAD COMPLEMENT instruction is not really two-addr 
llvm-svn: 76031
 2009-07-16 14:23:30 +00:00
Anton Korobeynikov 82af42d361 Add multiple add/sub instructions 
llvm-svn: 76030
 2009-07-16 14:23:16 +00:00
Anton Korobeynikov b106b60456 Handle FP callee-saved regs 
llvm-svn: 76029
 2009-07-16 14:23:01 +00:00
Anton Korobeynikov 871784ba88 Proper FP extloads 
llvm-svn: 76028
 2009-07-16 14:22:46 +00:00
Anton Korobeynikov 12400008a7 Add proper PWS impdef's 
llvm-svn: 76027
 2009-07-16 14:22:30 +00:00
Anton Korobeynikov 3c44a39156 Propagate FP select_cc to dag inserters 
llvm-svn: 76026
 2009-07-16 14:22:15 +00:00
Anton Korobeynikov 430ab4f382 Implement fp_to_sint 
llvm-svn: 76025
 2009-07-16 14:21:57 +00:00
Anton Korobeynikov 345e08d24c Implement FP regs spills / restores 
llvm-svn: 76024
 2009-07-16 14:21:41 +00:00
Anton Korobeynikov 0fcdd8d424 Add fabs 
llvm-svn: 76023
 2009-07-16 14:21:27 +00:00
Anton Korobeynikov 50485d65d4 Add fneg 
llvm-svn: 76022
 2009-07-16 14:21:12 +00:00
Anton Korobeynikov d7416e7c0b We don't have native sine / cosine instructions 
llvm-svn: 76021
 2009-07-16 14:20:56 +00:00
Anton Korobeynikov 77928399b0 More sint_to_fp stuff 
llvm-svn: 76020
 2009-07-16 14:20:39 +00:00
Anton Korobeynikov 8195797de2 Add bunch of FP instructions 
llvm-svn: 76019
 2009-07-16 14:20:24 +00:00
Anton Korobeynikov 45a56de726 We don't have any FP extloads 
llvm-svn: 76018
 2009-07-16 14:20:08 +00:00
Anton Korobeynikov ead9b9fb31 Implement all comparisons 
llvm-svn: 76017
 2009-07-16 14:19:54 +00:00
Anton Korobeynikov 7cb00653c1 Add constpool lowering / printing 
llvm-svn: 76016
 2009-07-16 14:19:35 +00:00
Anton Korobeynikov c806cea4cb Allow FP arguments pass / return 
llvm-svn: 76015
 2009-07-16 14:19:16 +00:00
Anton Korobeynikov 923b47e89d Register FP regclasses 
llvm-svn: 76014
 2009-07-16 14:19:02 +00:00
Anton Korobeynikov 5509b58cd7 Add FP regs 
llvm-svn: 76013
 2009-07-16 14:18:48 +00:00
Anton Korobeynikov 570d0c36ee Fix fallout from prev. patch 
llvm-svn: 76012
 2009-07-16 14:18:31 +00:00
Anton Korobeynikov b25949b0f5 Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems 
llvm-svn: 76011
 2009-07-16 14:18:17 +00:00
Anton Korobeynikov e5b04d7102 Use divide single for 32 bit signed divides 
llvm-svn: 76010
 2009-07-16 14:17:52 +00:00
Anton Korobeynikov 2799032a45 Add missed operands types 
llvm-svn: 76009
 2009-07-16 14:17:07 +00:00
Anton Korobeynikov 5fd5c3efb6 Missed part of prev. patch 
llvm-svn: 76008
 2009-07-16 14:16:45 +00:00
Anton Korobeynikov b950f1961b Another attempt to fix prologue emission 
llvm-svn: 76007
 2009-07-16 14:16:26 +00:00
Anton Korobeynikov 091872cb37 Implement 'large' PIC model 
llvm-svn: 76006
 2009-07-16 14:16:05 +00:00
Anton Korobeynikov 569a94c4d0 Implement shifts properly (hopefilly - finally!) 
llvm-svn: 76005
 2009-07-16 14:15:24 +00:00
Anton Korobeynikov e0ad108f04 Remove redundand register move 
llvm-svn: 76004
 2009-07-16 14:14:54 +00:00
Anton Korobeynikov fe8df8ff61 Properly handle divides. As a bonus - implement memory versions of them. 
llvm-svn: 76003
 2009-07-16 14:14:33 +00:00
Anton Korobeynikov 68b101a0e1 Fix epic fail: full-width muls are not commutable. This unbreaks bunch of stuff from SingleSource/Benchmarks/Stanford 
llvm-svn: 76002
 2009-07-16 14:14:01 +00:00
Anton Korobeynikov 1de4295372 32 bit rotate is not twoaddr instruction 
llvm-svn: 76001
 2009-07-16 14:13:43 +00:00
Anton Korobeynikov 34ad780d0d 32 bit shifts have only 12 bit displacements 
llvm-svn: 76000
 2009-07-16 14:13:24 +00:00
Anton Korobeynikov 6759661c3f Add proper register aliases 
llvm-svn: 75999
 2009-07-16 14:12:54 +00:00
Anton Korobeynikov a3157b1c9c Properly generate stack frame 
llvm-svn: 75998
 2009-07-16 14:12:36 +00:00
Anton Korobeynikov 6f3d11cf0b Unbreak indirect branches 
llvm-svn: 75997
 2009-07-16 14:12:18 +00:00
Anton Korobeynikov 2300eaa828 Unbreak 
llvm-svn: 75996
 2009-07-16 14:12:00 +00:00
Anton Korobeynikov 20237e5071 Do not forget to save R15 when we allocate stack frame 
llvm-svn: 75995
 2009-07-16 14:11:40 +00:00
Anton Korobeynikov 427dce8678 All calls clobbers R14 
llvm-svn: 75994
 2009-07-16 14:11:22 +00:00
Anton Korobeynikov 2e574c156e Unbreak calls to vararg functions 
llvm-svn: 75993
 2009-07-16 14:11:03 +00:00
Anton Korobeynikov 466f2e4b00 Stupid typo 
llvm-svn: 75992
 2009-07-16 14:10:49 +00:00
Anton Korobeynikov d8458e6c09 Typos 
llvm-svn: 75991
 2009-07-16 14:10:35 +00:00
Anton Korobeynikov 1eb6262b4b Consolidate reg-imm / reg-reg-imm address mode selection logic in one place. 
llvm-svn: 75990
 2009-07-16 14:10:17 +00:00
Anton Korobeynikov 3db6283188 Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements are needed during elimination of frame indexes. 
llvm-svn: 75989
 2009-07-16 14:09:56 +00:00
Anton Korobeynikov 62f8515b1c Add support for 12 bit displacements 
llvm-svn: 75988
 2009-07-16 14:09:35 +00:00
Anton Korobeynikov 432d4cd915 We already have reserved call frame regardless whether variable sized frame objects were present or not 
llvm-svn: 75987
 2009-07-16 14:09:04 +00:00
Anton Korobeynikov 43d33bd6d2 Emit proper lowering of load from arg stack slot 
llvm-svn: 75986
 2009-07-16 14:08:42 +00:00
Anton Korobeynikov a8197bb651 Implement dynamic allocas 
llvm-svn: 75985
 2009-07-16 14:08:15 +00:00
Anton Korobeynikov 7193e2670e Add jump tables 
llvm-svn: 75984
 2009-07-16 14:07:50 +00:00
Anton Korobeynikov 5dfac244a0 Exapnd br_jt into indirect branch. Provide pattern for indirect branches. 
llvm-svn: 75983
 2009-07-16 14:07:24 +00:00
Anton Korobeynikov d52a95f170 Implement 64 bit immediates 
llvm-svn: 75982
 2009-07-16 14:07:06 +00:00
Anton Korobeynikov 2ff298fad0 Add rotates 
llvm-svn: 75981
 2009-07-16 14:06:49 +00:00
Anton Korobeynikov 9362d9aa76 Add patterns for integer negate 
llvm-svn: 75980
 2009-07-16 14:06:27 +00:00
Anton Korobeynikov f07c7941f0 Provide proper patterns for and with imm instructions. Tune the tests accordingly. 
llvm-svn: 75979
 2009-07-16 14:06:00 +00:00
Anton Korobeynikov 59049d9176 Add 32 bit and reg-imm and disable invalid patterns for now 
llvm-svn: 75978
 2009-07-16 14:05:32 +00:00
Anton Korobeynikov 2d218394c6 Add z9 and z10 target processors. Mark z10-only instructions as such. 
llvm-svn: 75977
 2009-07-16 14:05:00 +00:00
Anton Korobeynikov 68b8486fde Fix MUL64rm instruction asmprinting 
llvm-svn: 75976
 2009-07-16 14:04:38 +00:00
Anton Korobeynikov edba6f3af7 Preliminary asmprinting of globals 
llvm-svn: 75975
 2009-07-16 14:04:22 +00:00
Anton Korobeynikov a2afc692f6 Implement asmprinting for odd-even regpairs 
llvm-svn: 75974
 2009-07-16 14:04:01 +00:00
Anton Korobeynikov ec66c122e0 32-bit ri addressing mode has only 12-bit displacement 
llvm-svn: 75973
 2009-07-16 14:03:41 +00:00
Anton Korobeynikov 7b2353595d Forgot to add 
llvm-svn: 75972
 2009-07-16 14:03:24 +00:00
Anton Korobeynikov 12b4b7c5f6 Do not put bunch of target-specific stuff into common namespace 
llvm-svn: 75971
 2009-07-16 14:03:08 +00:00
Anton Korobeynikov 59ef95bfc1 Print signed imms properly 
llvm-svn: 75970
 2009-07-16 14:02:45 +00:00
Anton Korobeynikov 5af8f0ebf1 Provide hooks for spilling / restoring stuff 
llvm-svn: 75969
 2009-07-16 14:01:27 +00:00
Anton Korobeynikov b284c9d876 Revert thinko 
llvm-svn: 75968
 2009-07-16 14:01:10 +00:00
Anton Korobeynikov abbae3bc5e Temporary workaround problem with signed 32-bit imm's 
llvm-svn: 75967
 2009-07-16 14:00:42 +00:00
Anton Korobeynikov ace2a02a84 Implement InsertBranch() hook 
llvm-svn: 75966
 2009-07-16 14:00:10 +00:00
Anton Korobeynikov 73bf01f236 Pipehole pattern for i32 imm's 
llvm-svn: 75965
 2009-07-16 13:59:49 +00:00
Anton Korobeynikov ff1edc23ac Bunch of sext_inreg patterns 
llvm-svn: 75964
 2009-07-16 13:59:18 +00:00
Anton Korobeynikov c3170f5236 Provide normal 32 bit load and store 
llvm-svn: 75963
 2009-07-16 13:58:43 +00:00
Anton Korobeynikov d568f6dce2 Proper lower 'small' results 
llvm-svn: 75962
 2009-07-16 13:58:24 +00:00
Anton Korobeynikov f1bf3176c6 Completel forgot about unconditional branches 
llvm-svn: 75961
 2009-07-16 13:57:52 +00:00
Anton Korobeynikov 15d6e8785b Lower addresses of globals 
llvm-svn: 75960
 2009-07-16 13:57:27 +00:00
Anton Korobeynikov f0d7d6ce65 Provide "wide" muls and divs/rems 
llvm-svn: 75958
 2009-07-16 13:56:42 +00:00
Anton Korobeynikov d919010b6a Fix thinko 
llvm-svn: 75957
 2009-07-16 13:56:11 +00:00
Anton Korobeynikov 4ee0acd326 Fix epic bug with invalid regclass for R0D 
llvm-svn: 75956
 2009-07-16 13:55:51 +00:00
Anton Korobeynikov 12996eabbd Let RegisterInfo decide whether it can emit cross-class copy or not 
llvm-svn: 75955
 2009-07-16 13:55:26 +00:00
Anton Korobeynikov 590f99b18b More register pairs (now 32 bit ones) 
llvm-svn: 75954
 2009-07-16 13:55:04 +00:00
Anton Korobeynikov ccde90b83c Add even-odd register pairs 
llvm-svn: 75953
 2009-07-16 13:54:45 +00:00
Anton Korobeynikov 31e9a53d17 Unbreak due to mainline api change 
llvm-svn: 75952
 2009-07-16 13:54:20 +00:00
Anton Korobeynikov 071178ea15 Preliminary mul lowering 
llvm-svn: 75951
 2009-07-16 13:53:55 +00:00
Anton Korobeynikov 23e3c6657c More extloads 
llvm-svn: 75950
 2009-07-16 13:53:35 +00:00
Anton Korobeynikov 0f59e1e874 SELECT_CC lowering 
llvm-svn: 75948
 2009-07-16 13:52:51 +00:00
Anton Korobeynikov ac4fb7f977 Conditional branches and comparisons 
llvm-svn: 75947
 2009-07-16 13:52:31 +00:00
Anton Korobeynikov 11665a64b0 Emit correct offset for PseudoSourceValue 
llvm-svn: 75946
 2009-07-16 13:52:10 +00:00
Anton Korobeynikov 29329a0695 Provide proper stack offsets for outgoing arguments 
llvm-svn: 75945
 2009-07-16 13:51:53 +00:00
Anton Korobeynikov 44483f9eb3 Change register allocation order to reduce amount of callee-saved regs to be spilled. 
llvm-svn: 75944
 2009-07-16 13:51:34 +00:00
Anton Korobeynikov 8695a30066 Emit callee-saved regs spills / restores 
llvm-svn: 75943
 2009-07-16 13:51:12 +00:00
Anton Korobeynikov b638a8fd73 Scan for presence of calls and determine max callframe size early. To allow ProcessFunctionBeforeCalleeSaveScan() use this information 
llvm-svn: 75942
 2009-07-16 13:50:40 +00:00
Anton Korobeynikov d694b9ff8b Some preliminary call lowering 
llvm-svn: 75941
 2009-07-16 13:50:21 +00:00
Anton Korobeynikov 018599fc0b Prologue / epilogue emission 
llvm-svn: 75940
 2009-07-16 13:49:49 +00:00
Anton Korobeynikov 09890bd434 Add simple frame index elimination 
llvm-svn: 75939
 2009-07-16 13:49:25 +00:00
Anton Korobeynikov 8a095bf56d Swap the order of imm and idx field for rri addrmode in order to make handling of rri and ri addrmodes common 
llvm-svn: 75937
 2009-07-16 13:48:42 +00:00
Anton Korobeynikov 19911b338a Do not truncate sign bits for negative imms 
llvm-svn: 75936
 2009-07-16 13:48:23 +00:00
Anton Korobeynikov 405833dfb6 Add address computation stuff 
llvm-svn: 75935
 2009-07-16 13:47:59 +00:00