Dale Johannesen
d246b2ca5c
Change LegalFPImmediates to use APFloat.
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Add APFloat interfaces to ConstantFP, SelectionDAG.
Fix integer bit in double->APFloat conversion.
Convert LegalizeDAG to use APFloat interface in
ConstantFPSDNode uses.
llvm-svn: 41587
2007-08-30 00:23:21 +00:00
Duncan Sands
7741427a09
Move getX86RegNum into X86RegisterInfo and use it
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in the trampoline lowering. Lookup the jump and
mov opcodes for the trampoline rather than hard
coding them.
llvm-svn: 41577
2007-08-29 19:01:20 +00:00
Rafael Espindola
b602461f48
Add a comment about using libc memset/memcpy or generating inline code.
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llvm-svn: 41502
2007-08-27 17:48:26 +00:00
Rafael Espindola
ff33241e16
call libc memcpy/memset if array size is bigger then threshold.
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Coping 100MB array (after a warmup) shows that glibc 2.6.1 implementation on
x86-64 (core 2) is 30% faster (from 0.270917s to 0.188079s)
llvm-svn: 41479
2007-08-27 10:18:20 +00:00
Chris Lattner
d8c9cb9182
rename isOperandValidForConstraint to LowerAsmOperandForConstraint,
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changing the interface to allow for future changes.
llvm-svn: 41384
2007-08-25 00:47:38 +00:00
Chris Lattner
51883acec1
add a note
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llvm-svn: 41359
2007-08-24 15:17:59 +00:00
Chris Lattner
33800d1428
add some notes on really poor codegen.
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llvm-svn: 41319
2007-08-23 15:22:07 +00:00
Bill Wendling
862afea91e
Add the PCSymbol for Darwin x86 platforms.
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llvm-svn: 41284
2007-08-22 18:44:05 +00:00
Anton Korobeynikov
f335679b52
Use only 1 knob to enable exceptions on Darwin :).
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llvm-svn: 41208
2007-08-21 00:31:30 +00:00
Rafael Espindola
9c3d20d823
Partial implementation of calling functions with byval arguments:
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*) The needed information is propagated to the DAG
*) The X86-64 backend detects it and aborts
llvm-svn: 41179
2007-08-20 15:18:24 +00:00
Chris Lattner
78846b69ae
add a note
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llvm-svn: 41178
2007-08-20 02:14:33 +00:00
Anton Korobeynikov
597c8b77e4
Move ReturnAddrIndex variable to X86MachineFunctionInfo structure. This fixed
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hard to catch bugs with retaddr lowering
llvm-svn: 41104
2007-08-15 17:12:32 +00:00
Chris Lattner
db8adb9941
add a note.
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llvm-svn: 41103
2007-08-15 16:58:38 +00:00
Evan Cheng
b2823dac69
Fix a typo pointd out by Maarten ter Huurne.
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llvm-svn: 41059
2007-08-13 23:27:11 +00:00
Dan Gohman
ccb3611881
When x86 addresses matching exceeds its recursion limit, check to
...
see if the base register is already occupied before assuming it can be
used. This fixes bogus code generation in the accompanying testcase.
llvm-svn: 41049
2007-08-13 20:03:06 +00:00
Chris Lattner
4e7f673f65
Fix PR1607
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llvm-svn: 41048
2007-08-13 18:42:37 +00:00
Chris Lattner
750b3dfcf5
expand a note
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llvm-svn: 41021
2007-08-11 18:19:07 +00:00
Chris Lattner
ee44ab5b5f
With evan's explicit flag representation, hopefully we will finally be
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able to 3-addressify away stuff like this:
movl %ecx, %eax
decl %eax
llvm-svn: 41020
2007-08-11 18:16:46 +00:00
Bill Wendling
cdbd82ee37
64-bit SSSE3 ops that use MMX registers don't require 16-byte alignment.
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Make a 'memop' pattern just for them.
llvm-svn: 41017
2007-08-11 09:52:53 +00:00
Christopher Lamb
44e79f8aba
Use subregs to improve any_extend code generation when feasible.
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llvm-svn: 41013
2007-08-10 22:22:41 +00:00
Christopher Lamb
b372abab14
Increase efficiency of sign_extend_inreg by using subregisters for truncation. As the README suggests sign_extend_subreg is selected to (sext(trunc)).
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llvm-svn: 41010
2007-08-10 21:48:46 +00:00
Christopher Lamb
f0c236fb8a
Edit README in light of previous LEA16 commit.
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llvm-svn: 41009
2007-08-10 21:29:05 +00:00
Christopher Lamb
d36d30b53c
Add 2-addr to 3-addr promotion code that allows 32-bit LEA to be used via subregisters when 16-bit LEA is disabled.
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llvm-svn: 41007
2007-08-10 21:18:25 +00:00
Rafael Espindola
66011c17d5
propagate struct size and alignment of byval arguments to the DAG
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llvm-svn: 40986
2007-08-10 14:44:42 +00:00
Bill Wendling
7014615087
For kicks, I though it would be fun to use the correct opcode.
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llvm-svn: 40985
2007-08-10 09:00:17 +00:00
Bill Wendling
2377206923
Adding SSSE3 intrinsics.
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llvm-svn: 40982
2007-08-10 06:22:27 +00:00
Evan Cheng
f855b626e8
Temporarily backing out this change until we know why some dejagnu tests are failing.
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llvm-svn: 40973
2007-08-09 22:25:35 +00:00
Evan Cheng
e32e923a6a
divb / mulb outputs to ah. Under x86-64 it's not legal to read ah if the instruction requires a rex prefix (i.e. outputs to r8b, etc.). So issue shift right by 8 on AX and then truncate it to 8 bits instead.
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llvm-svn: 40972
2007-08-09 21:59:35 +00:00
Evan Cheng
a05ec4dc52
GR16_ sub-register class should be GR8_, not GR8. That is, it should only be 8-bit registers in 32-bit mode. Ditto for GR32_.
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llvm-svn: 40970
2007-08-09 18:05:17 +00:00
Dale Johannesen
ba1a98a4e0
long double 9 of N. This finishes up the X86-32 bits
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(constants are still not handled). Adds ConvertActions
to control fp-to-fp conversions (these are currently
defaulted for all other targets, so no changes there).
llvm-svn: 40958
2007-08-09 01:04:01 +00:00
Dale Johannesen
a47f7d7cfd
Long double patch 8 of N: make it partially work in
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SSE mode (all but conversions <-> other FP types, I think):
>>Do not mark all-80-bit operations as "Requires[FPStack]"
(which really means "not SSE").
>>Refactor load-and-extend to facilitate this.
>>Update comments.
>>Handle long double in SSE when computing FP_REG_KILL.
llvm-svn: 40906
2007-08-07 20:29:26 +00:00
Dale Johannesen
57c6ac5fe5
Long double patch 7 of N, unless I lost count:).
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Last x87 bits for full functionality (not
thoroughly tested, and long doubles do not work
in SSE modes at all - use -mcpu=i486 for now)
llvm-svn: 40886
2007-08-07 01:17:37 +00:00
Dale Johannesen
a010822b45
Replace 4-line function with 10-line version per review comment.
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llvm-svn: 40881
2007-08-06 22:10:35 +00:00
Dale Johannesen
d1822ea7d1
Move lengthy conditional down 1 level per review comment.
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llvm-svn: 40878
2007-08-06 21:48:35 +00:00
Dale Johannesen
75169a82d6
Get X86 long double calling convention to work
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(on Darwin, anyway). Fix some table omissions for
LD arithmetic.
llvm-svn: 40877
2007-08-06 21:31:06 +00:00
Dale Johannesen
e279fd6ce8
Make 80-bit store maintain simulated FP stack correctly.
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llvm-svn: 40868
2007-08-06 19:50:32 +00:00
Dale Johannesen
b1888e73ad
Long double patch 4 of N: initial x87 implementation.
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Lots of problems yet but some simple things work.
llvm-svn: 40847
2007-08-05 18:49:15 +00:00
Chandler Carruth
7132e00de7
This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future.
...
This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.
llvm-svn: 40807
2007-08-04 01:51:18 +00:00
Dale Johannesen
b0c7585f2d
Make x86 long double alignment 32 for everything but
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Darwin (which makes size within a struct==96)
llvm-svn: 40796
2007-08-03 22:46:15 +00:00
Dale Johannesen
c5283ecd6f
long double patch 2 of N. Handle it in TargetData.
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(I've tried to get the info right for all targets,
but I'm not expert on all of them - check yours.)
llvm-svn: 40792
2007-08-03 20:20:50 +00:00
Chris Lattner
99fbf13dc3
add an observation
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llvm-svn: 40772
2007-08-03 00:17:42 +00:00
Dan Gohman
5f6a9da530
More explicit keywords.
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llvm-svn: 40757
2007-08-02 21:21:54 +00:00
Dan Gohman
8932bff7fe
Fix the alignment requirements of several unpck and shuf instructions.
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Generalize isPSHUFDMask and add a unary SHUFPD pattern so that SHUFPD's
memory operand alignment can be tested as well, with a fix to avoid
breaking MMX's use of isPSHUFDMask.
llvm-svn: 40756
2007-08-02 21:17:01 +00:00
Dan Gohman
4d436e2b7d
Fix pastos in vector arithmetic intrinsics.
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llvm-svn: 40754
2007-08-02 21:06:40 +00:00
Dan Gohman
fa3eeeedc0
Mark the SSE and MMX load instructions that
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X86InstrInfo::isReallyTriviallyReMaterializable knows how to handle
with the isReMaterializable flag so that it is given a chance to handle
them. Without hoisting constant-pool loads from loops this isn't very
visible, though it does keep CodeGen/X86/constant-pool-remat-0.ll from
making a copy of the constant pool on the stack.
llvm-svn: 40736
2007-08-02 14:27:55 +00:00
Evan Cheng
473c5111c3
Switch some multiplication instructions over to the new scheme for testing.
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llvm-svn: 40723
2007-08-02 05:48:35 +00:00
Evan Cheng
d3d92890fc
Can't handle offset and scale if rip-relative addressing is to be used.
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llvm-svn: 40703
2007-08-01 23:46:47 +00:00
Evan Cheng
9a3b2b09ad
Mac OS X X86-64 low 4G address not available.
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llvm-svn: 40702
2007-08-01 23:46:10 +00:00
Evan Cheng
763cdfd371
Mac OS X X86-64 low 4G address not available.
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llvm-svn: 40701
2007-08-01 23:45:51 +00:00
Evan Cheng
da549ece5c
Missing Requires.
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llvm-svn: 40691
2007-08-01 21:42:24 +00:00