Commit Graph

103 Commits

Author SHA1 Message Date
Ulrich Weigand d51c09f5d9 [PowerPC] Rename some more VK_PPC_ enums
This renames more VK_PPC_ enums, to make them more closely reflect
the @modifier string they represent.  This also prepares for adding
a bunch of new VK_PPC_ enums in upcoming patches.

For consistency, some MO_ flags related to VK_PPC_ enums are
likewise renamed.

No change in behaviour.

llvm-svn: 184547
2013-06-21 14:42:20 +00:00
Ulrich Weigand 2dbe06a987 [PowerPC] Fix hi/lo encoding in old-style code emitter
This patch implements the equivalent change to r182091/r182092
in the old-style code emitter.  Instead of having two separate
16-bit immediate encoding routines depending on the instruction,
this patch introduces a single encoder that checks the machine
operand flags to decide whether the low or high half of a
symbol address is required.

Since now both encoders make no further distinction between
"symbolLo" and "symbolHi", the .td operand can now use a
single getS16ImmEncoding method.

Tested by running the old-style JIT tests on 32-bit Linux.

llvm-svn: 182097
2013-05-17 14:14:12 +00:00
Ulrich Weigand 9d980cbdb9 [PowerPC] Use true offset value in "memrix" machine operands
This is the second part of the change to always return "true"
offset values from getPreIndexedAddressParts, tackling the
case of "memrix" type operands.

This is about instructions like LD/STD that only have a 14-bit
field to encode immediate offsets, which are implicitly extended
by two zero bits by the machine, so that in effect we can access
16-bit offsets as long as they are a multiple of 4.

The PowerPC back end currently handles such instructions by
carrying the 14-bit value (as it will get encoded into the
actual machine instructions) in the machine operand fields
for such instructions.  This means that those values are
in fact not the true offset, but rather the offset divided
by 4 (and then truncated to an unsigned 14-bit value).

Like in the case fixed in r182012, this makes common code
operations on such offset values not work as expected.
Furthermore, there doesn't really appear to be any strong
reason why we should encode machine operands this way.

This patch therefore changes the encoding of "memrix" type
machine operands to simply contain the "true" offset value
as a signed immediate value, while enforcing the rules that
it must fit in a 16-bit signed value and must also be a
multiple of 4.

This change must be made simultaneously in all places that
access machine operands of this type.  However, just about
all those changes make the code simpler; in many cases we
can now just share the same code for memri and memrix
operands.

llvm-svn: 182032
2013-05-16 17:58:02 +00:00
Hal Finkel feea653974 PPC: Use HWEncoding and TRI->getEncodingValue
As pointed out by Jakob, we don't need to maintain a separate
register-numbering table. Instead we should let TableGen generate the table for
us from the information (already present) in PPCRegisterInfo.td.
TRI->getEncodingValue is now used to access register-encoding values.

No functionality change intended.

llvm-svn: 178067
2013-03-26 20:08:20 +00:00
Chandler Carruth 9fb823bbd4 Move all of the header files which are involved in modelling the LLVM IR
into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.

There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.

The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.

I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).

I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.

llvm-svn: 171366
2013-01-02 11:36:10 +00:00
Bill Schmidt 9f0b4ec0f5 This patch improves the 64-bit PowerPC InitialExec TLS support by providing
for a wider range of GOT entries that can hold thread-relative offsets.
This matches the behavior of GCC, which was not documented in the PPC64 TLS
ABI.  The ABI will be updated with the new code sequence.

Former sequence:

  ld 9,x@got@tprel(2)
  add 9,9,x@tls

New sequence:

  addis 9,2,x@got@tprel@ha
  ld 9,x@got@tprel@l(9)
  add 9,9,x@tls

Note that a linker optimization exists to transform the new sequence into
the shorter sequence when appropriate, by replacing the addis with a nop
and modifying the base register and relocation type of the ld.

llvm-svn: 170209
2012-12-14 17:02:38 +00:00
Bill Schmidt ca4a0c9dbd This patch introduces initial-exec model support for thread-local storage
on 64-bit PowerPC ELF.

The patch includes code to handle external assembly and MC output with the
integrated assembler.  It intentionally does not support the "old" JIT.

For the initial-exec TLS model, the ABI requires the following to calculate
the address of external thread-local variable x:

 Code sequence            Relocation                  Symbol
  ld 9,x@got@tprel(2)      R_PPC64_GOT_TPREL16_DS      x
  add 9,9,x@tls            R_PPC64_TLS                 x

The register 9 is arbitrary here.  The linker will replace x@got@tprel
with the offset relative to the thread pointer to the generated GOT
entry for symbol x.  It will replace x@tls with the thread-pointer
register (13).

The two test cases verify correct assembly output and relocation output
as just described.

PowerPC-specific selection node variants are added for the two
instructions above:  LD_GOT_TPREL and ADD_TLS.  These are inserted
when an initial-exec global variable is encountered by
PPCTargetLowering::LowerGlobalTLSAddress(), and later lowered to
machine instructions LDgotTPREL and ADD8TLS.  LDgotTPREL is a pseudo
that uses the same LDrs support added for medium code model's LDtocL,
with a different relocation type.

The rest of the processing is straightforward.

llvm-svn: 169281
2012-12-04 16:18:08 +00:00
Chandler Carruth ed0881b2a6 Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

llvm-svn: 169131
2012-12-03 16:50:05 +00:00
Jia Liu b22310fda6 Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
llvm-svn: 150878
2012-02-18 12:03:15 +00:00
Owen Anderson d845d9d9e9 Widen the instruction encoder that TblGen emits to a 64 bits, which should accomodate every target I can think of offhand.
llvm-svn: 148833
2012-01-24 18:37:29 +00:00
Hal Finkel ac9df3d411 make CR spill and restore 64-bit clean (no functional change), and fix some other problems found with -verify-machineinstrs
llvm-svn: 146024
2011-12-07 06:34:06 +00:00
Evan Cheng 61d4a20f0f Refactor PPC target to separate MC routines from Target routines.
llvm-svn: 135942
2011-07-25 19:53:23 +00:00
Chris Lattner 73716a600a relax an assertion a bit, allowing the GPR argument of
these instructions to be encoded with getMachineOpValue.
This unbreaks ExecutionEngine/2003-01-04-ArgumentBug.ll 
when running on a G5

llvm-svn: 119307
2010-11-16 00:55:51 +00:00
Chris Lattner bf9f2f2c29 fix a pasto that massively broke the ppc jit while the buildbots happened
to be broken for other reasons

llvm-svn: 119283
2010-11-15 22:50:50 +00:00
Chris Lattner efacb9ee42 split out an encoder for memri operands, allowing a relocation to be plopped
into the immediate field.  This allows us to encode stuff like this:

        lbz r3, lo16(__ZL4init)(r4)     ; globalopt.cpp:5
                                        ; encoding: [0x88,0x64,A,A]
                                        ;   fixup A - offset: 0, value: lo16(__ZL4init), kind: fixup_ppc_lo16

        stw r3, lo16(__ZL1s)(r5)        ; globalopt.cpp:6
                                        ; encoding: [0x90,0x65,A,A]
                                        ;   fixup A - offset: 0, value: lo16(__ZL1s), kind: fixup_ppc_lo16

With this, we should have a completely function MCCodeEmitter for PPC, wewt.

llvm-svn: 119134
2010-11-15 08:22:03 +00:00
Chris Lattner 8f4444d003 add support for encoding the lo14 forms used for a few PPC64 addressing
modes.  For example, we now get:

	ld r3, lo16(_G)(r3)             ; encoding: [0xe8,0x63,A,0bAAAAAA00]
                                        ;   fixup A - offset: 0, value: lo16(_G), kind: fixup_ppc_lo14

llvm-svn: 119133
2010-11-15 08:02:41 +00:00
Chris Lattner 6566112e9c implement the start of support for lo16 and ha16, allowing us to get stuff like:
lis r4, ha16(__ZL4init)         ; encoding: [0x3c,0x80,A,A]
                                        ;   fixup A - offset: 0, value: ha16(__ZL4init), kind: fixup_ppc_ha16

llvm-svn: 119127
2010-11-15 06:33:39 +00:00
Chris Lattner 0e3461e417 change direct branches to encode with the same encoding method
as direct calls.  Change conditional branches to encode with
their own method, simplifying the JIT encoder and making room
for adding an mc fixup.

llvm-svn: 119125
2010-11-15 06:09:35 +00:00
Chris Lattner 79fa37152a split call operands out to their own encoding class, simplifying
code in the JIT.  Use this to form the first fixup for the PPC backend,
giving us stuff like this:

	bl L_foo$stub ; encoding: [0b010010AA,A,A,0bAAAAAA01]
                                        ;   fixup A - offset: 0, value: L_foo$stub, kind: fixup_ppc_br24

llvm-svn: 119123
2010-11-15 05:57:53 +00:00
Chris Lattner d6a07ccd10 add proper encoding for MTCRF instead of using a hack.
llvm-svn: 119121
2010-11-15 05:19:25 +00:00
Jim Grosbach a7b6d58f45 Make <target>CodeEmitter::getBinaryCodeForInstr() a const method.
llvm-svn: 116018
2010-10-08 00:21:28 +00:00
Chris Lattner 65b48b5dfc zap dead code.
llvm-svn: 113073
2010-09-04 18:12:00 +00:00
Owen Anderson a7aed18624 Reapply r110396, with fixes to appease the Linux buildbot gods.
llvm-svn: 110460
2010-08-06 18:33:48 +00:00
Owen Anderson bda59bd247 Revert r110396 to fix buildbots.
llvm-svn: 110410
2010-08-06 00:23:35 +00:00
Owen Anderson 755aceb5d0 Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
ID member as the sole unique type identifier.  Clean up APIs related to this change.

llvm-svn: 110396
2010-08-05 23:42:04 +00:00
Bill Wendling 499f797cdd Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and
thus is a much more meaningful name.

llvm-svn: 108563
2010-07-16 22:20:36 +00:00
Dan Gohman bcaf681cde Add const qualifiers to CodeGen's use of LLVM IR constructs.
llvm-svn: 101334
2010-04-15 01:51:59 +00:00
Chris Lattner c26f44fb07 change the DBG_LABEL MachineInstr to always be created
with an MCSymbol instead of an immediate.

llvm-svn: 98481
2010-03-14 07:56:48 +00:00
Chris Lattner ee2fbbc978 change the LabelSDNode to be EHLabelSDNode and make it hold
an MCSymbol.  Make the EH_LABEL MachineInstr hold its label
with an MCSymbol instead of ID.  Fix a bug in MMI.cpp which
would return labels named "Label4" instead of "label4".

llvm-svn: 98463
2010-03-14 02:33:54 +00:00
Chris Lattner 34adc8d225 change EH related stuff (other than EH_LABEL) to use MCSymbol
instead of label ID's.  This cleans up and regularizes a bunch 
of code and makes way for future progress.

Unfortunately, this pointed out to me that JITDwarfEmitter.cpp
is largely copy and paste from DwarfException/MachineModuleInfo
and other places.  This is very sad and disturbing. :(

One major change here is that TidyLandingPads moved from being
called in DwarfException::BeginFunction to being called in
DwarfException::EndFunction.  There should not be any 
functionality change from doing this, but I'm not an EH expert.

llvm-svn: 98459
2010-03-14 01:41:15 +00:00
Chris Lattner b06015aa69 move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.

llvm-svn: 95687
2010-02-09 19:54:29 +00:00
Chris Lattner 308acc4ab0 detemplatize the ppc code emitter.
llvm-svn: 95142
2010-02-02 21:55:58 +00:00
Chris Lattner a3fa43932d remove dead code.
llvm-svn: 95141
2010-02-02 21:52:03 +00:00
Nick Lewycky 974e12b2d3 Remove includes of Support/Compiler.h that are no longer needed after the
VISIBILITY_HIDDEN removal.

llvm-svn: 85043
2009-10-25 06:57:41 +00:00
Nick Lewycky 02d5f77d26 Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.
Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.

llvm-svn: 85042
2009-10-25 06:33:48 +00:00
Devang Patel 051454a16f Update processDebugLoc() so that it can be used to process debug info before and after printing an instruction.
llvm-svn: 83363
2009-10-06 02:19:11 +00:00
Jakob Stoklund Olesen dc9efe8078 Introduce the TargetInstrInfo::KILL machine instruction and get rid of the
unused DECLARE instruction.

KILL is not yet used anywhere, it will replace TargetInstrInfo::IMPLICIT_DEF
in the places where IMPLICIT_DEF is just used to alter liveness of physical
registers.

llvm-svn: 83006
2009-09-28 20:32:26 +00:00
Daniel Dunbar 7d6781b0fe Tabs -> spaces, and remove trailing whitespace.
llvm-svn: 82355
2009-09-20 02:20:51 +00:00
Chris Lattner a6f074fb3a remove various std::ostream version of printing methods from
MachineInstr and MachineOperand.  This required eliminating a
bunch of stuff that was using DOUT, I hope that bill doesn't
mind me stealing his fun. ;-)

llvm-svn: 79813
2009-08-23 03:41:05 +00:00
Jeffrey Yasskin 15d54b9504 r76102 added the MachineCodeEmitter::processDebugLoc call and called it from
the X86 Emitter.  This patch extends that to the rest of the targets that can
write to a MachineCodeEmitter: ARM, Alpha, and PPC.

llvm-svn: 76211
2009-07-17 18:49:39 +00:00
Torok Edwin fbcc663cbf llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").

llvm-svn: 75640
2009-07-14 16:55:14 +00:00
Torok Edwin 56d0659726 assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.

llvm-svn: 75379
2009-07-11 20:10:48 +00:00
Torok Edwin fb8d6d5b58 Implement changes from Chris's feedback.
Finish converting lib/Target.

llvm-svn: 75043
2009-07-08 20:53:28 +00:00
Bruno Cardoso Lopes 5661ea68e7 Add the Object Code Emitter class. Original patch by Aaron Gray, I did some
cleanup, removed some #includes and moved Object Code Emitter out-of-line.

llvm-svn: 74813
2009-07-06 05:09:34 +00:00
Tilmann Scheller 773f14c008 Refactor ABI code in the PowerPC backend.
Make CalculateParameterAndLinkageAreaSize() Darwin-specific.
Remove SVR4 specific code from LowerCALL_Darwin() and LowerFORMAL_ARGUMENTS_Darwin().
Rename MachoABI to DarwinABI for consistency.
Rename ELF ABI to SVR4 ABI for consistency.
Factor out common call return lowering between the Darwin and SVR4 ABI.
Factor out common call lowering between the Darwin and SVR4 ABI.

llvm-svn: 74766
2009-07-03 06:47:08 +00:00
Bruno Cardoso Lopes 9fd794bebf Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron Gray
llvm-svn: 72697
2009-06-01 19:57:37 +00:00
Bruno Cardoso Lopes a194c3a69e First patch in the direction of splitting MachineCodeEmitter in two subclasses:
JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray

llvm-svn: 72631
2009-05-30 20:51:52 +00:00
Dan Gohman 0d1e9a8e04 Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.

llvm-svn: 57006
2008-10-03 15:45:36 +00:00
Dan Gohman a79db30d28 Tidy up several unbeseeming casts from pointer to intptr_t.
llvm-svn: 55779
2008-09-04 17:05:41 +00:00
Evan Cheng 34f3a962b0 Change getBinaryCodeForInstr prototype. First operand MachineInstr& should be const. Make corresponding changes.
llvm-svn: 55623
2008-09-02 06:51:36 +00:00