Commit Graph

13 Commits

Author SHA1 Message Date
Bob Wilson 111b0b6da4 Remove declaration of __clear_cache for __APPLE__. <rdar://problem/13924072>
This fixes a bootstrapping problem with builds for Apple ARM targets.
Clang had the wrong prototype for __clear_cache with ARM targets.  Rafael
fixed that in clang svn r181784 and r181810, but without those changes,
we can't build this code for ARM because clang reports an error about the
declaration in Memory.inc not matching the builtin declaration. Some of our
buildbots need to use an older compiler that doesn't have the clang fix.
Since __clear_cache is never used here when __APPLE__ is defined, I'm just
conditionalizing the declaration to match that. I also moved the declaration
of sys_icache_invalidate inside the conditional for __APPLE__ while I was at
it.

llvm-svn: 182223
2013-05-19 20:33:51 +00:00
Tim Northover 77d0a4ac62 Invalidate instruction cache when setting memory to be executable.
lli's remote MCJIT code calls setExecutable just prior to running
code. In line with Darwin behaviour this seems to be the place to
invalidate any caches needed so that relocations can take effect
properly.

llvm-svn: 182213
2013-05-19 15:28:16 +00:00
Rafael Espindola e16befb5f6 Fix __clear_cache declaration.
This fixes the build with gcc in gnu++98 and gnu++11 mode.

llvm-svn: 181811
2013-05-14 18:06:14 +00:00
Rafael Espindola 17268dc192 Declare __clear_cache.
GCC declares __clear_cache in the gnu modes (-std=gnu++98,
-std=gnu++11), but not in the strict modes (-std=c++98, -std=c++11). This patch
declares it and therefore fixes the build when using one of the strict modes.

llvm-svn: 181785
2013-05-14 13:02:37 +00:00
Tim Northover 6c26b327ef AArch64: use __clear_cache under GCCish environments
AArch64 is going to need some kind of cache-invalidation in order to
successfully JIT since it has a weak memory-model. This is provided by
a __clear_cache builtin in libgcc, which acts very much like the
32-bit ARM equivalent (on platforms where it exists).

llvm-svn: 181129
2013-05-04 18:52:44 +00:00
Akira Hatanaka 7239a6003f Android uses cacheflush(long start, long end, long flags) for MIPS.
Patch by Stephen Hines.

llvm-svn: 177101
2013-03-14 19:01:00 +00:00
Krzysztof Parzyszek 12ba711f35 Add comment in Memory.inc explaining r175646.
llvm-svn: 175650
2013-02-20 19:25:09 +00:00
Krzysztof Parzyszek 798679e140 On PowerPC, the cache-flush instructions dcbf and icbi are treated as
loads. On FreeBSD, add PROT_READ page protection flag before flushing
cache.

llvm-svn: 175646
2013-02-20 18:24:30 +00:00
Chandler Carruth acd64becb1 Go ahead and get rid of the old page size interface and convert all the
users over to the new one. No sense maintaining this "compatibility"
layer it seems.

llvm-svn: 171331
2012-12-31 23:31:56 +00:00
Andrew Kaylor 1f66100755 This patch adds memory support functions which will later be used to implement section-specific protection handling in MCJIT.
llvm-svn: 164249
2012-09-19 20:46:12 +00:00
Chandler Carruth a699b6a44c Add support for finding cacheflush on OpenBSD/mips64 platforms.
Patch by Brad Smith!

llvm-svn: 163584
2012-09-11 01:17:24 +00:00
Jim Grosbach 806d507b0f setExecutable() should default to success if there's nothing custom for it.
llvm-svn: 127891
2011-03-18 18:51:03 +00:00
Michael J. Spencer 447762da85 Merge System into Support.
llvm-svn: 120298
2010-11-29 18:16:10 +00:00