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Commit Graph

Author	SHA1	Message	Date
Craig Topper	d10a200ceb	[X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. We require d/q suffixes on the memory form of these instructions to disambiguate the memory size. We don't require it on the register forms, but need to support parsing both with and without it. Previously we always printed the d/q suffix on the register forms, but it's redundant and inconsistent with gcc and objdump. After this patch we should support the d/q for parsing, but not print it when its unneeded. llvm-svn: 360085	2019-05-06 21:39:51 +00:00
Craig Topper	9ca3a95f79	[X86] Support the EVEX versions vcvt(t)ss2si and vcvt(t)sd2si with the {evex} pseudo prefix in the assembler. The EVEX versions are ambiguous with the VEX versions based on operands alone so we had explicitly dropped them from the AsmMatcher table. Unfortunately, when we add them they incorrectly show in the table before their VEX counterparts. This is different how the prioritization normally works. To fix this we have to explicitly reject the instructions unless the {evex} prefix has been seen. llvm-svn: 358041	2019-04-10 01:29:59 +00:00
Craig Topper	a13edd3ef2	[X86][AVX512F_SCALAR]: Adding full coverage of MC encoding for the AVX512F_SCALAR isa sets. NFC Adding MC regressions tests to cover the AVX512F_SCALAR isa sets. This patch is part of a larger task to cover MC encoding of all X86 isa sets started in revision: https://reviews.llvm.org/D39952 Differential Revision: https://reviews.llvm.org/D41174 llvm-svn: 351874	2019-01-22 20:48:24 +00:00

Author

SHA1

Message

Date

Craig Topper

d10a200ceb

[X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing.

We require d/q suffixes on the memory form of these instructions to disambiguate the memory size.
We don't require it on the register forms, but need to support parsing both with and without it.

Previously we always printed the d/q suffix on the register forms, but it's redundant and
inconsistent with gcc and objdump.

After this patch we should support the d/q for parsing, but not print it when its unneeded.

llvm-svn: 360085

2019-05-06 21:39:51 +00:00

Craig Topper

9ca3a95f79

[X86] Support the EVEX versions vcvt(t)ss2si and vcvt(t)sd2si with the {evex} pseudo prefix in the assembler.

The EVEX versions are ambiguous with the VEX versions based on operands alone so we had explicitly dropped
them from the AsmMatcher table. Unfortunately, when we add them they incorrectly show in the table before
their VEX counterparts. This is different how the prioritization normally works.

To fix this we have to explicitly reject the instructions unless the {evex} prefix has been seen.

llvm-svn: 358041

2019-04-10 01:29:59 +00:00

Craig Topper

a13edd3ef2

[X86][AVX512F_SCALAR]: Adding full coverage of MC encoding for the AVX512F_SCALAR isa sets. NFC

Adding MC regressions tests to cover the AVX512F_SCALAR isa sets.
This patch is part of a larger task to cover MC encoding of all X86 isa sets started in revision: https://reviews.llvm.org/D39952

Differential Revision: https://reviews.llvm.org/D41174

llvm-svn: 351874

2019-01-22 20:48:24 +00:00

3 Commits