2d489b5081
Re-apply the memory operand changes, with a fix for the static
...
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.
llvm-svn: 46827
2008-02-06 22:27:42 +00:00
2cb9068c78
Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead.
...
llvm-svn: 46724
2008-02-04 23:06:48 +00:00
1770fb883b
explicitly include Compiler.h instead of getting it from tblgen in the middle of a class.
...
llvm-svn: 46676
2008-02-03 05:43:57 +00:00
32e5347eb8
Get rid of the annoying blank lines before labels.
...
llvm-svn: 46667
2008-02-02 08:39:46 +00:00
efd142a920
SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc.
...
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.
llvm-svn: 46659
2008-02-02 04:07:54 +00:00
27b32b87ed
Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit.
...
llvm-svn: 46623
2008-01-31 21:00:00 +00:00
3646fdda67
Create a new class, MemOperand, for describing memory references
...
in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.
Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.
Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.
llvm-svn: 46585
2008-01-31 00:25:39 +00:00
1ea55cf816
This commit changes:
...
1. Legalize now always promotes truncstore of i1 to i8.
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
safe.
The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:
_foo:
fldt 20(%esp)
fldt 4(%esp)
faddp %st(1)
movl 36(%esp), %eax
fstps (%eax)
ret
instead of:
_foo:
subl $4, %esp
fldt 24(%esp)
fldt 8(%esp)
faddp %st(1)
fstps (%esp)
movl 40(%esp), %eax
movss (%esp), %xmm0
movss %xmm0, (%eax)
addl $4, %esp
ret
llvm-svn: 46140
2008-01-17 19:59:44 +00:00
9a249b0ce5
rename SDTRet -> SDTNone.
...
Move definition of 'trap' sdnode up from x86 instrinfo to targetselectiondag.td.
llvm-svn: 46017
2008-01-15 22:02:54 +00:00
596875118c
rename MachineInstr::setInstrDescriptor -> setDesc
...
llvm-svn: 45871
2008-01-11 18:10:50 +00:00
94de7bc3aa
get def use info more correct.
...
llvm-svn: 45821
2008-01-10 05:12:37 +00:00
f0f438a517
remove MachineOpCode typedef.
...
llvm-svn: 45679
2008-01-07 02:48:55 +00:00
2a3be7bb6c
Move even more functionality from MRegisterInfo into TargetInstrInfo.
...
Some day I'll get it all moved over...
llvm-svn: 45672
2008-01-07 01:35:02 +00:00
a4ce4f6987
rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.
...
llvm-svn: 45667
2008-01-06 23:38:27 +00:00
a348f55ec6
Change the 'isStore' inferrer to look for 'SDNPMayStore'
...
instead of "ISD::STORE". This allows us to mark target-specific dag
nodes as storing (such as ppc byteswap stores). This allows us to remove
more explicit isStore flags from the .td files.
Finally, add a warning for when a .td file contains an explicit
isStore and tblgen is able to infer it.
llvm-svn: 45654
2008-01-06 06:44:58 +00:00
563fcc3428
Change MachineRelocation::DoesntNeedFnStub to NeedStub. This fields will be used
...
for non-function GV relocations that require function address stubs (e.g. Mac OS X in non-static mode).
llvm-svn: 45527
2008-01-03 02:56:28 +00:00
eee14601b1
Move some more instruction creation methods from RegisterInfo into InstrInfo.
...
llvm-svn: 45484
2008-01-01 21:11:32 +00:00
25568e4cef
Fix a problem where lib/Target/TargetInstrInfo.h would include and use
...
a header file from libcodegen. This violates a layering order: codegen
depends on target, not the other way around. The fix to this is to
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen. It is defined in libcodegen, where
the base is not.
llvm-svn: 45475
2008-01-01 01:03:04 +00:00
7a73ae9a86
Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
...
Machine-level API cleanup instigated by Chris.
llvm-svn: 45470
2007-12-31 06:32:00 +00:00
a10fff51d9
Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
...
that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
llvm-svn: 45467
2007-12-31 04:13:23 +00:00
a5bb370aa4
Add new shorter predicates for testing machine operands for various types:
...
e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
2007-12-30 23:10:15 +00:00
5c4637816e
Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
...
llvm-svn: 45453
2007-12-30 20:49:49 +00:00
f3ebc3f3d2
Remove attribution from file headers, per discussion on llvmdev.
...
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
a087a8d2ce
remove attribution from lib Makefiles.
...
llvm-svn: 45415
2007-12-29 20:09:26 +00:00
6e68381e02
Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.
...
llvm-svn: 44960
2007-12-12 23:12:09 +00:00
bb26301864
Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
...
the stored register is killed.
llvm-svn: 44600
2007-12-05 03:14:33 +00:00
f45a1d623c
Remove redundant foldMemoryOperand variants and other code clean up.
...
llvm-svn: 44517
2007-12-02 08:30:39 +00:00
69fda0a716
Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0.
...
llvm-svn: 44479
2007-12-01 02:07:52 +00:00
b960acebde
something wrong with this opt
...
llvm-svn: 44370
2007-11-27 18:31:30 +00:00
7a7085f6d3
Add parameter to getDwarfRegNum to permit targets
...
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.
llvm-svn: 44056
2007-11-13 19:13:01 +00:00
77b13af9a6
Unifacalize the CALLSEQ{START,END} stuff.
...
llvm-svn: 44045
2007-11-13 09:19:02 +00:00
f359fed9f9
Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
...
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).
This can only result in tears...
llvm-svn: 44037
2007-11-13 00:44:25 +00:00
933b5b7e62
Add a flag for indirect branch instructions.
...
Target maintainers: please check that the instructions for your target are correctly marked.
llvm-svn: 44012
2007-11-12 07:39:39 +00:00
4edfea438a
Use TableGen to emit information for dwarf register numbers.
...
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,
llvm-svn: 43997
2007-11-11 19:50:10 +00:00
283207a71c
Eliminate the remaining uses of getTypeSize. This
...
should only effect x86 when using long double. Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment). This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.
llvm-svn: 43688
2007-11-05 00:04:43 +00:00
463e2ab0ac
- Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
...
- Fix some copy+paste bugs.
llvm-svn: 43153
2007-10-18 22:40:57 +00:00
aa9a225699
Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
...
llvm-svn: 43150
2007-10-18 21:29:24 +00:00
cdf3609130
Revert 42908 for now.
...
llvm-svn: 42960
2007-10-14 05:57:21 +00:00
dc35bd79ca
Change the names used for internal labels to use the current
...
function symbol name instead of a codegen-assigned function
number.
Thanks Evan! :-)
llvm-svn: 42908
2007-10-12 14:53:36 +00:00
482732af9d
Set ISD::FPOW to Expand.
...
llvm-svn: 42881
2007-10-11 23:21:31 +00:00
f4cf5dcdd2
- Added a few target hooks to generate load / store instructions from / to any
...
address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.
llvm-svn: 42621
2007-10-05 01:32:41 +00:00
c1e4e3743b
Allow copyRegToReg to emit cross register classes copies.
...
Tested with "make check"!
llvm-svn: 42346
2007-09-26 06:25:56 +00:00
57211c5550
More explicit keywords.
...
llvm-svn: 42316
2007-09-25 20:27:06 +00:00
e36c400255
Fix PR 1681. When X86 target uses +sse -sse2,
...
keep f32 in SSE registers and f64 in x87. This
is effectively a new codegen mode.
Change addLegalFPImmediate to permit float and
double variants to do different things.
Adjust callers.
llvm-svn: 42246
2007-09-23 14:52:20 +00:00
3e18e504ae
Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead.
...
llvm-svn: 41863
2007-09-11 19:55:27 +00:00
86e0119822
Fold the adjust_trampoline intrinsic into
...
init_trampoline. There is now only one
trampoline intrinsic.
llvm-svn: 41841
2007-09-11 14:10:23 +00:00
e2f23a3abf
Add lengthof and endof templates that hide a lot of sizeof computations.
...
Patch by Sterling Stein!
llvm-svn: 41758
2007-09-07 04:06:50 +00:00
3cf889f75e
Enhance APFloat to retain bits of NaNs (fixes oggenc).
...
Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.
llvm-svn: 41632
2007-08-31 04:03:46 +00:00
9a25d98c86
Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots.
...
llvm-svn: 41597
2007-08-30 05:52:20 +00:00
d246b2ca5c
Change LegalFPImmediates to use APFloat.
...
Add APFloat interfaces to ConstantFP, SelectionDAG.
Fix integer bit in double->APFloat conversion.
Convert LegalizeDAG to use APFloat interface in
ConstantFPSDNode uses.
llvm-svn: 41587
2007-08-30 00:23:21 +00:00
c5283ecd6f
long double patch 2 of N. Handle it in TargetData.
...
(I've tried to get the info right for all targets,
but I'm not expert on all of them - check yours.)
llvm-svn: 40792
2007-08-03 20:20:50 +00:00
5f6a9da530
More explicit keywords.
...
llvm-svn: 40757
2007-08-02 21:21:54 +00:00
644f917358
Support for trampolines, except for X86 codegen which is
...
still under discussion.
llvm-svn: 40549
2007-07-27 12:58:54 +00:00
cf0a5349de
Don't ignore the return value of AsmPrinter::doInitialization and
...
AsmPrinter::doFinalization.
llvm-svn: 40487
2007-07-25 19:33:14 +00:00
ac1591be42
No more noResults.
...
llvm-svn: 40132
2007-07-21 00:34:19 +00:00
9d5df0a5f6
Added -print-emitted-asm to print out JIT generated asm to cerr.
...
llvm-svn: 40123
2007-07-20 21:56:13 +00:00
94b5a80b93
Change instruction description to split OperandList into OutOperandList and
...
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
llvm-svn: 40033
2007-07-19 01:14:50 +00:00
383a324735
Long live the exception handling!
...
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.
In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.
After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be
thought as 'finished': I expect many small and not so small glitches
everywhere.
llvm-svn: 39855
2007-07-14 14:06:15 +00:00
09d73c0305
Assert when TLS is not implemented.
...
llvm-svn: 39737
2007-07-11 17:19:51 +00:00
517290ae52
The various "getModuleMatchQuality" implementations should return
...
zero if they see a target triple they don't understand.
llvm-svn: 38463
2007-07-09 17:25:29 +00:00
2660cef6d7
Convert .cvsignore files
...
llvm-svn: 37801
2007-06-29 16:35:07 +00:00
309d3d51b3
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
...
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.
llvm-svn: 37704
2007-06-22 14:59:07 +00:00
a7644dd9b9
Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration
...
for needing the DAG node to print pre-legalize extended value types, and
to get better debug messages with target-specific nodes.
llvm-svn: 37656
2007-06-19 14:13:56 +00:00
c68554683d
Handle blocks with 2 unconditional branches in AnalyzeBranch.
...
llvm-svn: 37571
2007-06-13 17:59:52 +00:00
5514bbef46
Add a utility routine to check for unpredicated terminator instruction.
...
llvm-svn: 37528
2007-06-08 21:59:56 +00:00
fc94eb66d2
BlockHasNoFallThrough() now returns true if block ends with a return instruction.
...
llvm-svn: 37266
2007-05-21 18:44:17 +00:00
99be49dd9b
RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.
...
llvm-svn: 37192
2007-05-18 00:05:48 +00:00
8c78a0bff0
Drop 'const'
...
llvm-svn: 36662
2007-05-03 01:11:54 +00:00
e95c6ad802
Use 'static const char' instead of 'static const int'.
...
Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
llvm-svn: 36652
2007-05-02 21:39:20 +00:00
09f162ca6a
Do not use typeinfo to identify pass in pass manager.
...
llvm-svn: 36632
2007-05-01 21:15:47 +00:00
5662b21db1
eliminateFrameIndex() change.
...
llvm-svn: 36626
2007-05-01 09:13:03 +00:00
8cd224e81c
Relex assertions to account for additional implicit def / use operands.
...
llvm-svn: 36430
2007-04-25 07:12:14 +00:00
2077814c91
Use this nifty Constraints thing and fix the inverted conditional moves
...
llvm-svn: 36191
2007-04-17 04:07:59 +00:00
fb80151c42
Removed tabs everywhere except autogenerated & external files. Add make
...
target for tabs checking.
llvm-svn: 36146
2007-04-16 18:10:23 +00:00
19c0217d99
For PR1336:
...
Subtarget option names must be given in lower case in order to be
recognized. Fixes test/CodeGen/Alpha/ctlz.ll
llvm-svn: 36125
2007-04-16 14:06:19 +00:00
427ec7fa51
Readme
...
llvm-svn: 35533
2007-03-31 15:05:44 +00:00
d685514e2e
switch TargetLowering::getConstraintType to take the entire constraint,
...
not just the first letter. No functionality change.
llvm-svn: 35322
2007-03-25 02:14:49 +00:00
61f39d186c
Added MRegisterInfo hook to re-materialize an instruction.
...
llvm-svn: 35205
2007-03-20 08:09:38 +00:00
ed4b303c10
Refactoring of formal parameter flags. Enable properly use of
...
zext/sext/aext stuff.
llvm-svn: 35008
2007-03-07 16:25:09 +00:00
95ae95a6a6
PEI now passes a RegScavenger ptr to eliminateFrameIndex.
...
llvm-svn: 34707
2007-02-28 00:21:17 +00:00
df5899258c
By default, spills kills the register being stored.
...
llvm-svn: 34515
2007-02-23 01:10:04 +00:00
e0008e23cf
Simplify lowering and selection of exception ops.
...
llvm-svn: 34488
2007-02-22 14:56:36 +00:00
3796abea0f
Support to provide exception and selector registers.
...
llvm-svn: 34482
2007-02-21 22:54:50 +00:00
f7ed82da10
Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.
...
llvm-svn: 34428
2007-02-19 21:49:54 +00:00
da81bf4d3e
For PR1207:
...
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.
llvm-svn: 34399
2007-02-19 03:20:00 +00:00
9865be6d40
Added getReservedRegs().
...
llvm-svn: 34376
2007-02-17 11:06:00 +00:00
b8d6fa20bb
This was done recently
...
llvm-svn: 34338
2007-02-16 02:11:59 +00:00
6719d3d0a2
Well this isn't as ugly and it works better. At least gcc bootstraps again
...
llvm-svn: 34254
2007-02-13 23:41:16 +00:00
9a4a1515ee
return addresses, those I already have
...
llvm-svn: 34056
2007-02-08 17:37:41 +00:00
59889ae93f
Added new method to add a "simple" code emitter. That is, to only add
...
the code emitter and not set variables.
llvm-svn: 34033
2007-02-08 01:38:33 +00:00
5301e7c605
For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid
...
confusion with external linkage types.
llvm-svn: 33663
2007-01-30 20:08:39 +00:00
eda5997cc8
Finish off bug 680, allowing targets to custom lower frame and return
...
address nodes.
llvm-svn: 33636
2007-01-29 22:58:52 +00:00
f9e5445ed4
Make LABEL a builtin opcode.
...
llvm-svn: 33537
2007-01-26 14:34:52 +00:00
c4bdea012b
FTOIT and ITOFT are bit converts, and if we drop 21264s, are always available
...
llvm-svn: 33492
2007-01-24 21:09:16 +00:00
8a75518f0b
Fix unordered fp on alpha
...
llvm-svn: 33487
2007-01-24 18:43:14 +00:00
f5c96fabf9
Renamed getTypeAlignmentShift() to getPreferredTypeAlignmentShift().
...
llvm-svn: 33482
2007-01-24 07:03:39 +00:00
6730e12ae4
PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary.
...
llvm-svn: 33460
2007-01-23 09:38:11 +00:00
16e58be1bc
hasFP() is now a virtual method of MRegisterInfo.
...
llvm-svn: 33455
2007-01-23 00:57:47 +00:00
a94d394ad2
For PR1043:
...
This is the final patch for this PR. It implements some minor cleanup
in the use of IntegerType, to wit:
1. Type::getIntegerTypeMask -> IntegerType::getBitMask
2. Type::Int*Ty changed to IntegerType* from Type*
3. ConstantInt::getType() returns IntegerType* now, not Type*
This also fixes PR1120.
Patch by Sheng Zhou.
llvm-svn: 33370
2007-01-19 21:13:56 +00:00
74b46e8c05
Fix naming inconsistency.
...
llvm-svn: 32823
2007-01-02 21:33:40 +00:00
e63b6518fa
For PR950:
...
Three changes:
1. Convert signed integer types to signless versions.
2. Implement the @sext and @zext parameter attributes. Previously the
type of an function parameter was used to determine whether it should
be sign extended or zero extended before the call. This information is
now communicated via the function type's parameter attributes.
3. The interface to LowerCallTo had to be changed in order to accommodate
the parameter attribute information. Although it would have been
convenient to pass in the FunctionType itself, there isn't always one
present in the caller. Consequently, a signedness indication for the
result type and for each parameter was provided for in the interface
to this method. All implementations were changed to make the adjustment
necessary.
llvm-svn: 32788
2006-12-31 05:55:36 +00:00
1ef9cd400d
eliminate static ctors for Statistic objects.
...
llvm-svn: 32703
2006-12-19 22:59:26 +00:00
085cfdbfdc
Simplify a bit
...
llvm-svn: 32343
2006-12-07 23:55:55 +00:00
9bfb1e1f29
What should be the last unnecessary <iostream>s in the library.
...
llvm-svn: 32333
2006-12-07 22:21:48 +00:00
76a61eb054
Be sure to grab weak functions too, and make implicit defs comments
...
llvm-svn: 32308
2006-12-07 17:39:14 +00:00
7c779fcad4
add #include
...
llvm-svn: 32281
2006-12-06 18:19:53 +00:00
700b873130
Detemplatize the Statistic class. The only type it is instantiated with
...
is 'unsigned'.
llvm-svn: 32279
2006-12-06 17:46:33 +00:00
aafeaef8c8
MachineInstr::setOpcode -> MachineInstr::setInstrDescriptor
...
llvm-svn: 32034
2006-11-30 07:12:03 +00:00
20350c4025
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
...
of opcode and number of operands.
llvm-svn: 31947
2006-11-27 23:37:22 +00:00
dc2c8748a7
Properly transfer kill / dead info.
...
llvm-svn: 31765
2006-11-15 20:58:11 +00:00
dbd3d294e6
Matches MachineInstr changes.
...
llvm-svn: 31712
2006-11-13 23:36:35 +00:00
b974b0a3e1
silence warnings.
...
llvm-svn: 31394
2006-11-03 01:18:29 +00:00
de46e48420
For PR786:
...
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.
llvm-svn: 31380
2006-11-02 20:25:50 +00:00
d8b59f67f6
fix 2006-11-01-vastart.ll
...
llvm-svn: 31371
2006-11-02 03:05:26 +00:00
dfbf91e59d
more shotenning
...
llvm-svn: 31331
2006-10-31 23:46:56 +00:00
8b20fa42da
Let us play simplify the td file (and fix a few missed sub and mul patterns).
...
llvm-svn: 31322
2006-10-31 19:52:12 +00:00
692e4155aa
Add all that branch mangling niftiness
...
llvm-svn: 31313
2006-10-31 16:49:55 +00:00
0d41d19427
All targets expand BR_JT for now.
...
llvm-svn: 31294
2006-10-30 08:02:39 +00:00
71b99297aa
Move getPreferredAlignmentLog from AsmPrinter to TargetData
...
llvm-svn: 31171
2006-10-24 20:32:14 +00:00
ed32883b27
fix warning about missing newline at end of file
...
llvm-svn: 31162
2006-10-24 17:07:11 +00:00
042d56230e
implement uncond branch insertion so alpha works work branchfolding.
...
llvm-svn: 31158
2006-10-24 16:41:36 +00:00
e0fc4dfc22
For PR950:
...
This patch implements the first increment for the Signless Types feature.
All changes pertain to removing the ConstantSInt and ConstantUInt classes
in favor of just using ConstantInt.
llvm-svn: 31063
2006-10-20 07:07:24 +00:00
ab51cf2e78
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
...
llvm-svn: 30945
2006-10-13 21:14:26 +00:00
0e0ee36f45
adjcallstack up/down clobbers the sp
...
llvm-svn: 30910
2006-10-12 18:00:14 +00:00
fa8cbfd8e8
Reduce the amount of state in the lowering code and drop old pattern ISel functions
...
llvm-svn: 30881
2006-10-11 16:24:51 +00:00
6487854b3f
Use cute tblgen tricks to make zap handling more powerful. Specifically,
...
when the dag combiner simplifies an and mask, notice this and allow those bits
to be missing from the zap mask.
This compiles Alpha/zapnot4.ll into:
sll $16,3,$0
zapnot $0,3,$0
ret $31,($26),1
instead of:
ldah $0,1($31)
lda $0,-8($0)
sll $16,3,$1
and $1,$0,$0
ret $31,($26),1
It would be *really* nice to replace the hunk of code in the
AlphaISelDAGToDAG.cpp file that matches (and (srl (x, C), c2) into
(SRL (ZAPNOTi)) with a similar pattern, but I've spent enough time poking
at alpha. Make andrew will do this.
llvm-svn: 30875
2006-10-11 05:13:56 +00:00
a6bbf33cbf
Jimptables working again on alpha.
...
As a bonus, use the GOT node instead of the AlphaISD::GOT for internal stuff.
llvm-svn: 30873
2006-10-11 04:29:42 +00:00
9f86f7c2ab
Remove dead/redundant instructions. These are handled by ZAPNOTi
...
llvm-svn: 30872
2006-10-11 04:12:39 +00:00
4a57e2a6ed
This entry is done. switched to the gcc way of doing things.
...
llvm-svn: 30867
2006-10-11 01:48:03 +00:00
3d74556d74
This has apparently been fixed
...
llvm-svn: 30864
2006-10-11 01:44:46 +00:00
e71fe34d75
Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
...
llvm-svn: 30844
2006-10-09 20:57:25 +00:00
dc3064e223
Set the jt section
...
llvm-svn: 30781
2006-10-06 22:52:33 +00:00
21fa769867
Alpha uses a got
...
llvm-svn: 30778
2006-10-06 22:46:51 +00:00
df9ac47e5e
Make use of getStore().
...
llvm-svn: 30759
2006-10-05 23:01:46 +00:00
8cfd10eff3
Don't bother setting JumpTableTextSection, it is about to disappear
...
llvm-svn: 30745
2006-10-05 03:13:59 +00:00
a6a570e02f
Pass the MachineFunction into EmitJumpTableInfo.
...
llvm-svn: 30742
2006-10-05 03:01:21 +00:00
c8c78982d4
use getSectionForFunction to decide which section to emit code into
...
llvm-svn: 30738
2006-10-05 02:47:13 +00:00
5d9fd977d3
Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
...
extra operand to LOADX to specify the exact value extension type.
llvm-svn: 30714
2006-10-04 00:56:09 +00:00
5e2bacd6be
Fix jump tables to match gcc (and the ABI and whatnot)
...
llvm-svn: 30594
2006-09-24 19:46:56 +00:00
68324f8f85
jump table note
...
llvm-svn: 30591
2006-09-24 13:13:10 +00:00
ccdaecc448
Account for pseudo-ops correctly
...
llvm-svn: 30548
2006-09-20 20:08:52 +00:00
f007f21c8a
catch constants more often
...
llvm-svn: 30534
2006-09-20 15:05:49 +00:00
97a4e99aff
clarify with test case
...
llvm-svn: 30531
2006-09-20 14:48:00 +00:00
e2d138a462
Add Note
...
llvm-svn: 30530
2006-09-20 14:40:01 +00:00
f23e3bfcb2
A pass to remove the worst of the replay trap offenders, and as a bonus, align basic blocks when it is free to do so
...
llvm-svn: 30467
2006-09-18 19:44:29 +00:00
3aa3ad780e
Jump tables on Alpha
...
llvm-svn: 30463
2006-09-18 18:01:03 +00:00
d61d39ec53
Adding dllimport, dllexport and external weak linkage types.
...
DLL* linkages got full (I hope) codegeneration support in C & both x86
assembler backends.
External weak linkage added for future use, we don't provide any
codegeneration, etc. support for it.
llvm-svn: 30374
2006-09-14 18:23:27 +00:00
9a083a4121
Reflects MachineConstantPoolEntry changes.
...
llvm-svn: 30279
2006-09-12 21:04:05 +00:00
ae92ce8798
1. Remove condition on delete.
...
2. Protect and outline createTargetAsmInfo.
3. Misc. kruft.
llvm-svn: 30169
2006-09-07 23:39:26 +00:00
261779bb45
Make target asm info a property of the target machine.
...
llvm-svn: 30162
2006-09-07 22:06:40 +00:00
0e83541f8b
Break out target asm info into separate files.
...
llvm-svn: 30161
2006-09-07 22:05:02 +00:00
a6211dcdad
Separate target specific asm properties from the asm printers.
...
llvm-svn: 30126
2006-09-06 18:34:40 +00:00
af23f9b5f6
Completely eliminate def&use operands. Now a register operand is EITHER a
...
def operand or a use operand.
llvm-svn: 30109
2006-09-05 02:31:13 +00:00
3852b2ce7e
jmp_bufs are this big on alpha.
...
llvm-svn: 30107
2006-09-05 00:22:25 +00:00
12e97307a1
Completely rearchitect the interface between targets and the pass manager.
...
This pass:
1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
output, move all this to common code, and give targets hooks they can
implement.
3. Commonalize the target population stuff between file emission and JIT
emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
paves the way for "fast -O0" stuff in the CFE later, and now LLC could
lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
which is now orthogonal to the fact that JIT'ing is being done.
llvm-svn: 30081
2006-09-04 04:14:57 +00:00
0fc4541c67
Simplify target construction.
...
llvm-svn: 30070
2006-09-03 18:44:02 +00:00
c3acfc0b10
Do not use getTargetNode() and SelectNodeTo() which takes more than 3
...
SDOperand arguments. Use the variants which take an array and number instead.
llvm-svn: 29907
2006-08-27 08:14:06 +00:00
34b70eea5c
SelectNodeTo now returns a SDNode*.
...
llvm-svn: 29901
2006-08-26 08:00:10 +00:00
61413a3d72
Select() no longer require Result operand by reference.
...
llvm-svn: 29898
2006-08-26 05:34:46 +00:00
ab8297f92d
Match tblgen changes.
...
llvm-svn: 29895
2006-08-26 01:07:58 +00:00
60f1eecd3a
Constify some methods. Patch provided by Anton Vayvod, thanks!
...
llvm-svn: 29756
2006-08-17 22:00:08 +00:00
63d178f473
SelectNodeTo() may return a SDOperand that is different from the input.
...
llvm-svn: 29726
2006-08-16 07:30:09 +00:00
ed728e8dc9
Eliminate use of getNode that takes a vector.
...
llvm-svn: 29614
2006-08-11 17:38:39 +00:00
2aa76cf371
eliminate use of getNode that takes vector<SDOperand>. Wrap a really long line.
...
llvm-svn: 29610
2006-08-11 17:19:54 +00:00
bd1c5a8fb8
Match tablegen changes.
...
llvm-svn: 29604
2006-08-11 09:08:15 +00:00
81b645a76b
CALLSEQ_* produces chain even if that's not needed.
...
llvm-svn: 29603
2006-08-11 09:03:33 +00:00
b9d34bd098
Match tablegen isel changes.
...
llvm-svn: 29549
2006-08-07 22:28:20 +00:00
2af3a67902
Remove a duplicate pattern/
...
llvm-svn: 29413
2006-07-31 18:42:49 +00:00
b572401bea
Remove InFlightSet hack. No longer needed.
...
llvm-svn: 29373
2006-07-28 00:47:19 +00:00
78bf1074fc
Resolve BB references with relocation.
...
llvm-svn: 29351
2006-07-27 18:21:10 +00:00
f6acb34d23
- Refactor the code that resolve basic block references to a TargetJITInfo
...
method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
of code is emitted to flush the icache. This ensures correct execution
on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.
llvm-svn: 29276
2006-07-25 20:40:54 +00:00
c3d341ea98
Ensure that dump calls that are associated with asserts are removed from
...
non-debug build.
llvm-svn: 29105
2006-07-11 17:58:07 +00:00
01078dc60b
These are already implemented
...
llvm-svn: 28990
2006-07-03 18:00:29 +00:00
042f5076ed
0 offsets for memory operands
...
llvm-svn: 28989
2006-07-03 17:57:34 +00:00
a53a22e5fe
this case isn't handled
...
llvm-svn: 28948
2006-06-27 23:19:14 +00:00
680ac12e53
Add memory operand and int regs
...
llvm-svn: 28896
2006-06-21 15:42:36 +00:00
b0316eada6
inline asm, at least for floats
...
llvm-svn: 28895
2006-06-21 13:37:27 +00:00
336313ce3d
fix argument problem
...
llvm-svn: 28893
2006-06-21 01:00:43 +00:00
f3b5b92e58
Don't pass target name into TargetData anymore, it is never used or needed.
...
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.
llvm-svn: 28830
2006-06-16 18:22:52 +00:00
7c69df968c
I am sure I had commited this workaround before. Perhaps soon I should sort it all out
...
llvm-svn: 28772
2006-06-13 20:34:47 +00:00
f570feeae3
It really helps to be returning to the correct place
...
llvm-svn: 28769
2006-06-13 18:27:39 +00:00
80528499cf
Let the alpha breakage begin. First Formals and RET. next Calls
...
llvm-svn: 28753
2006-06-12 18:09:24 +00:00
b47461350c
ignore ordered/unordered for now
...
llvm-svn: 28679
2006-06-04 00:25:51 +00:00
a3add0fea8
Change RET node to include signness information of the return values. i.e.
...
RET chain, value1, sign1, value2, sign2, ...
llvm-svn: 28510
2006-05-26 23:10:12 +00:00
4af59dac0b
Assert if InflightSet is not cleared after instruction selecting a BB.
...
llvm-svn: 28459
2006-05-25 00:24:28 +00:00
1a8e74d113
Clear HandleMap and ReplaceMap after instruction selection. Or it may cause
...
non-deterministic behavior.
llvm-svn: 28454
2006-05-24 20:46:25 +00:00
aa2372562e
Patches to make the LLVM sources more -pedantic clean. Patch provided
...
by Anton Korobeynikov! This is a step towards closing PR786.
llvm-svn: 28447
2006-05-24 17:04:05 +00:00
88812b5c0a
Make all of the TargetMachine subclasses use the new string TargetData methods.
...
This is part of the on-going work on PR 761.
llvm-svn: 28414
2006-05-20 00:24:56 +00:00
b90055ef24
Fix a bogus gcc warning
...
llvm-svn: 28382
2006-05-18 17:29:34 +00:00
305c49579c
getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.
...
llvm-svn: 28378
2006-05-18 00:12:58 +00:00
dcec882286
Remove PointerType from class Target
...
llvm-svn: 28368
2006-05-17 21:20:27 +00:00
0f524f2050
Fix call_adj.ll
...
llvm-svn: 28360
2006-05-17 19:24:49 +00:00
446dbcb5e4
Added sanity check for obviously bogus immediates
...
llvm-svn: 28359
2006-05-17 19:24:31 +00:00
1dc9ec5874
Move this code to a common place
...
llvm-svn: 28329
2006-05-16 17:42:15 +00:00
132322b96e
remove dead variable.
...
llvm-svn: 28258
2006-05-12 18:17:25 +00:00
8c2c1e90c4
Refactor a bunch of includes so that TargetMachine.h doesn't have to include
...
TargetData.h. This should make recompiles a bit faster with my current
TargetData tinkering.
llvm-svn: 28238
2006-05-12 06:33:49 +00:00
8488ba2e41
Split SwitchSection into SwitchTo{Text|Data}Section methods.
...
llvm-svn: 28184
2006-05-09 04:59:56 +00:00
10b71c0d08
Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling.
...
llvm-svn: 28104
2006-05-04 18:05:43 +00:00
10d6341618
Move some methods out of MachineInstr into MachineOperand
...
llvm-svn: 28102
2006-05-04 17:52:23 +00:00
fef7a2d0f5
There shalt be only one "immediate" operand type!
...
llvm-svn: 28099
2006-05-04 17:21:20 +00:00
940cc978ef
Remove a bunch more SparcV9 specific stuff
...
llvm-svn: 28093
2006-05-04 01:15:02 +00:00
6e663f1c1e
Remove some more V9-specific stuff.
...
llvm-svn: 28092
2006-05-04 00:49:59 +00:00
9f6639b64d
Remove some more unused stuff from MachineInstr that was leftover from V9.
...
llvm-svn: 28091
2006-05-04 00:44:25 +00:00
e3a9c70ba0
Change from using MachineRelocation ctors to using static methods
...
in MachineRelocation to create Relocations.
llvm-svn: 28088
2006-05-03 20:30:20 +00:00
1d8ee1fc80
Suck block address tracking out of targets into the JIT Emitter. This
...
simplifies the MachineCodeEmitter interface just a little bit and makes
BasicBlocks work like constant pools and jump tables.
llvm-svn: 28082
2006-05-03 17:10:41 +00:00
20a631fde7
Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
...
This fixes PR 759.
llvm-svn: 28074
2006-05-03 01:29:57 +00:00
0267807ddc
Keep the alpha JIT similar to the PPC/X86 jits
...
llvm-svn: 28068
2006-05-03 00:31:21 +00:00
b8065a9a3a
Several related changes:
...
1. Change several methods in the MachineCodeEmitter class to be pure virtual.
2. Suck emitConstantPool/initJumpTableInfo into startFunction, removing them
from the MachineCodeEmitter interface, and reducing the amount of target-
specific code.
3. Change the JITEmitter so that it allocates constantpools and jump tables
*right* next to the functions that they belong to, instead of in a separate
pool of memory. This makes all memory for a function be contiguous, and
means the JITEmitter only tracks one block of memory now.
llvm-svn: 28065
2006-05-02 23:22:24 +00:00
e1c96369e2
Fix a purely hypothetical problem (for now): emitWord emits in the host
...
byte format. This doesn't work when using the code emitter in a cross target
environment. Since the code emitter is only really used by the JIT, this
isn't a current problem, but if we ever start emitting .o files, it would be.
llvm-svn: 28060
2006-05-02 19:14:47 +00:00
c9aa3715e8
Refactor the machine code emitter interface to pull the pointers for the current
...
code emission location into the base class, instead of being in the derived classes.
This change means that low-level methods like emitByte/emitWord now are no longer
virtual (yaay for speed), and we now have a framework to support growable code
segments. This implements feature request #1 of PR469.
llvm-svn: 28059
2006-05-02 18:27:26 +00:00
b9d4f8324d
Extend printBasicBlockLabel a bit so that it can be used to print all
...
basic block labels, consolidating the code to do so in one place for each
target.
llvm-svn: 28050
2006-05-02 05:37:32 +00:00
4ca2ea5b43
JumpTable support! What this represents is working asm and jit support for
...
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
llvm-svn: 27947
2006-04-22 18:53:45 +00:00
3f9c17906f
Disable switch lowering for targets based on the selection dag isel,
...
letting the code generator handle them directly.
llvm-svn: 27539
2006-04-08 19:46:55 +00:00
cf905223c5
Initialize SDOperand values because the gcc 4.0.2 compiler complains about
...
them.
llvm-svn: 27534
2006-04-08 05:38:03 +00:00
2d7298c362
Foundation for call frame information.
...
llvm-svn: 27491
2006-04-07 16:34:46 +00:00
1596a1b276
This may be overconservative, but it lets the new cfe compile
...
llvm-svn: 27471
2006-04-06 23:18:45 +00:00
cee782d514
fix some linking problems with the new gcc
...
llvm-svn: 27460
2006-04-06 21:26:32 +00:00
df7abf8b74
support x * (c1 + c2) where c1 and c2 are pow2s. special case for c2 == 4
...
llvm-svn: 27370
2006-04-03 04:19:17 +00:00
4e2c073a33
mul by const conversion sequences. more coming soon
...
llvm-svn: 27368
2006-04-03 03:18:59 +00:00
444bdb069a
This makes McCat/12-IOtest go 8x faster or so
...
llvm-svn: 27363
2006-04-02 21:08:39 +00:00
01bd5523a3
This will be needed soon
...
llvm-svn: 27362
2006-04-02 20:13:57 +00:00
d1aa1638c6
Expose base register for DwarfWriter. Refactor code accordingly.
...
llvm-svn: 27225
2006-03-28 13:48:33 +00:00
fa53b276d0
Translate llvm target registers to dwarf register numbers properly.
...
llvm-svn: 27180
2006-03-27 20:18:45 +00:00
5d70a7c4a5
#include Intrinsics.h into all dag isels
...
llvm-svn: 27109
2006-03-25 06:47:10 +00:00
f0729b4067
Add dwarf register numbering to register data.
...
llvm-svn: 27081
2006-03-24 21:15:58 +00:00
3c43609f1f
Add support to locate local variables in frames (early version.)
...
llvm-svn: 26994
2006-03-23 18:12:57 +00:00
6f95ab7abb
Eliminate IntrinsicLowering from TargetMachine.
...
Make the CBE and V9 backends create their own, since they're the only ones that use it.
llvm-svn: 26974
2006-03-23 05:43:16 +00:00
bb01d4f272
Remove BRTWOWAY*
...
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.
llvm-svn: 26814
2006-03-17 01:40:33 +00:00
43e569c95f
these are copies too
...
llvm-svn: 26653
2006-03-09 18:18:51 +00:00
7e7dccd3ab
remove some now-dead code
...
llvm-svn: 26652
2006-03-09 18:07:49 +00:00
70236fc12f
fcopysign for mixed mode
...
llvm-svn: 26651
2006-03-09 17:56:33 +00:00
4a87e7d9a3
alpha and llvm have different oppinions on which arg is the sign bit
...
llvm-svn: 26647
2006-03-09 17:41:50 +00:00
16b96d2cb4
Alpha Scheduling classes
...
llvm-svn: 26643
2006-03-09 17:16:45 +00:00
ed7a293b44
fcopysign and get rid of dsnode cruft. custom PA runtimes make this better in some senses
...
llvm-svn: 26641
2006-03-09 14:58:25 +00:00
e363fdf318
Add support for 'special' llvm globals like debug info and static ctors/dtors.
...
llvm-svn: 26628
2006-03-09 06:14:35 +00:00
9c7f50376a
Copysign needs to be expanded everywhere. Note that Alpha and IA64 should
...
implement copysign as a native op if they have it.
llvm-svn: 26541
2006-03-05 05:08:37 +00:00
8f2c1021b4
Removed dependency on how operands are printed (want multi-line.)
...
llvm-svn: 26399
2006-02-27 10:29:04 +00:00
a438ef0ee7
improved zap discovery
...
llvm-svn: 26148
2006-02-13 18:52:29 +00:00
62c3484e43
Switch targets over to using SelectionDAG::getCALLSEQ_START to create
...
CALLSEQ_START nodes.
llvm-svn: 26143
2006-02-13 09:00:43 +00:00
d1b82d8db0
Match getTargetNode() changes (now return SDNode* instead of SDOperand).
...
llvm-svn: 26085
2006-02-09 07:17:49 +00:00
6dc90ca172
Change Select() from
...
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);
llvm-svn: 26067
2006-02-09 00:37:58 +00:00
f5b7f16259
see what this allignment thing will do
...
llvm-svn: 26017
2006-02-06 17:15:17 +00:00
54cb1833a4
Use SelectRoot() as entry of any tblgen based isel.
...
llvm-svn: 25997
2006-02-05 06:46:41 +00:00
1fcff15f86
linkage fix for weak functions
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llvm-svn: 25976
2006-02-04 19:13:09 +00:00
1318240fd0
isStoreToStackSlot
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llvm-svn: 25925
2006-02-03 03:07:37 +00:00
bb53acd03c
Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
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llvm-svn: 25913
2006-02-02 20:12:32 +00:00
4b1c726fbb
Add immediate forms of cmov and remove some cruft
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llvm-svn: 25882
2006-02-01 19:37:33 +00:00
7e7f439f85
Fix some of the stuff in the PPC README file, and clean up legalization
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of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.
llvm-svn: 25875
2006-02-01 07:19:44 +00:00
32be2dc0af
Allow the specification of explicit alignments for constant pool entries.
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llvm-svn: 25855
2006-01-31 22:23:14 +00:00
b5f0ba6051
Update alpha to reflect recent constantfp legalize changes. It's not clear
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why all this code isn't autogenerated. :(
llvm-svn: 25770
2006-01-29 06:25:22 +00:00
1b09c6ba87
cmovle != cmovlt
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llvm-svn: 25761
2006-01-29 03:47:30 +00:00
595ec734fc
Implement Promote for VAARG, and allow it to be custom promoted for people
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who don't want the default behavior (Alpha).
llvm-svn: 25726
2006-01-28 03:14:31 +00:00
2c00db82bd
Switch to AlphaISD::CALL instead of ISD::CALL
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llvm-svn: 25718
2006-01-27 23:39:00 +00:00
d98701c639
Subtarget feature can now set any variable to any value
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llvm-svn: 25678
2006-01-27 08:09:42 +00:00
1240574609
PHI and INLINEASM are now built-in instructions provided by Target.td
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llvm-svn: 25674
2006-01-27 01:46:15 +00:00
0a01374299
minor renaming
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llvm-svn: 25640
2006-01-26 03:24:15 +00:00
153f808f53
allow R28 to be used for frame calculations without entirely removing it from circulation
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llvm-svn: 25639
2006-01-26 03:22:07 +00:00
5c3dd5fafd
oops
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llvm-svn: 25623
2006-01-25 23:33:32 +00:00
a852660e74
forgot one
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llvm-svn: 25620
2006-01-25 22:28:07 +00:00
93fd315292
make things compile again
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llvm-svn: 25614
2006-01-25 21:54:38 +00:00
e74795cd70
First part of bug 680:
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Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.
llvm-svn: 25606
2006-01-25 18:21:52 +00:00
94150f0666
maintaining stackpointer alignment. Perhaps it doesn't matter
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llvm-svn: 25592
2006-01-25 01:51:08 +00:00
c0bf377f98
bye bye Pattern ISEL
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llvm-svn: 25553
2006-01-23 21:56:07 +00:00
fef7dec9cc
added stores to lsmark
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llvm-svn: 25552
2006-01-23 21:51:33 +00:00
208bbe9ca9
fix up more lsmark stuff
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llvm-svn: 25550
2006-01-23 21:23:26 +00:00
ba97ea52d4
yea, lowering this stuff will basically work
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llvm-svn: 25549
2006-01-23 20:59:50 +00:00
de02d7727f
Add explicit #includes of <iostream>
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llvm-svn: 25515
2006-01-22 23:41:00 +00:00
5df67bcd50
typo
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llvm-svn: 25464
2006-01-19 21:10:38 +00:00
688ea707d8
nasty nasty patterns
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llvm-svn: 25463
2006-01-19 20:49:37 +00:00
cfd9c6e526
fix short immediate loads
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llvm-svn: 25371
2006-01-16 21:41:39 +00:00
34380b7675
stack and rpcc
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llvm-svn: 25369
2006-01-16 21:22:38 +00:00
81b108c54d
Friendly names
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llvm-svn: 25364
2006-01-16 19:53:25 +00:00
2fba8a3aaa
bswap implementation
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llvm-svn: 25312
2006-01-14 03:14:10 +00:00
045371a744
make DAG isel the default
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llvm-svn: 25282
2006-01-13 18:49:47 +00:00
8e2f52e645
expand unsupported stacksave/stackrestore nodes
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llvm-svn: 25272
2006-01-13 02:42:53 +00:00
1b8121b227
Add bswap, rotl, and rotr nodes
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Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl
Targets should add rotl/rotr patterns if they have them
llvm-svn: 25222
2006-01-11 21:21:00 +00:00
91eda00a7a
this pattern was bogus
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llvm-svn: 25197
2006-01-11 03:33:06 +00:00
599e73f21c
Int immediate loading fix
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llvm-svn: 25182
2006-01-10 19:12:47 +00:00
32e7d1ed4a
proper branch not equal sequence
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llvm-svn: 25159
2006-01-09 19:49:58 +00:00
346b4120af
make 0 codegen much better
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llvm-svn: 25131
2006-01-06 19:41:51 +00:00
da56ae98a9
unbreak the build, these are now in TargetSelectionDAG.td
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llvm-svn: 25109
2006-01-05 04:48:15 +00:00
deeafa0f00
Had expand logic backward.
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llvm-svn: 25105
2006-01-05 01:47:43 +00:00
762e9ec06c
Added initial support for DEBUG_LABEL allowing debug specific labels to be
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inserted in the code.
llvm-svn: 25104
2006-01-05 01:25:28 +00:00
eaf5ed1438
typeo
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llvm-svn: 25060
2006-01-02 21:15:53 +00:00
38e0b281da
Remove a 'using namespace std'.
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llvm-svn: 25059
2006-01-01 22:20:31 +00:00
6bec63aac9
Move brcond over and fix some imm patterns. This may be the last change before changing the default alpha isel.
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llvm-svn: 25057
2006-01-01 22:16:14 +00:00
f0545f7c48
clean this function up some
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llvm-svn: 25055
2006-01-01 22:13:54 +00:00
60ab61fcfc
improve constant loading. Still sucks, but oh well
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llvm-svn: 25047
2005-12-30 02:30:02 +00:00
50d9caf6a4
let us get some do what I meant not what I said stuff checked in. You would think the alpha backend would be 64bit clean
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llvm-svn: 25040
2005-12-29 01:06:12 +00:00
34e4782c95
Fix up immediate handling
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llvm-svn: 25039
2005-12-29 00:50:08 +00:00
5bd1c2783b
Restore some happiness to the JIT
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llvm-svn: 25026
2005-12-27 06:25:50 +00:00
962dcbd572
Fix alpha regressions.
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llvm-svn: 25025
2005-12-27 03:53:58 +00:00
14c53b45f5
Added field noResults to Instruction.
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Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.
llvm-svn: 25017
2005-12-26 09:11:45 +00:00
f520093eb3
add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG
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llvm-svn: 25011
2005-12-25 17:36:48 +00:00
0fce613eff
All that just to lower div and rem
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llvm-svn: 25008
2005-12-25 01:34:27 +00:00
5b18ed9e60
All addressing modes are now exposed. The only remaining relocated forms
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are for function prologue.
TODO: move external symbols over to using RelLit.
: have a pattern that matches constpool|globaladdr
: have a pattern that matches (add x imm) -> x, imm or (...) -> ..., 0
llvm-svn: 25003
2005-12-24 08:29:32 +00:00
b9aaea3564
Unify the patterns for loads and stores. Now offset addressing should be
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supported. This almost completes memory operations.
llvm-svn: 25002
2005-12-24 07:34:33 +00:00
4621488965
Let's see if we can break things.
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Lower GOT relative addresses to Lo and HI.
Update both ISels to select them when they can.
Saves instructions here and there.
llvm-svn: 25001
2005-12-24 05:36:33 +00:00
636e1aed43
move loads and stores over. Smart addr selection comming
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llvm-svn: 25000
2005-12-24 03:41:56 +00:00
177d7af5d5
remove dead code
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llvm-svn: 24965
2005-12-22 21:16:08 +00:00
Dan Gohman