Commit Graph

2846 Commits

Author SHA1 Message Date
Justin Lebar 066494d8c1 [CUDA] Print an error if you try to compile with < sm_30 on CUDA 9.
Summary:
CUDA 9's minimum sm is sm_30.

Ideally we should also make sm_30 the default when compiling with CUDA
9, but that seems harder than it should be.

Subscribers: sanjoy

Differential Revision: https://reviews.llvm.org/D39109

llvm-svn: 316611
2017-10-25 21:32:06 +00:00
Craig Topper 009cebfed8 [X86] Add avx512vpopcntdq to Knights Mill
As indicated by Table 1-1 in Intel Architecture Instruction Set Extensions and Future Features Programming Reference from October 2017.

llvm-svn: 316593
2017-10-25 17:10:58 +00:00
Erich Keane 9ec60988cd Pull X86 "CPUKind" checking into .cpp file. [NFC]
Preparing to do a refactor of CPU/feature checking, this
patch pulls the one CPU implementation from the .h file
to the .cpp file.

llvm-svn: 316338
2017-10-23 16:20:15 +00:00
Saleem Abdulrasool e5696580aa Basic: restore {,u}intptr_t on NetBSD/ARM
NetBSD uses `long int` for `intptr_t` on ARM.  This was changed in SVN
r316046, referenced against other compilers.  However, NetBSD's
reference was incorrect as the current clang behaviour is more
up-to-date.  Restore the original behaviour for that target.

llvm-svn: 316204
2017-10-20 04:11:28 +00:00
Jan Vesely cda72c9c3c AMDGPU: Parse r600 CPU name early and expose FMAF capability
Improve amdgcn macro test
Differential Revision: https://reviews.llvm.org/D38667

llvm-svn: 316181
2017-10-19 20:40:13 +00:00
Sumanth Gundapaneni 57098f5ac3 [Hexagon] Handling of new HVX flags and target-features
This patch has the following changes
A new flag "-mhvx-length={64B|128B}" is introduced to specify the length of the vector.
Previously we have used "-mhvx-double" for 128 Bytes. This adds the target-feature "+hvx-length{64|128}b"

The "-mhvx" flag must be provided on command line to enable HVX for Hexagon. If no -mhvx-length flag
is specified, a default length is picked from the arch mentioned in this priority order from either -mhvx=vxx
or -mcpu. For v60 and v62 the default length is 64 Byte. For unknown versions, the length is 128 Byte. The 
-mhvx flag adds the target-feature "+hvxv{hvx_version}"

The 64 Byte mode is soon going to be deprecated. A warning is emitted if 64 Byte is enabled. A warning is
still emitted for the default 64 Byte as well. This warning can be suppressed with a -Wno flag.

The "-mhvx-double" and "-mno-hvx-double" flags are deprecated. A warning is emitted if the driver sees
them on commandline. "-mhvx-double" is an alias to "-mhvx-length=128B"

The compilation will error out if -mhvx-length is specified with out an -mhvx/-mhvx= flag

The macro HVX_LENGTH is defined and is set to the length of the vector. 
Eg: #define HVX_LENGTH 64

The macro HVX_ARCH is defined and is set to the version of the HVX. 
Eg: #define HVX_ARCH 62

Differential Revision: https://reviews.llvm.org/D38852

llvm-svn: 316102
2017-10-18 18:10:13 +00:00
Saleem Abdulrasool 8d799f8ef9 Basic: fix __{,U}INTPTR_TYPE__ on ARM
Darwin and OpenBSD are the only platforms which use `long int` for
`__INTPTR_TYPE__`.  The other platforms use `int` in 32-bit, and `long
int` on 64-bit (except for VMS and Windows which are LLP64).  Adjust the
type definitions to match the platform definitions.  We now generate the
same definition as GCC on all the targets.

llvm-svn: 316046
2017-10-18 00:00:50 +00:00
Saleem Abdulrasool f78f7c05d4 Basic: fix `__INTPTR_TYPE__` for Windows ARM
The `IntPtrType` for Windows ARM should be `int` as per MSVC.  Adjust
the type accordingly.

llvm-svn: 316042
2017-10-17 22:49:53 +00:00
Jonas Hahnfeld 23604a8399 [OpenMP] Implement omp_is_initial_device() as builtin
This allows to return the static value that we know at compile time.

Differential Revision: https://reviews.llvm.org/D38968

llvm-svn: 316001
2017-10-17 14:28:14 +00:00
Alex Lorenz f5ca27cc37 [refactor] allow the use of refactoring diagnostics
This commit allows the refactoring library to use its own set of
refactoring-specific diagnostics to reports things like initiation errors.

Differential Revision: https://reviews.llvm.org/D38772

llvm-svn: 315924
2017-10-16 18:28:26 +00:00
Alexander Richardson 6d989436d0 Convert clang::LangAS to a strongly typed enum
Summary:
Convert clang::LangAS to a strongly typed enum

Currently both clang AST address spaces and target specific address spaces
are represented as unsigned which can lead to subtle errors if the wrong
type is passed. It is especially confusing in the CodeGen files as it is
not possible to see what kind of address space should be passed to a
function without looking at the implementation.
I originally made this change for our LLVM fork for the CHERI architecture
where we make extensive use of address spaces to differentiate between
capabilities and pointers. When merging the upstream changes I usually
run into some test failures or runtime crashes because the wrong kind of
address space is passed to a function. By converting the LangAS enum to a
C++11 we can catch these errors at compile time. Additionally, it is now
obvious from the function signature which kind of address space it expects.

I found the following errors while writing this patch:

- ItaniumRecordLayoutBuilder::LayoutField was passing a clang AST address
  space to  TargetInfo::getPointer{Width,Align}()
- TypePrinter::printAttributedAfter() prints the numeric value of the
  clang AST address space instead of the target address space.
  However, this code is not used so I kept the current behaviour
- initializeForBlockHeader() in CGBlocks.cpp was passing
  LangAS::opencl_generic to TargetInfo::getPointer{Width,Align}()
- CodeGenFunction::EmitBlockLiteral() was passing a AST address space to
  TargetInfo::getPointerWidth()
- CGOpenMPRuntimeNVPTX::translateParameter() passed a target address space
  to Qualifiers::addAddressSpace()
- CGOpenMPRuntimeNVPTX::getParameterAddress() was using
  llvm::Type::getPointerTo() with a AST address space
- clang_getAddressSpace() returns either a LangAS or a target address
  space. As this is exposed to C I have kept the current behaviour and
  added a comment stating that it is probably not correct.

Other than this the patch should not cause any functional changes.

Reviewers: yaxunl, pcc, bader

Reviewed By: yaxunl, bader

Subscribers: jlebar, jholewinski, nhaehnle, Anastasia, cfe-commits

Differential Revision: https://reviews.llvm.org/D38816

llvm-svn: 315871
2017-10-15 18:48:14 +00:00
Craig Topper f8c10aa3a3 [X86] Add skeleton support for knm cpu
This adds support Knights Mill CPU. Preprocessor defines match gcc's implementation.

Differential Revision: https://reviews.llvm.org/D38813

llvm-svn: 315723
2017-10-13 18:14:24 +00:00
Yaxun Liu b7318e02c1 [OpenCL] Add LangAS::opencl_private to represent private address space in AST
Currently Clang uses default address space (0) to represent private address space for OpenCL
in AST. There are two issues with this:

Multiple address spaces including private address space cannot be diagnosed.
There is no mangling for default address space. For example, if private int* is emitted as
i32 addrspace(5)* in IR. It is supposed to be mangled as PUAS5i but it is mangled as
Pi instead.

This patch attempts to represent OpenCL private address space explicitly in AST. It adds
a new enum LangAS::opencl_private and adds it to the variable types which are implicitly
private:

automatic variables without address space qualifier

function parameter

pointee type without address space qualifier (OpenCL 1.2 and below)

Differential Revision: https://reviews.llvm.org/D35082

llvm-svn: 315668
2017-10-13 03:37:48 +00:00
Martin Storsjo d8a44ed74c [COFF, ARM64] Add MS builtins __dmb, __dsb, __isb
Differential Revision: https://reviews.llvm.org/D38821

llvm-svn: 315567
2017-10-12 07:05:37 +00:00
Craig Topper 8c8e83a15f [X86] Add support for 'amdfam17h' to __builtin_cpu_is to match gcc.
The compiler-rt implementation already supported it, it just wasn't exposed.

llvm-svn: 315517
2017-10-11 21:42:02 +00:00
Peter Collingbourne 0dfdb44797 Support: Have directory_iterator::status() return FindFirstFileEx/FindNextFile results on Windows.
This allows clients to avoid an unnecessary fs::status() call on each
directory entry. Because the information returned by FindFirstFileEx
is a subset of the information returned by a regular status() call,
I needed to extract a base class from file_status that contains only
that information.

On my machine, this reduces the time required to enumerate a ThinLTO
cache directory containing 520k files from almost 4 minutes to less
than 2 seconds.

Differential Revision: https://reviews.llvm.org/D38716

llvm-svn: 315378
2017-10-10 22:19:46 +00:00
Saleem Abdulrasool 729379a1e1 Driver: hoist the `wchar_t` handling to the driver
Move the logic for determining the `wchar_t` type information into the
driver.  Rather than passing the single bit of information of
`-fshort-wchar` indicate to the frontend the desired type of `wchar_t`
through a new `-cc1` option of `-fwchar-type` and indicate the
signedness through `-f{,no-}signed-wchar`.  This replicates the current
logic which was spread throughout Basic into the
`RenderCharacterOptions`.

Most of the changes to the tests are to ensure that the frontend uses
the correct type.  Add a new test set under `test/Driver/wchar_t.c` to
ensure that we calculate the proper types for the various cases.

llvm-svn: 315126
2017-10-06 23:09:55 +00:00
Carlo Bertolli ba1487ba69 [OpenMP] Initial implementation of teams distribute code generation
https://reviews.llvm.org/D38371

This patch implements codegen for the combined 'teams distribute" OpenMP pragma and adds regression tests for all its clauses.

llvm-svn: 314905
2017-10-04 14:12:09 +00:00
Walter Lee fc7f8f25f3 Add support for Myriad ma2x8x series of CPUs
Summary:
Also:
- Add support for some older Myriad CPUs that were missing.
- Fix some incorrect compiler defines for exisitng CPUs.

Reviewers: jyknight

Subscribers: fedor.sergeev

Differential Revision: https://reviews.llvm.org/D37551

llvm-svn: 314706
2017-10-02 18:50:57 +00:00
Yaxun Liu 304f349770 [AMDGPU] Allow flexible register names in inline asm constraints
Currently AMDGPU inline asm only allow v and s as register names in constraints.

This patch allows the following register names in constraints: (n, m is unsigned integer, n < m)

v

s

{vn} or {v[n]}

{sn} or {s[n]}

{S} , where S is a special register name

{v[n:m]}

{s[n:m]}

Differential Revision: https://reviews.llvm.org/D37568

llvm-svn: 314452
2017-09-28 19:07:59 +00:00
Davide Italiano 64094f8621 [Targets/X86] Remove unneded `return` in setMaxAtomicWidth(). NFCI.
llvm-svn: 314367
2017-09-28 00:24:20 +00:00
Dylan McKay 74d1e8683c [AVR] Update data layout to match current LLVM trunk
The data layout was changed in r314179 to fix atomic loads and stores.

llvm-svn: 314354
2017-09-27 22:09:01 +00:00
Saleem Abdulrasool 4d321336d0 Basic: support Preserve{Most,All} CC on Windows
Add support for the `preserve_mostcc` and `preserve_allcc` on Windows
x86_64 and AArch64.  This is used by Swift.

llvm-svn: 314236
2017-09-26 19:26:01 +00:00
Vlad Tsyrklevich 2eccdab308 Allow specifying sanitizers in blacklists
Summary:
This is the follow-up patch to D37924.

This change refactors clang to use the the newly added section headers
in SpecialCaseList to specify which sanitizers blacklists entries
should apply to, like so:

  [cfi-vcall]
  fun:*bad_vcall*
  [cfi-derived-cast|cfi-unrelated-cast]
  fun:*bad_cast*

The SanitizerSpecialCaseList class has been added to allow querying by
SanitizerMask, and SanitizerBlacklist and its downstream users have been
updated to provide that information. Old blacklists not using sections
will continue to function identically since the blacklist entries will
be placed into a '[*]' section by default matching against all
sanitizers.

Reviewers: pcc, kcc, eugenis, vsk

Reviewed By: eugenis

Subscribers: dberris, cfe-commits, mgorny

Differential Revision: https://reviews.llvm.org/D37925

llvm-svn: 314171
2017-09-25 22:11:12 +00:00
Michael Zuckerman 35731a0b84 [Clang] Adding missing feature to goldmont
Change-Id: I6c22478d16b8e02ce60dae2f8c80d43bc5ab3a9c
llvm-svn: 314104
2017-09-25 13:49:32 +00:00
Wei Mi b086289787 [Atomic][X8664] set max atomic inline width according to the target
This is to fix PR31620. MaxAtomicInlineWidth is set to 128 for x86_64. However
for target without cx16 support, 128 atomic operation will generate __sync_*
libcalls. The patch set MaxAtomicInlineWidth to 64 if the target doesn't support
cx16.

Differential Revision: https://reviews.llvm.org/D38046

llvm-svn: 313992
2017-09-22 16:30:00 +00:00
Gabor Horvath e350b0a196 Add Cross Translation Unit support library
This patch introduces a class that can help to build tools that require cross
translation unit facilities. This class allows function definitions to be loaded
from external AST files based on an index. In order to use this functionality an
index is required. The index format is a flat text file but it might be
replaced with a different solution in the near future. USRs are used as names to
look up the functions definitions. This class also does caching to avoid
redundant loading of AST files.

Right now only function defnitions can be loaded using this API because this is
what the in progress cross translation unit feature of the Static Analyzer
requires. In to future this might be extended to classes, types etc.

Differential Revision: https://reviews.llvm.org/D34512

llvm-svn: 313975
2017-09-22 11:11:01 +00:00
Craig Topper a98e1e214d [X86] Move even more of our CPU to feature mapping switch to use fallthroughs
This arranges more of the Intel and AMD CPUs into fallthrough positions based on their features. We may be able to merge this new AMD set with the BTVER or BDVER sets but I didn't look that closely.

Differential Revision: https://reviews.llvm.org/D37941

llvm-svn: 313497
2017-09-17 19:05:46 +00:00
Craig Topper 19a0a3ab68 [X86] Remove unnecessary extra encodings from the CPU name enum in clang
Summary:
For a lot of older CPUs we have a 1:1 mapping between CPU name and enum name. But many of them are effectively aliases of each other and as a result are always repeated together at every usage

This patch removes most of the duplication. It also uses StringSwitch::Cases to make the many to one mapping in the StringSwitch more obvious.

Reviewers: RKSimon, spatel, zvi, igorb

Reviewed By: RKSimon

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D37938

llvm-svn: 313462
2017-09-16 16:44:39 +00:00
Douglas Gregor f0b11de279 [Module map] Introduce a private module re-export directive.
Introduce a new "export_as" directive for top-level modules, which
indicates that the current module is a "private" module whose symbols
will eventually be exported through the named "public" module. This is
in support of a common pattern in the Darwin ecosystem where a single
public framework is constructed of several private frameworks, with
(currently) header duplication and some support from the linker.

Addresses rdar://problem/34438420.

llvm-svn: 313316
2017-09-14 23:38:44 +00:00
Yaxun Liu e37793545e [AMDGPU] Change addr space of clk_event_t, queue_t and reserve_id_t to global
Differential Revision: https://reviews.llvm.org/D37703

llvm-svn: 313171
2017-09-13 18:50:42 +00:00
MinSeong Kim 7c2556a895 [Basic] Update CMakeLists.txt to handle repo
Summary:
The find_first_existing_file and find_first_existing_vc_file macros in
lib/Basic/CMakeLists.txt are removed. The macros are also defined in
{LLVM}/cmake/modules/AddLLVM.cmake for the same purpose. This change
serves the following 2 objectives:

    1. To remove the redundant code in clang to use the same
       macros in llvm,
    2. The macros in AddLLVM.cmake can also handle repo for
       displaying correct version information.

Reviewers: jordan_rose, cfe-commits, modocache, hintonda

Reviewed By: hintonda

Subscribers: mgorny

Differential Revision: https://reviews.llvm.org/D35533

llvm-svn: 312865
2017-09-09 14:18:53 +00:00
Richard Smith 6d9bc278ef Fix ownership of the MemoryBuffer in a FrontendInputFile.
This fixes a possible crash on certain kinds of corrupted AST file, but
checking in an AST file corrupted in just the right way will be a maintenance
nightmare because the format changes frequently.

llvm-svn: 312851
2017-09-09 01:14:04 +00:00
Jan Vesely 31ecb4bf60 [OpenCL] Add half load and store builtins
This enables load/stores of half type, without half being a legal type.

Differential Revision: https://reviews.llvm.org/D37231

llvm-svn: 312742
2017-09-07 19:39:10 +00:00
Artem Belevich 8af4e23d1e [CUDA] Added rudimentary support for CUDA-9 and sm_70.
For now CUDA-9 is not included in the list of CUDA versions clang
searches for, so the path to CUDA-9 must be explicitly passed
via --cuda-path=.

On LLVM side NVPTX added sm_70 GPU type which bumps required
PTX version to 6.0, but otherwise is equivalent to sm_62 at the moment.

Differential Revision: https://reviews.llvm.org/D37576

llvm-svn: 312734
2017-09-07 18:14:32 +00:00
Erich Keane 0a539b5859 Change Diagnostic Category size error from runtime to compiletime
Diagnostic Categories are fairly annoying, and are only enforced
by a runtime-debug-only assert. This puts in a touch more work
to get this all done at compile-time with static asserts

Differential Revision: https://reviews.llvm.org/D37122

llvm-svn: 311905
2017-08-28 18:53:17 +00:00
Alex Lorenz d0e27266d8 [Basic] Add a DiagnosticError llvm::ErrorInfo subclass
Clang's DiagnosticError is an llvm::Error payload that stores a partial
diagnostic and its location. I'll be using it in the refactoring engine.

Differential Revision: https://reviews.llvm.org/D36969

llvm-svn: 311778
2017-08-25 15:48:00 +00:00
Petar Jovanovic 5076511ed6 [mips] Introducing option -mabs=[legacy/2008]
In patch r205628 using abs.[ds] instruction is forced, as they should behave
in accordance with flags Has2008 and ABS2008. Unfortunately for revisions
prior mips32r6 and mips64r6, abs.[ds] is not generating correct result when
working with NaNs. To generate a sequence which always produce a correct
result but also to allow user more control on how his code is compiled,
option -mabs is added where user can choose legacy or 2008.
By default legacy mode is used on revisions prior R6. Mips32r6 and mips64r6
use abs2008 mode by default.

Patch by Aleksandar Beserminji

Differential Revision: https://reviews.llvm.org/D35982

llvm-svn: 311669
2017-08-24 16:06:30 +00:00
Coby Tayree 7b49dc9c68 [Clang][x86][Inline Asm] support for GCC style inline asm - Y<x> constraints
This patch is intended to enable the use of basic double letter constraints used in GCC extended inline asm {Yi Y2 Yz Y0 Ym Yt}.
Supersedes D35205
llvm counterpart: D36369

Differential Revision: https://reviews.llvm.org/D36371

llvm-svn: 311643
2017-08-24 09:07:34 +00:00
Yonghong Song c4ea1010c1 bpf: add -mcpu=# support for bpf
-mcpu=# will support:
  . generic: the default insn set
  . v1: insn set version 1, the same as generic
  . v2: insn set version 2, version 1 + additional jmp insns
  . probe: the compiler will probe the underlying kernel to
           decide proper version of insn set.

Examples:
$ clang -target bpf -mcpu=v1 -c t.c
$ clang -target bpf -mcpu=v2 -c t.c
$ clang -target bpf -mcpu=generic -c t.c
$ clang -target bpf -mcpu=probe -c t.c
$ clang -target bpf -mcpu=v3 -c t.c
error: unknown target CPU 'v3'

Signed-off-by: Yonghong Song <yhs@fb.com>
Acked-by: Alexei Starovoitov <ast@kernel.org>
llvm-svn: 311523
2017-08-23 04:26:17 +00:00
Petar Jovanovic 9d1c094670 [mips] Rename getSupportedNanEncoding() to getIEEE754Standard()
Rename the function getSupportedNanEncoding() to getIEEE754Standard(), since
this function will be used for non-nan related features.

Patch by Aleksandar Beserminji.

Differential Revision: https://reviews.llvm.org/D36824

llvm-svn: 311454
2017-08-22 13:35:27 +00:00
Konstantin Zhuravlyov a42719406f AMDGPU: add missing amdgcn processors and tests
- gfx600
  - gfx601
  - gfx703
  - gfx902
  - gfx903

Differential Revision: https://reviews.llvm.org/D36771

llvm-svn: 311141
2017-08-18 01:13:39 +00:00
Sven van Haastregt efb4d4c78c [OpenCL] Allow targets to select address space per type
Generalize getOpenCLImageAddrSpace into getOpenCLTypeAddrSpace, such
that targets can select the address space per type.

No functional changes intended.

Initial patch by Simon Perretta.

Differential Revision: https://reviews.llvm.org/D33989

llvm-svn: 310911
2017-08-15 09:38:18 +00:00
Richard Smith 6c74e32139 [c++2a] Treat 'concept' and 'requires' as keywords, add compat warning for C++17 and before.
llvm-svn: 310803
2017-08-13 21:32:33 +00:00
Martin Storsjo 31cac7a67c [AArch64] Add support for a MinGW AArch64 target
Differential Revision: https://reviews.llvm.org/D36364

llvm-svn: 310798
2017-08-13 19:42:17 +00:00
Stefan Maksimovic 76391b101d Revert r310057
Bring back changes which r304953 introduced since
they were in fact not the cause of failures described
in r310057 commit message.

llvm-svn: 310702
2017-08-11 11:03:54 +00:00
Craig Topper 699ae0c173 [X86] Implement __builtin_cpu_is
This patch adds support for __builtin_cpu_is. I've tried to match the strings supported to the latest version of gcc.

Differential Revision: https://reviews.llvm.org/D35449

llvm-svn: 310657
2017-08-10 20:28:30 +00:00
Craig Topper 41a550ccfa [X86] Support 'avx5124vnniw' and 'avx5124fmaps' for __builtin_cpu_supports.
They still need to be implemented in the intrinsics, the command line, and the backend. But this change isn't dependent on any of that and resolves a TODO.

llvm-svn: 310386
2017-08-08 17:43:44 +00:00
Martin Storsjo c85d26b0f3 [AArch64] Ignore stdcall and similar on aarch64/windows
This is similar to what's done on arm and x86_64, where
these calling conventions are silently ignored, as in
SVN r245076.

Differential Revision: https://reviews.llvm.org/D36105

llvm-svn: 310303
2017-08-07 20:52:04 +00:00
Yaxun Liu 39195062c2 Add OpenCL 2.0 atomic builtin functions as Clang builtin
OpenCL 2.0 atomic builtin functions have a scope argument which is ideally
represented as synchronization scope argument in LLVM atomic instructions.

Clang supports translating Clang atomic builtin functions to LLVM atomic
instructions. However it currently does not support synchronization scope
of LLVM atomic instructions. Without this, users have to use LLVM assembly
code to implement OpenCL atomic builtin functions.

This patch adds OpenCL 2.0 atomic builtin functions as Clang builtin
functions, which supports generating LLVM atomic instructions with
synchronization scope operand.

Currently only constant memory scope argument is supported. Support of
non-constant memory scope argument will be added later.

Differential Revision: https://reviews.llvm.org/D28691

llvm-svn: 310082
2017-08-04 18:16:31 +00:00