b22310fda6
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
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llvm-svn: 150878
2012-02-18 12:03:15 +00:00
cc91b7a3f6
Pass sret arguments through the stack instead of through registers in Sparc backend. It makes the code generated more compliant with the sparc32 ABI.
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llvm-svn: 124030
2011-01-22 13:05:16 +00:00
c386f8a1f6
SPARC backend: Modified LowerCall and LowerFormalArguments so that they use CallingConv assignments.
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llvm-svn: 123749
2011-01-18 06:09:55 +00:00
58deb69040
Fix a thinko and unbreak sparc default CC
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llvm-svn: 57368
2008-10-10 21:47:37 +00:00
f8a4a0e959
Extend set of return registers on sparc until someone will implement MRV support there. At least, this will allow libgcc compile, however we are not ABI-compatible with stuff compiled with native gcc.
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llvm-svn: 57364
2008-10-10 20:30:14 +00:00
7d4152bda6
Check in some #ifdef'd out code switching call argument
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lowering over to SparcCallingConv.td. We can't make the switch
yet because we can't say to pass f64 registers in 2 x i32 registers
with the td file yet.
llvm-svn: 48449
2008-03-17 06:58:37 +00:00
49b269d780
Start moving sparc to use SparcCallingConv.td, switching over
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return lowering first. This fixes a bug where the top and bottom
of i64 values were returned in the wrong registers before.
llvm-svn: 48443
2008-03-17 05:41:48 +00:00
Jia Liu