Commit Graph

9882 Commits

Author SHA1 Message Date
Reid Kleckner f5b76518c9 Implement inalloca codegen for x86 with the new inalloca design
Calls with inalloca are lowered by skipping all stores for arguments
passed in memory and the initial stack adjustment to allocate argument
memory.

Now the frontend is responsible for the memory layout, and the backend
doesn't have to do any work.  As a result these changes are pretty
minimal.

Reviewers: echristo

Differential Revision: http://llvm-reviews.chandlerc.com/D2637

llvm-svn: 200596
2014-01-31 23:50:57 +00:00
Reid Kleckner dfbed59cc2 Don't put non-static allocas in the static alloca map
Allocas marked inalloca are never static, but we were trying to put them
into the static alloca map if they were in the entry block.  Also add an
assertion in x86 fastisel.

llvm-svn: 200593
2014-01-31 23:45:12 +00:00
Lang Hames 5ec150c967 Replace X86 FMA intrinsic pseduo-instructions with def pats.
It looks like these pseudos were only used for pattern matching. Def pats are
the appropriate way to do that. As a bonus, these intrinsics will now have
memory operands folded properly, and better FMA3 variants selected where
appropriate (see r199933).

<rdar://problem/15611947>

llvm-svn: 200577
2014-01-31 21:29:19 +00:00
Reid Kleckner c5d9e159eb x86: Rename NumBytesForCalleeToPush to ...Pop for accuracy
If we have a callee cleanup convention, the callee is going to pop the
arguments off the stack, not push them on.

llvm-svn: 200566
2014-01-31 19:07:18 +00:00
Reid Kleckner 1c843228f8 [ms-cxxabi] Add a new calling convention that swaps 'this' and 'sret'
MSVC always places the 'this' parameter for a method first.  The
implicit 'sret' pointer for methods always comes second.  We already
implement this for __thiscall by putting sret parameters on the stack,
but __cdecl methods require putting both parameters on the stack in
opposite order.

Using a special calling convention allows frontends to keep the sret
parameter first, which avoids breaking lots of assumptions in LLVM and
Clang.

Fixes PR15768 with the corresponding change in Clang.

Reviewers: ributzka, majnemer

Differential Revision: http://llvm-reviews.chandlerc.com/D2663

llvm-svn: 200561
2014-01-31 17:41:22 +00:00
Craig Topper 10243c8907 Separate x86 opcode maps and 0x66/0xf2/0xf3 prefixes from each other in the TSFlags. This greatly simplifies the switch statements in the disassembler tables and the code emitters.
llvm-svn: 200522
2014-01-31 08:47:06 +00:00
Craig Topper ec68866f55 Move REP out of the Prefix field of the X86 format. Give it its own bit. It had special handling anyway and this enables a future patch.
llvm-svn: 200520
2014-01-31 07:00:55 +00:00
Craig Topper 2cbf38e36f Move address override handling in X86CodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode.
llvm-svn: 200517
2014-01-31 05:42:35 +00:00
Craig Topper 327f13b43b Move address override handling in X86MCCodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode.
llvm-svn: 200516
2014-01-31 05:33:45 +00:00
David Woodhouse 0b6c94909e [x86] Fix signed relocations for i64i32imm operands
These should end up (in ELF) as R_X86_64_32S relocs, not R_X86_64_32.
Kill the horrid and incomplete special case and FIXME in
EncodeInstruction() and set things up so it can infer the signedness
from the ImmType just like it can the size and whether it's PC-relative.

llvm-svn: 200495
2014-01-30 22:20:41 +00:00
Craig Topper 348cbdacda Remove duplicate patterns
llvm-svn: 200461
2014-01-30 07:19:10 +00:00
Craig Topper c45da1619c Remove some AddedComplexity tags that were forcing priority for AVX over SSE. Use predicates instead.
llvm-svn: 200458
2014-01-30 06:26:25 +00:00
Craig Topper fb1746beec Remove duplicate pattern and add predicate checks on other patterns.
llvm-svn: 200455
2014-01-30 06:03:19 +00:00
Rafael Espindola 5e812afaeb Simplify the handling of iterators in ObjectFile.
None of the object file formats reported error on iterator increment. In
retrospect, that is not too surprising: no object format stores symbols or
sections in a linked list or other structure that requires chasing pointers.
As a consequence, all error checking can be done on begin() and end().

This reduces the text segment of bin/llvm-readobj in my machine from 521233 to
518526 bytes.

llvm-svn: 200442
2014-01-30 02:49:50 +00:00
Quentin Colombet 9e16c8ac8a [X86][SchedModel] Fix typos in the definitions of the ports for Haswell.
llvm-svn: 200403
2014-01-29 18:26:59 +00:00
David Woodhouse d2cca113df Delete MCSubtargetInfo data members from target MCCodeEmitter classes
The subtarget info is explicitly passed to the EncodeInstruction
method and we should use that subtarget info to influence any
encoding decisions.

llvm-svn: 200350
2014-01-28 23:13:25 +00:00
David Woodhouse 9784cef38d Explictly pass MCSubtargetInfo to MCCodeEmitter::EncodeInstruction()
llvm-svn: 200348
2014-01-28 23:13:07 +00:00
David Woodhouse e6c13e4abd Change MCStreamer EmitInstruction interface to take subtarget info
llvm-svn: 200345
2014-01-28 23:12:42 +00:00
Andrea Di Biagio 2ea61f17ad [X86] Add extra rules for combining vselect dag nodes into movsd.
This improves the fix committed at revision 199683 adding the
following new target specific combine rules:

1) fold (v4i32: vselect <0,0,-1,-1>, A, B) ->
        (v4i32 (bitcast (movsd (v2i64 (bitcast A)), (v2i64 (bitcast B))) ))

2) fold (v4f32: vselect <0,0,-1,-1>, A, B) ->
        (v4f32 (bitcast (movsd (v2f64 (bitcast A)), (v2f64 (bitcast B))) ))

3) fold (v4i32: vselect <-1,-1,0,0>, A, B) ->
        (v4i32 (bitcast (movsd (v2i64 (bitcast B)), (v2i64 (bitcast A))) ))

4) fold (v4f32: vselect <-1,-1,0,0>, A, B) ->
        (v4f32 (bitcast (movsd (v2i64 (bitcast B)), (v2i64 (bitcast A))) ))

llvm-svn: 200324
2014-01-28 18:14:21 +00:00
Reid Kleckner b2340d4c8c x86: add implicit defs for cpuid
This avoids miscompiling MS inline asm in LLVM where we have to infer
clobbers.  Test case forthcoming in Clang.

llvm-svn: 200279
2014-01-28 02:08:22 +00:00
Juergen Ributzka 659ce00d60 [TLI] Add a new hook to TargetLowering to query the target if a load of a constant should be converted to simply the constant itself.
Before this patch we used getIntImmCost from TargetTransformInfo to determine if
a load of a constant should be converted to just a constant, but the threshold
for this was set to an arbitrary value. This value works well for the two
targets (X86 and ARM) that implement this target-hook, but it isn't
target-independent at all.

Now targets have the possibility to decide directly if this optimization should
be performed. The default value is set to false to preserve the current
behavior. The target hook has been moved to TargetLowering, which removed the
last use and need of TargetTransformInfo in SelectionDAG.

llvm-svn: 200271
2014-01-28 01:20:14 +00:00
Alp Toker 771f7652a9 Avoid C++ comment in C sources
lib/Target/X86/Disassembler/X86DisassemblerDecoder.c:1361:7: error: C++ style comments are not allowed in ISO C90

llvm-svn: 200153
2014-01-26 18:44:34 +00:00
Rafael Espindola e41383f899 Pass a MCSubtargetInfo down to the TargetStreamer creation.
With this the target streamers will be able to know the target features that
are in use.

llvm-svn: 200135
2014-01-26 06:38:58 +00:00
Rafael Espindola 24ea09ef7d Construct the MCStreamer before constructing the MCTargetStreamer.
This has a few advantages:
* Only targets that use a MCTargetStreamer have to worry about it.
* There is never a MCTargetStreamer without a MCStreamer, so we can use a
  reference.
* A MCTargetStreamer can talk to the MCStreamer in its constructor.

llvm-svn: 200129
2014-01-26 06:06:37 +00:00
Craig Topper aefaab640c Improve some x86 type constraints.
llvm-svn: 200120
2014-01-26 04:59:39 +00:00
Craig Topper 399e39e0de Set displacementSize to 1 for instrucitons with mod==0x1. Fixes PR17310. Modified from patch by James Courtier-Dutton.
llvm-svn: 200100
2014-01-25 22:48:43 +00:00
Juergen Ributzka f26beda7c7 Revert "Revert "Add Constant Hoisting Pass" (r200034)"
This reverts commit r200058 and adds the using directive for
ARMTargetTransformInfo to silence two g++ overload warnings.

llvm-svn: 200062
2014-01-25 02:02:55 +00:00
Hans Wennborg 4d67a2e85a Revert "Add Constant Hoisting Pass" (r200034)
This commit caused -Woverloaded-virtual warnings. The two new
TargetTransformInfo::getIntImmCost functions were only added to the superclass,
and to the X86 subclass. The other targets were not updated, and the
warning highlighted this by pointing out that e.g. ARMTTI::getIntImmCost was
hiding the two new getIntImmCost variants.

We could pacify the warning by adding "using TargetTransformInfo::getIntImmCost"
to the various subclasses, or turning it off, but I suspect that it's wrong to
leave the functions unimplemnted in those targets. The default implementations
return TCC_Free, which I don't think is right e.g. for ARM.

llvm-svn: 200058
2014-01-25 01:18:18 +00:00
Juergen Ributzka 4f3df4ad64 Add Constant Hoisting Pass
Retry commit r200022 with a fix for the build bot errors. Constant expressions
have (unlike instructions) module scope use lists and therefore may have users
in different functions. The fix is to simply ignore these out-of-function uses.

llvm-svn: 200034
2014-01-24 20:18:00 +00:00
Juergen Ributzka 50e7e80d00 Revert "Add Constant Hoisting Pass"
This reverts commit r200022 to unbreak the build bots.

llvm-svn: 200024
2014-01-24 18:40:30 +00:00
Juergen Ributzka 38b67d0caf Add Constant Hoisting Pass
This pass identifies expensive constants to hoist and coalesces them to
better prepare it for SelectionDAG-based code generation. This works around the
limitations of the basic-block-at-a-time approach.

First it scans all instructions for integer constants and calculates its
cost. If the constant can be folded into the instruction (the cost is
TCC_Free) or the cost is just a simple operation (TCC_BASIC), then we don't
consider it expensive and leave it alone. This is the default behavior and
the default implementation of getIntImmCost will always return TCC_Free.

If the cost is more than TCC_BASIC, then the integer constant can't be folded
into the instruction and it might be beneficial to hoist the constant.
Similar constants are coalesced to reduce register pressure and
materialization code.

When a constant is hoisted, it is also hidden behind a bitcast to force it to
be live-out of the basic block. Otherwise the constant would be just
duplicated and each basic block would have its own copy in the SelectionDAG.
The SelectionDAG recognizes such constants as opaque and doesn't perform
certain transformations on them, which would create a new expensive constant.

This optimization is only applied to integer constants in instructions and
simple (this means not nested) constant cast experessions. For example:
%0 = load i64* inttoptr (i64 big_constant to i64*)

Reviewed by Eric

llvm-svn: 200022
2014-01-24 18:23:08 +00:00
Juergen Ributzka 3e752e7af9 Add final and owerride keywords to TargetTransformInfo's subclasses.
llvm-svn: 200021
2014-01-24 18:22:59 +00:00
Alp Toker cb40291100 Fix known typos
Sweep the codebase for common typos. Includes some changes to visible function
names that were misspelt.

llvm-svn: 200018
2014-01-24 17:20:08 +00:00
Juergen Ributzka e758ddcd16 [X86] Prevent the creation of redundant ops for sadd and ssub with overflow.
This commit teaches the X86 backend to create the same X86 instructions when it
lowers an sadd/ssub with overflow intrinsic and a conditional branch that uses
that overflow result. This allows SelectionDAG to recognize and remove one of
the redundant operations.

This fixes <rdar://problem/15874016> and <rdar://problem/15661073>.

Reviewed by Nadav

llvm-svn: 199976
2014-01-24 06:47:57 +00:00
Kevin Enderby bc570f289a Update the X86 assembler for .intel_syntax to produce an error for invalid base
registers in memory addresses that do not match the index register. As it does
for .att_syntax.

rdar://15887380

llvm-svn: 199948
2014-01-23 22:34:42 +00:00
Kevin Enderby 9d11702f5d Update the X86 assembler for .intel_syntax to produce an error for invalid
scale factors in memory addresses. As it does for .att_syntax.

It was producing:
Assertion failed: (((Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8)) && "Invalid scale!"), function CreateMem, file /Volumes/SandBox/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp, line 1133.

rdar://14967214

llvm-svn: 199942
2014-01-23 21:52:41 +00:00
Lang Hames b1ce33379a Add a few missing cases from r199933. Testcase coming shortly.
llvm-svn: 199938
2014-01-23 21:27:27 +00:00
Lang Hames 23de211c5d Replace vfmaddxx213 instructions with their 231-type equivalents in accumulator
loops. Writing back to the accumulator (231-type) allows the coalescer to
eliminate an extra copy.

llvm-svn: 199933
2014-01-23 20:23:36 +00:00
Elena Demikhovsky a5d38a39a0 AVX-512: added VPERM2D VPERM2Q VPERM2PS VPERM2PD instructions,
they give better sequences than VPERMI

llvm-svn: 199893
2014-01-23 14:27:26 +00:00
NAKAMURA Takumi 372f05d537 X86Disassembler.cpp: Fix @param introduced in r199804. [-Wdocumentation]
llvm-svn: 199855
2014-01-23 00:37:25 +00:00
Benjamin Kramer f5f23b09bf Remove param doxygen comment for non-existing parameter.
Found by -Wdocumentation.

llvm-svn: 199814
2014-01-22 16:22:17 +00:00
David Woodhouse 7a7c192e3e [x86] Silence unused diReg variable warning in non-asserting builds
llvm-svn: 199812
2014-01-22 15:31:32 +00:00
David Woodhouse fee418c2c0 [x86] Fix uninitialized variable warning in translate{Src,Dst}Index
llvm-svn: 199811
2014-01-22 15:31:29 +00:00
David Woodhouse e4e815d660 [x86] Remove now-unused isSrcOp() and isDstOp() from X86AsmParser
llvm-svn: 199810
2014-01-22 15:08:58 +00:00
David Woodhouse 4ce66069a0 [x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385)
llvm-svn: 199809
2014-01-22 15:08:55 +00:00
David Woodhouse c472b813bf [x86] Allow segment and address-size overrides for OUTS[BWLQ] (PR9385)
llvm-svn: 199808
2014-01-22 15:08:49 +00:00
David Woodhouse 6f417dea33 [x86] Allow segment and address-size overrides for MOVS[BWLQ] (PR9385)
llvm-svn: 199807
2014-01-22 15:08:42 +00:00
David Woodhouse 9bbf7ca13d ]x86] Allow segment and address-size overrides for CMPS[BWLQ] (PR9385)
llvm-svn: 199806
2014-01-22 15:08:36 +00:00
David Woodhouse 20fe48047d [x86] Allow address-size overrides for SCAS{8,16,32,64} (PR9385)
llvm-svn: 199805
2014-01-22 15:08:27 +00:00
David Woodhouse b33c2ef215 [x86] Allow address-size overrides for STOS[BWLQ] (PR9385)
llvm-svn: 199804
2014-01-22 15:08:21 +00:00