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65729 Commits

Author SHA1 Message Date
Jim Grosbach 0708e74a95 Add operand encoding bits for SMC and SVC in ARM mode. 
llvm-svn: 116447
 2010-10-13 22:38:23 +00:00
Jim Grosbach 16db3287c0 More encoding cleanup. Also add register Rd operands for indirect branches. 
llvm-svn: 116444
 2010-10-13 22:09:34 +00:00
Owen Anderson 071cee0c81 CallGraphSCC passes implicity require CallGraph analysis. 
llvm-svn: 116443
 2010-10-13 22:00:45 +00:00
Owen Anderson 6bc4f49f89 Conversely, Analysis-implementations do NOT need to initialize the AnalysisGroup. It will only matter when 
someone tries to require that AG, in which case it is the requester's responsibility to initialize it.

llvm-svn: 116442
 2010-10-13 21:55:07 +00:00
Owen Anderson c266a36625 Analysis groups need to initialize their default implementations. 
llvm-svn: 116441
 2010-10-13 21:49:58 +00:00
Jim Grosbach 2a4d99ab62 Simplify some ARM encoding information. 
llvm-svn: 116440
 2010-10-13 21:48:54 +00:00
Eric Christopher ef83e21b57 Update comment. 
llvm-svn: 116438
 2010-10-13 21:41:51 +00:00
Jim Grosbach 9874b7de58 Add a FIXME. The ADR instruction is a bit odd. 
llvm-svn: 116437
 2010-10-13 21:32:30 +00:00
Jim Grosbach 7e72ec6626 Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern 
and handle the operand explicitly. Flesh out encoding information. Add an
explicit disassembler testcase for the instruction.

llvm-svn: 116432
 2010-10-13 21:00:04 +00:00
Bill Wendling f106ecfa59 Add MC encodings for VCVT* instrunctions. 
llvm-svn: 116431
 2010-10-13 20:58:46 +00:00
Jim Grosbach fb07ef19cc Add a FIXME. 
llvm-svn: 116428
 2010-10-13 20:38:04 +00:00
Jim Grosbach efc066829b Make a few more bits of some simple instructions explicit. nop, yield, wfe, 
wfi, sel, sev and bkpt. All would disassemble properly before, but more
explicitness is good, especially with the integrated assembler coming in
the future.

llvm-svn: 116427
 2010-10-13 20:30:55 +00:00
Owen Anderson d8d468f721 Take advantage of C++'s thread-safe static local initialization to simplify thread-safe pass initialization. 
llvm-svn: 116426
 2010-10-13 20:24:34 +00:00
Oscar Fuentes d6c1f37f86 GetTargetTriple.cmake: detect MinGW 64 bits. 
llvm-svn: 116424
 2010-10-13 20:15:08 +00:00
Jim Grosbach 1e7db68774 Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions. 
llvm-svn: 116421
 2010-10-13 19:56:10 +00:00
Jim Grosbach 142e3cbb26 Fix encoding for compares. No Rd register. 
llvm-svn: 116414
 2010-10-13 18:05:25 +00:00
Jim Grosbach 651dc7c9e9 Add ARM mode operand encoding information for ADDE/SUBE instructions. 
llvm-svn: 116412
 2010-10-13 18:00:52 +00:00
Rafael Espindola 2216af3fa8 Fix another case where we were preferring instructions with large 
immediates instead of 8 bits ones.

llvm-svn: 116410
 2010-10-13 17:14:25 +00:00
Benjamin Kramer c133c6ee1a Remove noisy semicolon. 
llvm-svn: 116407
 2010-10-13 15:55:12 +00:00
Rafael Espindola 8ea9b0eb32 Fix PR8365 by adding a more specialized Pat that checks if an 'and' with 
8 bit constants can be used.

llvm-svn: 116403
 2010-10-13 13:31:20 +00:00
Tobias Grosser 4b0986b6c1 Add Region::isTopLevelRegion(). 
llvm-svn: 116402
 2010-10-13 11:02:44 +00:00
Eric Christopher dd0821e7ff Start handling more global variables. 
llvm-svn: 116401
 2010-10-13 09:11:46 +00:00
Tobias Grosser 4c71c117d1 RegionInfo: Fix trivial error that slipped in last minute. 
llvm-svn: 116400
 2010-10-13 08:00:53 +00:00
Tobias Grosser fe92a9384e RegionInfo: Update RegionInfo after a BB was split. 
llvm-svn: 116398
 2010-10-13 05:54:13 +00:00
Tobias Grosser a8677226ab RegioInfo: Add getExpandedRegion(). 
getExpandedRegion() enables us to create non canonical regions. Those regions
can be used to define the largerst region, that fullfills a certain property.

llvm-svn: 116397
 2010-10-13 05:54:11 +00:00
Tobias Grosser 648594c920 RegionInfo: Allow to update exit and entry of a region. 
llvm-svn: 116396
 2010-10-13 05:54:10 +00:00
Tobias Grosser bf984fd78e RegionInfo: Enhance addSubregion. 
llvm-svn: 116395
 2010-10-13 05:54:09 +00:00
Tobias Grosser 8352ce5f8d RegionInfo: Allow to set the parent region of a basic block. 
llvm-svn: 116394
 2010-10-13 05:54:07 +00:00
Rafael Espindola c2240adcc7 Fix PR8313 by changing ValueToValueMap use a TrackingVH. 
llvm-svn: 116390
 2010-10-13 02:08:17 +00:00
Evan Cheng 3912158997 Limit load / store issues (at least until we have a true multi-issue aware scheduler). 
llvm-svn: 116389
 2010-10-13 01:54:21 +00:00
Rafael Espindola 229e38f0fe Be more consistent in using ValueToValueMapTy. 
llvm-svn: 116387
 2010-10-13 01:36:30 +00:00
Bill Wendling 6e27b4f530 Add encodings for VNEG and VSQRT. Also add encodings for VMOV, but not a test 
just yet.

llvm-svn: 116386
 2010-10-13 01:17:33 +00:00
Bill Wendling 576fd0b110 Add encodings for VCVT instructions. 
llvm-svn: 116385
 2010-10-13 00:56:35 +00:00
Jim Grosbach 8c519c0d4b Add ARM encoding information for comparisons, forced-cc-out arithmetics, and 
arithmetic-with-carry-in instructions.

llvm-svn: 116384
 2010-10-13 00:50:27 +00:00
Bill Wendling da4ddf0fcf Add VCMPZ and VABS. 
llvm-svn: 116383
 2010-10-13 00:38:07 +00:00
Tobias Grosser e910b9d9cd RegionInfo: Free the RegionNodes in cache. 
Contributed by: ether

llvm-svn: 116380
 2010-10-13 00:07:59 +00:00
Bill Wendling f9ca535495 Refactor VCMP instructions. 
llvm-svn: 116379
 2010-10-13 00:04:29 +00:00
Jim Grosbach efd5369749 Add the rest of the ARM so_reg encoding options (register shifted register) 
and move to a custom operand encoder. Remove the last of the special handling
stuff from ARMMCCodeEmitter::EncodeInstruction.

llvm-svn: 116377
 2010-10-12 23:53:58 +00:00
Eric Christopher a237bdbe52 FileCheckize this in a hope to quiet a valgrind warning on grep. 
llvm-svn: 116376
 2010-10-12 23:47:58 +00:00
Bill Wendling 7dd8c0b991 Add encodings for VNMUL[SD]. 
llvm-svn: 116375
 2010-10-12 23:47:37 +00:00
Bill Wendling a06aee826c Add encodings for VDIV and VMUL. 
llvm-svn: 116370
 2010-10-12 23:22:27 +00:00
Evan Cheng d565b44a98 Turn some fp stackifier assertion into errors to avoid silently generating bad code when assertions are off. rdar://8540457. 
llvm-svn: 116368
 2010-10-12 23:19:28 +00:00
Jim Grosbach 12e493ace4 Move the ARM so_imm encoding into a custom operand encoder and remove the 
explicit handling of the instructions referencing it from the MC code
emitter.

llvm-svn: 116367
 2010-10-12 23:18:08 +00:00
Jim Grosbach d5f8c3350d Be nitpicky and line up the comments. 
llvm-svn: 116365
 2010-10-12 23:14:03 +00:00
Bill Wendling 42200bcaea Refactor some of the encoding logic into a base class. This keeps us from having 
to add 10+ lines to every instruction.

It may turn out that we can move this base class into it's parent class.

llvm-svn: 116362
 2010-10-12 23:06:54 +00:00
Jim Grosbach d9d31dafda Add custom encoder for the 's' bit denoting whether an ARM arithmetic 
instruction should set the processor status flags or not. Remove the now
unnecessary special handling for the bit from the MCCodeEmitter.

llvm-svn: 116360
 2010-10-12 23:00:24 +00:00
Bill Wendling 646a506724 Add encoding for VSUB and VCMP. 
Fear not! I'm going to try a refactoring right now. :)

llvm-svn: 116359
 2010-10-12 22:55:35 +00:00
Bill Wendling 9513a7e87f Don't need to specify calling convention. Add 'readnone' to functions. 
llvm-svn: 116354
 2010-10-12 22:24:10 +00:00
Jim Grosbach 51a12eb11d Allow targets to optionally specify custom binary encoder functions for 
operand values. This is useful for operands which require additional trickery
to encode into the instruction. For example, the ARM shifted immediate and
shifted register operands.

llvm-svn: 116353
 2010-10-12 22:21:57 +00:00
Bill Wendling ac6cd00706 Encoding for VADDD. Plus a test for the VFP instructions. 
llvm-svn: 116348
 2010-10-12 22:08:41 +00:00