Commit Graph

119 Commits

Author SHA1 Message Date
Anton Korobeynikov 23b28cb824 2 more vdup.32 cases
llvm-svn: 78419
2009-08-07 22:36:50 +00:00
Evan Cheng 4c3b1ca5a0 Fix support to use NEON for single precision fp math.
llvm-svn: 78397
2009-08-07 19:30:41 +00:00
Bob Wilson 0127031c20 Implement Neon VST[234] operations.
llvm-svn: 78330
2009-08-06 18:47:44 +00:00
David Goodwin b062c236c5 Add parameter to pattern classes to enable an itinerary to be specified for instructions. For now just use the existing itineraries or NoItinerary.
llvm-svn: 78321
2009-08-06 16:52:47 +00:00
Bob Wilson 488db94e7b Neon does not actually have VLD{234}.64 instructions.
These operations will have to be synthesized from other instructions.

llvm-svn: 78263
2009-08-06 00:24:27 +00:00
David Goodwin e5b5d8fbb3 When using NEON for single-precision FP, the NEON result must be placed in D0-D15 as these are the only D registers with S subregs. Introduce a new regclass to represent D0-D15 and use it in the NEON single-precision FP patterns.
llvm-svn: 78244
2009-08-05 21:02:22 +00:00
Evan Cheng e219be7346 80 col violations.
llvm-svn: 78175
2009-08-05 06:41:25 +00:00
Bob Wilson 20f79e321e Change DAG nodes for Neon VLD2/3/4 operations to return multiple results.
Get rid of yesterday's code to fix the register usage during isel.
Select the new DAG nodes to machine instructions.  The new pre-alloc pass
to choose adjacent registers for these results is not done, so the
results of this will generally not assemble yet.

llvm-svn: 78136
2009-08-05 00:49:09 +00:00
Bob Wilson a8720101b5 Replace dregsingle operand modifier with explicit escaped curly brackets.
For other VLDn and VSTn operations, we need to list the multiple registers
explicitly anyway, so there's no point in special-casing this one usage.

llvm-svn: 78109
2009-08-04 21:39:33 +00:00
David Goodwin 30bf625ac2 Add NEON single-precision FP support for fabs and fneg.
llvm-svn: 78101
2009-08-04 20:39:05 +00:00
David Goodwin a3839bc6c0 Match common pattern for FNMAC. Add NEON SP support.
llvm-svn: 78085
2009-08-04 18:44:29 +00:00
David Goodwin 3b9c52c5c1 Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations.
llvm-svn: 78081
2009-08-04 17:53:06 +00:00
Bob Wilson f45dee3ad2 Lower Neon VLD* intrinsics to custom DAG nodes, and manually allocate the
results to fixed registers.

llvm-svn: 78025
2009-08-04 00:36:16 +00:00
Bob Wilson cf19885a32 Change Neon VLDn intrinsics to return multiple values instead of really
wide vectors.  Likewise, change VSTn intrinsics to take separate arguments
for each vector in a multi-vector struct.  Adjust tests accordingly.

llvm-svn: 77468
2009-07-29 16:39:22 +00:00
Bob Wilson 8a37bbebfd Add support for ARM Neon VREV instructions.
Patch by Anton Korzh, with some modifications from me.

llvm-svn: 77101
2009-07-26 00:39:34 +00:00
Evan Cheng 5edd90cbbc - Add some NEON ld / st instruction static encoding.
- Make bits 25-27 for ldrh, etc. explicitly zero. Previously only the JIT uses the encoding information and it's assuming anything not specified to be zero. Making them explicit so the disassembler is happy.
Patch by Sean Callanan.

llvm-svn: 75065
2009-07-08 22:51:32 +00:00
Bob Wilson 1d298fd75b Implement NEON vst1 instruction.
llvm-svn: 75037
2009-07-08 20:32:02 +00:00
Bob Wilson f731a2df6b Implement NEON vld1 instructions.
llvm-svn: 75019
2009-07-08 18:11:30 +00:00
Bob Wilson 2e076c4e02 Add support for ARM's Advanced SIMD (NEON) instruction set.
This is still a work in progress but most of the NEON instruction set
is supported.

llvm-svn: 73919
2009-06-22 23:27:02 +00:00