2f6377cafe
copyImplicitOps is redundant here - the loop above already copies these ops.
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llvm-svn: 148725
2012-01-23 21:15:01 +00:00
20948fab69
Fix PR11829. PostRA LICM was too aggressive.
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This fixes a typo in r148589.
llvm-svn: 148724
2012-01-23 21:01:15 +00:00
9082353e3b
Simplify debug output.
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llvm-svn: 148723
2012-01-23 21:01:11 +00:00
e660fdd953
Intel syntax: Parse memory operand with empty base reg, e.g. DWORD PTR [4*RDI]
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llvm-svn: 148721
2012-01-23 20:20:06 +00:00
d28ef9ac46
Simplify some NEON assembly pseudo definitions.
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Let the generic token alias definitions handle the data subtype
suffices. We don't need explicit versions for each.
llvm-svn: 148718
2012-01-23 19:39:08 +00:00
54db64e2e4
Silence warnings in -asserts build
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llvm-svn: 148715
2012-01-23 18:46:04 +00:00
880bc1644b
Intel syntax: Parse segment registers.
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llvm-svn: 148712
2012-01-23 18:31:58 +00:00
c7f9fd4da8
convert CAZ, UndefValue, and CPN to use DenseMap's again, this time without
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using OwningPtr. OwningPtr would barf when the densemap had to reallocate,
which doesn't appear to happen on the regression test suite, but obviously
happens in real life :)
llvm-svn: 148700
2012-01-23 15:20:12 +00:00
962c272f95
revert r148691 and 148693
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llvm-svn: 148698
2012-01-23 15:09:44 +00:00
c94cf8faf6
Implemented AddressSanitizer::getPassName()
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llvm-svn: 148697
2012-01-23 11:22:43 +00:00
28ea8f523b
ARMAsmPrinter.cpp: Try to fix up r148686. EnableARMEHABI was also here.
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llvm-svn: 148694
2012-01-23 09:14:42 +00:00
4494e1ae25
switch UndefValue and ConstantPointerNull over to DenseMap's for uniquing.
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llvm-svn: 148693
2012-01-23 08:52:32 +00:00
1910c9c3a0
Replace a use of ConstantUniqueMap for CAZ constants with a simple DenseMap.
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Now that the type system rewrite has landed, there is no need for its
complexity and std::map'ness.
llvm-svn: 148691
2012-01-23 08:42:38 +00:00
edd1d0acfc
Custom lower PCMPEQ/PCMPGT intrinsics to target specific nodes and remove the intrinsic patterns.
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llvm-svn: 148687
2012-01-23 08:18:28 +00:00
482cdc4ebd
An option to selectively enable parts of ARM EHABI support.
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This change adds an new value to the --arm-enable-ehabi option that
disables emitting unwinding descriptors. This mode gives a working
backtrace() without the (currently broken) exception support.
llvm-svn: 148686
2012-01-23 07:57:39 +00:00
6b90c5d03e
Update more places to use target specific nodes for vector shifts instead of intrinsics.
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llvm-svn: 148685
2012-01-23 06:46:22 +00:00
5e80db4e4f
Custom lower vector shift intrinsics to target specific nodes and remove the patterns that are no longer needed.
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llvm-svn: 148684
2012-01-23 06:16:53 +00:00
624e30894a
Avoid using an invalidated iterator.
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llvm-svn: 148681
2012-01-23 05:07:16 +00:00
abf456e320
The iteration order over a std::set<Module*> depends on the addresses of the
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modules. Avoid that to make the order the linker sees the modules deterministic.
llvm-svn: 148676
2012-01-23 03:41:53 +00:00
20c98df340
Remove pattern fragments for v32i8, v16i16, v8i32, v16i8, v8i16, and v4i32 loads. All integer vector loads are promoted to v2i64 or v4i64 so these pattern fragments can never match. Fix or remove patterns that used these fragments.
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llvm-svn: 148672
2012-01-23 00:06:44 +00:00
c31ceda7d9
Make Value::isDereferenceablePointer() handle unreachable code blocks. (This
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returns false in the event the computation feeding into the pointer is
unreachable, which maybe ought to be true -- but this is at least consistent
with undef->isDereferenceablePointer().) Fixes PR11825!
llvm-svn: 148671
2012-01-23 00:05:17 +00:00
0b7ad76bd0
Combine X86 CMPPD and CMPPS node types. Simplifies selection code and pattern matching.
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llvm-svn: 148670
2012-01-22 23:36:02 +00:00
bd4884371b
Merge PCMPEQB/PCMPEQW/PCMPEQD/PCMPEQQ and PCMPGTB/PCMPGTW/PCMPGTD/PCMPGTQ X86 ISD node types into only two node types. Simplifying opcode selection and pattern matching.
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llvm-svn: 148667
2012-01-22 22:42:16 +00:00
e197d943f3
Use Attributes::None instead of 0 after r148553 change on Attributes from unsigned to their own class.
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llvm-svn: 148665
2012-01-22 20:05:26 +00:00
094626414d
Add target specific ISD node types for SSE/AVX vector shuffle instructions and change all the code that used to create intrinsic nodes to create the new nodes instead.
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llvm-svn: 148664
2012-01-22 19:15:14 +00:00
0251f20ad1
Add an option to disable buggy copy propagation pass
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llvm-svn: 148662
2012-01-22 14:08:34 +00:00
5482b9f535
Add fused multiple+add instructions from VFPv4.
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Patch by Ana Pazos!
llvm-svn: 148658
2012-01-22 12:07:33 +00:00
bff72ba77e
Remove trailing spaces
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llvm-svn: 148654
2012-01-22 09:02:48 +00:00
c3c80f0986
Basic runtime dynamic loading capabilities added to ELFObjectFile, implemented
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in a subclass named DyldELFObject. This class supports rebasing the object file
it represents by re-mapping section addresses to the actual memory addresses
the object was placed in. This is required for MC-JIT implementation on ELF with
debugging support.
Patch reviewed on llvm-commits.
Developed together with Ashok Thirumurthi and Andrew Kaylor.
llvm-svn: 148653
2012-01-22 09:01:03 +00:00
058d647adf
Split the lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h header to smaller logical headers.
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ELF and MachO implementations of RuntimeDyldImpl go into their own header files now.
Reviewed on llvm-commits
llvm-svn: 148652
2012-01-22 07:05:02 +00:00
a4ed5246d8
Make code a little less verbose.
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llvm-svn: 148651
2012-01-22 03:07:48 +00:00
cb3433cd58
Remove unused X86 ISD node type defines.
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llvm-svn: 148644
2012-01-22 01:15:56 +00:00
123adfa0f3
Move some vector shift patterns into their instruction definitions.
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llvm-svn: 148643
2012-01-22 00:41:20 +00:00
dcaa5fbd08
Add memory patterns for some of the fp<->integer conversion instructions. Fold some patterns into instruction definitions.
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llvm-svn: 148641
2012-01-21 18:37:15 +00:00
5cff13a3fb
Remove unused variables.
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llvm-svn: 148635
2012-01-21 10:42:44 +00:00
39bc1e4d25
Fix PR11819 introduced by r148537. I'd commit the test case, but the generated code is terrible as it gets fully scalarized. Expect a future commit to fix that.
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llvm-svn: 148632
2012-01-21 08:49:33 +00:00
64a2beca52
Fix an obvious typo.
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llvm-svn: 148622
2012-01-21 03:31:03 +00:00
8e3bb315d8
Handle register masks in LiveVariables.
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A register mask operand kills any live physreg that isn't preserved.
Unlike an implicit-def operand, the clobbered physregs are never live
afterwards.
This means LiveVariables has to track a much smaller number of live
physregs, and it should spend much less time in addRegisterDead().
llvm-svn: 148609
2012-01-21 00:58:53 +00:00
8c592f13e3
RuntimeDyld alignment adjustment from MachO file.
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The MachO file stores section alignment as log2(alignment-in-bytes). The
allocation routines want the raw alignment-in-bytes value, so adjust
for that.
llvm-svn: 148604
2012-01-21 00:21:53 +00:00
78dcaed8ca
Thumb2 'add rd, pc, imm' alternate form for 'adr' instruction.
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llvm-svn: 148601
2012-01-21 00:07:56 +00:00
52ee45d64a
Delete an unused member variable.
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llvm-svn: 148594
2012-01-20 22:48:59 +00:00
1dc4a77a23
Fix inverted condition.
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llvm-svn: 148593
2012-01-20 22:44:03 +00:00
ce6a2ca8c8
Intel syntax: Robustify register parsing.
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llvm-svn: 148591
2012-01-20 22:32:05 +00:00
6b17ef58a1
Support register masks in MachineLICM.
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Only PostRA LICM is affected.
llvm-svn: 148589
2012-01-20 22:27:12 +00:00
58614f2f5a
Handle register masks in DeadMachineInstructionElim.
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Don't track live physregs that are clobbered by a register mask operand.
llvm-svn: 148588
2012-01-20 22:27:09 +00:00
46a9f016c5
More dead code removal (using -Wunreachable-code)
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llvm-svn: 148578
2012-01-20 21:51:11 +00:00
b9c822ab0b
Handle a corner case with IV chain collection with bailout instead of assert.
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Fixes PR11783: bad cast to AddRecExpr.
llvm-svn: 148572
2012-01-20 21:23:40 +00:00
d0930fff85
Intel syntax: Parse ... PTR [-8]
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llvm-svn: 148570
2012-01-20 21:21:01 +00:00
f36613cb45
Intel syntax: For now, disable ambiguous JMP64pcrel32 for intel syntax.
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llvm-svn: 148569
2012-01-20 21:14:06 +00:00
6c7aaec077
ARM vector any_extends need to be selected to vmovl. <rdar://problem/10723651>
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We have patterns for vector sext and zext operations but were missing
anyext. Without those patterns, codegen will fail when the selection DAG
has any_extend nodes.
llvm-svn: 148568
2012-01-20 20:59:56 +00:00
Lang Hames