cdf22f2953
Add separate intrinsics for MMX / SSE shifts with i32 integer operands. This allow us to simplify the horribly complicated matching code.
...
llvm-svn: 50601
2008-05-03 00:52:09 +00:00
fa8f9f937a
Undo r50574. We are already ensuring the folded load address is 16-byte aligned.
...
llvm-svn: 50578
2008-05-02 17:01:01 +00:00
4f9cd9181e
80 column violation.
...
llvm-svn: 50575
2008-05-02 07:53:32 +00:00
50f82f2c8e
Not safe folding a load + FsXORPSrr into FsXORPSrm. It's loading a FR64 value but the load folding variant expects a 16-byte aligned address.
...
llvm-svn: 50574
2008-05-02 07:50:58 +00:00
be0de34ede
Tail call optimization improvements:
...
Move platform independent code (lowering of possibly overwritten
arguments, check for tail call optimization eligibility) from
target X86ISelectionLowering.cpp to TargetLowering.h and
SelectionDAGISel.cpp.
Initial PowerPC tail call implementation:
Support ppc32 implemented and tested (passes my tests and
test-suite llvm-test).
Support ppc64 implemented and half tested (passes my tests).
On ppc tail call optimization is performed if
caller and callee are fastcc
call is a tail call (in tail call position, call followed by ret)
no variable argument lists or byval arguments
option -tailcallopt is enabled
Supported:
* non pic tail calls on linux/darwin
* module-local tail calls on linux(PIC/GOT)/darwin(PIC)
* inter-module tail calls on darwin(PIC)
If constraints are not met a normal call will be emitted.
A test checking the argument lowering behaviour on x86-64 was added.
llvm-svn: 50477
2008-04-30 09:16:33 +00:00
c3a1910a07
Bug fixes and updates for CellSPU, syncing up with trunk. Most notable
...
fixes are target-specific lowering of frame indices, fix constants generated
for the FSMBI instruction, and fixing SPUTargetLowering::computeMaskedBitsFor-
TargetNode().
llvm-svn: 50462
2008-04-30 00:30:08 +00:00
0acc739817
Don't do stupid things: doInitialization(Module&) is not applicable to ModulePass :)
...
llvm-svn: 50433
2008-04-29 18:16:22 +00:00
da44054867
Fix the SVOffset values for loads and stores produced by
...
memcpy/memset expansion. It was a bug for the SVOffset value
to be used in the actual address calculations.
llvm-svn: 50359
2008-04-28 17:15:20 +00:00
fac70f2f44
Fix FP return for Win64 ABI
...
llvm-svn: 50342
2008-04-28 07:40:07 +00:00
e183b3cd76
Properly lower vararg's FORMAL_ARGUMENTS node on win64
...
llvm-svn: 50325
2008-04-27 23:15:03 +00:00
b5096e9c73
Handle fp80 for win64
...
llvm-svn: 50324
2008-04-27 22:54:09 +00:00
724539c001
A few inline asm cleanups:
...
- Make targetlowering.h fit in 80 cols.
- Make LowerAsmOperandForConstraint const.
- Make lowerXConstraint -> LowerXConstraint
- Make LowerXConstraint return a const char* instead of taking a string byref.
llvm-svn: 50312
2008-04-26 23:02:14 +00:00
b4224cda3b
no need to implement this method and just have it call
...
the default impl.
llvm-svn: 50311
2008-04-26 22:59:59 +00:00
1e78184a99
Extract the lower 64-bit if a MMX value is passed in a XMM register.
...
llvm-svn: 50292
2008-04-25 20:13:28 +00:00
5ba02020e6
Fix illegal MMX_MOVDQ2Qrr pattern. vector_extract result must be a scalar value.
...
llvm-svn: 50291
2008-04-25 20:12:46 +00:00
ccde6dd016
Special handling for MMX values being passed in either GPR64 or lower 64-bits of XMM registers.
...
llvm-svn: 50289
2008-04-25 19:11:04 +00:00
6d653b58f9
Fix MMX_MOVQ2DQrr pattern. It's illegal to do a bitconvert from a smaller type to a larger one.
...
llvm-svn: 50278
2008-04-25 18:19:54 +00:00
33bd24bd92
add a note
...
llvm-svn: 50267
2008-04-25 17:25:00 +00:00
715eaa031c
80 col violation.
...
llvm-svn: 50266
2008-04-25 17:21:40 +00:00
59834d1c7a
Not checking for intrinsics which do not have a chain operand.
...
llvm-svn: 50260
2008-04-25 08:55:28 +00:00
051da5deaa
- Switch from std::set to SmallPtrSet.
...
- Add comments.
llvm-svn: 50259
2008-04-25 08:22:20 +00:00
df38b35a1e
MMX argument passing fixes:
...
On Darwin / Linux x86-32, v8i8, v4i16, v2i32 values are passed in MM[0-2].
On Darwin / Linux x86-32, v1i64 values are passed in memory.
On Darwin x86-64, v8i8, v4i16, v2i32 values are passed in XMM[0-7].
On Darwin x86-64, v1i64 values are passed in 64-bit GPRs.
llvm-svn: 50257
2008-04-25 07:56:45 +00:00
741c7a3b49
Loosen up an assertion to allow intrinsics. I really have no
...
idea what this code (findNonImmUse) does, so I'm only guessing
that this is the right thing. It would be really really nice
if this had comments and perhaps switched to SmallPtrSet
(hint hint) :)
This fixes rdar://5886601, a crash on gcc.target/i386/sse4_1-pblendw.c
llvm-svn: 50252
2008-04-25 05:13:01 +00:00
9165e165dc
Fix bug in x86 memcpy / memset lowering. If there are trailing bytes not handled by rep instructions, a new memcpy / memset is introduced for them. However, since source / destination addresses are already adjusted, their offsets should be zero.
...
llvm-svn: 50239
2008-04-25 00:26:43 +00:00
c107d0020d
Make these variables static.
...
llvm-svn: 50196
2008-04-23 23:15:23 +00:00
1ae135c87b
Drop dead includes
...
llvm-svn: 50192
2008-04-23 22:44:03 +00:00
9dcc3e97a4
Adjust option names for C++ backend
...
llvm-svn: 50190
2008-04-23 22:37:03 +00:00
78695035c4
First step of implementing PR1538: move llvm2cpp logic to new 'target'
...
llvm-svn: 50189
2008-04-23 22:29:24 +00:00
d871fa5cb6
Initial CBE support for multiple return values.
...
llvm-svn: 50187
2008-04-23 21:49:29 +00:00
0d6df367f1
Fix typo
...
llvm-svn: 50169
2008-04-23 18:24:25 +00:00
965babda19
Only allow increase of max alignment value
...
llvm-svn: 50168
2008-04-23 18:23:50 +00:00
c1534dca56
Be over-conservative: scan for all used virtual registers and calculate maximal stack alignment in assumption, that there will be spill of vector register.
...
llvm-svn: 50167
2008-04-23 18:23:30 +00:00
2659011b70
Add X86 Maximal Stack Alignment Calculator Pass before RA
...
llvm-svn: 50166
2008-04-23 18:23:05 +00:00
156550ae79
Do proper book-keeping of offsets and prologue/epilogue code for stack realignment
...
llvm-svn: 50163
2008-04-23 18:21:27 +00:00
89a0a017fb
If stack realignment is used - incoming args will use EBP as base register and locals - ESP
...
llvm-svn: 50162
2008-04-23 18:21:02 +00:00
ba5129073c
Eastimate required stack alignment early, so we can decide, whether we will need frame pointer or not
...
llvm-svn: 50161
2008-04-23 18:20:17 +00:00
c756b460d9
Cleanup
...
llvm-svn: 50159
2008-04-23 18:19:23 +00:00
a8aac3db3f
Simplify
...
llvm-svn: 50158
2008-04-23 18:18:36 +00:00
cb195f511d
Make stack alignment options global for all targets
...
llvm-svn: 50157
2008-04-23 18:18:10 +00:00
9328fbc4c7
Provide option for enabling-disabling stack realignment
...
llvm-svn: 50156
2008-04-23 18:17:11 +00:00
ca150edda6
Disable stack realignment for functions with dynamic-sized alloca's
...
llvm-svn: 50155
2008-04-23 18:16:43 +00:00
a7495260ee
Provide ABI-correct stack alignment
...
llvm-svn: 50154
2008-04-23 18:16:16 +00:00
8843487e16
Provide convenient helpers for some operations
...
llvm-svn: 50153
2008-04-23 18:15:48 +00:00
2ccafa47ac
Whitespace cleanup
...
llvm-svn: 50152
2008-04-23 18:15:11 +00:00
f166d2d0d6
Implement an x86-64 ABI detail of passing structs by hidden first
...
argument. The x86-64 ABI requires the incoming value of %rdi to
be copied to %rax on exit from a function that is returning a
large C struct.
Also, add a README-X86-64 entry detailing the missed optimization
opportunity and proposing an alternative approach.
llvm-svn: 50075
2008-04-21 23:59:07 +00:00
db08f5218e
Fix the encoding of the MMX movd that moves from MMX to 64-bit GPR.
...
llvm-svn: 50053
2008-04-21 19:52:29 +00:00
a89143f1e0
Add an ugly note.
...
llvm-svn: 50029
2008-04-21 04:46:30 +00:00
984e7199cc
Don't forget to update the current operand when getting the size of an instruction.
...
llvm-svn: 50007
2008-04-20 23:36:47 +00:00
470ab00c76
A better fix for my previous patch, MOVZQI2PQIrr just requires SSE2.
...
llvm-svn: 49986
2008-04-20 05:52:46 +00:00
3b18762f40
Switch to using Simplified ConstantFP::get API.
...
llvm-svn: 49977
2008-04-20 00:41:09 +00:00
5102bd9359
64-bit atomic operations.
...
llvm-svn: 49949
2008-04-19 02:30:38 +00:00
5e7ee0a002
Also LXCHG64 -> XCHG64rm.
...
llvm-svn: 49948
2008-04-19 02:05:42 +00:00
51096affb5
PPC32 atomic operations.
...
llvm-svn: 49947
2008-04-19 01:30:48 +00:00
7f4240a47c
xchg which references a memory operand does not need to lock prefix. Atomicity is guaranteed.
...
llvm-svn: 49946
2008-04-19 01:20:30 +00:00
ad4071a9e1
Fix the handling of va_copy on x86-64. As of llvm-gcc r49920
...
llvm-gcc is now lowering va_copy on x86-64, so this completes
the fix for PR2230.
llvm-svn: 49922
2008-04-18 20:55:41 +00:00
00bd8d904a
- Fix atomic operation JIT encoding.
...
- Remove unused instructions.
llvm-svn: 49921
2008-04-18 20:55:36 +00:00
5879213597
Also support Intel asm syntax.
...
llvm-svn: 49878
2008-04-17 23:35:10 +00:00
4704baa555
Fix assembly code for atomic operations.
...
llvm-svn: 49869
2008-04-17 21:26:35 +00:00
147cb764b5
Don't forget about sub-register indices when rematting instructions.
...
llvm-svn: 49830
2008-04-16 23:44:44 +00:00
c1279f5e4b
Unbreak build on x86-64.
...
llvm-svn: 49822
2008-04-16 22:24:33 +00:00
a7557dfe71
Correlate stubs with functions in JIT: when emitting a stub, the JIT tells the memory manager which function
...
the stub will resolve.
llvm-svn: 49814
2008-04-16 20:46:05 +00:00
ae84bbdbed
Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented
...
llvm-svn: 49809
2008-04-16 20:10:13 +00:00
a15cee1036
Initialize X863DNowLevel.
...
llvm-svn: 49808
2008-04-16 19:03:02 +00:00
a3ee1a38a3
Ongoing work on improving the instruction selection infrastructure:
...
Rename SDOperandImpl back to SDOperand.
Introduce the SDUse class that represents a use of the SDNode referred by
an SDOperand. Now it is more similar to Use/Value classes.
Patch is approved by Dan Gohman.
llvm-svn: 49795
2008-04-16 16:15:27 +00:00
d43d3beeb0
Add support for the form of the SSE41 extractps instruction that
...
puts its result in a 32-bit GPR.
llvm-svn: 49762
2008-04-16 02:32:24 +00:00
8c99ccaf96
Recreate the size SDNode instead of reusing the old one in the x86
...
memcpy lowering code; this ensures that the size node has the desired
result type. This fixes a regression from r49572 with @llvm.memcpy.i64
on x86-32.
llvm-svn: 49761
2008-04-16 01:32:32 +00:00
3dd8ba6235
Remove X86_64SRet; it isn't used anymore.
...
llvm-svn: 49759
2008-04-16 00:24:30 +00:00
01a5d36d9d
Add movd instructions to move from MMX registers
...
to 64-bit GPR registers on x86-64.
llvm-svn: 49757
2008-04-15 23:55:07 +00:00
7000c8f1aa
Change Divided flag to Split, as suggested by Evan
...
llvm-svn: 49715
2008-04-15 08:08:50 +00:00
4fff979a43
Remove unnecessary <sstream> includes.
...
llvm-svn: 49681
2008-04-14 20:40:47 +00:00
2505d86783
Fix const-correctness issues with the SrcValue handling in the
...
memory intrinsic expansion code.
llvm-svn: 49666
2008-04-14 17:55:48 +00:00
876224b1e8
Reverse sense of unwind-tables option. This means
...
stack tracebacks on Darwin x86-64 won't work by default;
nevertheless, everybody but me thinks this is a good idea.
llvm-svn: 49663
2008-04-14 17:54:17 +00:00
dcc2eda5fc
Add a divided flag for the first piece of an argument divided into mulitple parts. Fixes PR1643
...
llvm-svn: 49611
2008-04-13 13:40:22 +00:00
b9f38f38fa
Provide option for stack alignment override
...
llvm-svn: 49593
2008-04-12 22:12:22 +00:00
634fc9a33a
This patch corrects the handling of byval arguments for tailcall
...
optimized x86-64 (and x86) calls so that they work (... at least for
my test cases).
Should fix the following problems:
Problem 1: When i introduced the optimized handling of arguments for
tail called functions (using a sequence of copyto/copyfrom virtual
registers instead of always lowering to top of the stack) i did not
handle byval arguments correctly e.g they did not work at all :).
Problem 2: On x86-64 after the arguments of the tail called function
are moved to their registers (which include ESI/RSI etc), tail call
optimization performs byval lowering which causes xSI,xDI, xCX
registers to be overwritten. This is handled in this patch by moving
the arguments to virtual registers first and after the byval lowering
the arguments are moved from those virtual registers back to
RSI/RDI/RCX.
llvm-svn: 49584
2008-04-12 18:11:06 +00:00
544ab2c50b
Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
...
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.
Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.
This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.
Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.
This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.
llvm-svn: 49572
2008-04-12 04:36:06 +00:00
8c7cf88f7e
Fix a bug that prevented x86-64 from using rep.movsq for
...
8-byte-aligned data.
llvm-svn: 49571
2008-04-12 02:35:39 +00:00
7417348a7e
80 col fix
...
llvm-svn: 49569
2008-04-12 00:47:57 +00:00
aeb23a8a34
add a note, this is actually not too bad to implement.
...
llvm-svn: 49466
2008-04-10 05:54:50 +00:00
c692188075
move the x86-32 part of PR2108 here.
...
llvm-svn: 49465
2008-04-10 05:37:47 +00:00
ad75302497
Fix the x86-64 side of PR2108 by adding a v2f64 version of
...
MOVZQI2PQIrr. This would be better handled as a dag combine
(with the goal of eliminating the bitconvert) but I don't know
how to do that safely. Thoughts welcome.
llvm-svn: 49463
2008-04-10 05:13:43 +00:00
33b3300178
Make isVectorClearMaskLegal's operand list const.
...
llvm-svn: 49446
2008-04-09 20:09:42 +00:00
3d074a3125
Add XMM1 as a second return value register for f32 and f64 on x86-64. This
...
is needed for the x86-64-ABI handling of structs that contain floating-point
members that are returned by value.
llvm-svn: 49441
2008-04-09 17:54:37 +00:00
cbf87313a2
Add DX as a second return value register for i16 on x86.
...
llvm-svn: 49440
2008-04-09 17:53:38 +00:00
4c0c018bc5
Rename -disable-required-unwind-tables to unwind-tables-optional.
...
llvm-svn: 49389
2008-04-08 18:07:49 +00:00
fe767621ca
Handle the situation in 2008-01-25-EmptyFunction.ll
...
correctly when unwind info is being generated.
llvm-svn: 49366
2008-04-08 00:37:56 +00:00
344aec2952
Implement new llc flag -disable-required-unwind-tables.
...
Corresponds to -fno-unwind-tables (usually default in gcc).
llvm-svn: 49361
2008-04-08 00:10:24 +00:00
3bc3ddd638
Rename MemOperand to MachineMemOperand. This was suggested by
...
review feedback from Chris quite a while ago. No functionality
change.
llvm-svn: 49348
2008-04-07 19:35:22 +00:00
51f532f92d
Re-commit of the r48822, where the infinite looping problem discovered
...
by Dan Gohman is fixed.
llvm-svn: 49330
2008-04-07 10:06:32 +00:00
e9ecc68d8f
API changes for class Use size reduction, wave 1.
...
Specifically, introduction of XXX::Create methods
for Users that have a potentially variable number of
Uses.
llvm-svn: 49277
2008-04-06 20:25:17 +00:00
f77b5ef3d0
Favors pshufd over shufps when shuffling elements from one vector. pshufd is faster than shufps.
...
llvm-svn: 49244
2008-04-05 00:30:36 +00:00
b20e659770
strdup needs <cstring>. This fixes a build error with g++-4.3.
...
llvm-svn: 49218
2008-04-04 16:08:00 +00:00
6c66bd368e
Re-enable SSE4.
...
llvm-svn: 49158
2008-04-03 08:53:29 +00:00
6db4b4cc65
Fix x86-64 encoding bug. REX prefix must always follow 0x0F prefix. For example, extractps in 64bit mode: 66 REX 0F 3A 17, not 66 0F 3A REX 17.
...
llvm-svn: 49157
2008-04-03 08:53:17 +00:00
d9129d1de3
Cosmetic
...
llvm-svn: 49156
2008-04-03 07:45:18 +00:00
3063c5546e
Temporarily disabling SSE4 until we fix the encoding issues.
...
llvm-svn: 49129
2008-04-03 04:49:54 +00:00
025cea1126
Backing out 48222 temporarily.
...
llvm-svn: 49124
2008-04-03 03:13:16 +00:00
bd72cea737
Suppress the 128-bit integer typedef on 32-bit targets, because
...
it causes compile errors.
llvm-svn: 49122
2008-04-02 23:52:49 +00:00
39d8b26322
Partial CBackend support for 128-bit integers. This is needed
...
now that llvm-gcc is lowering appropriately-sized struct returns
to i128 on x86-64.
llvm-svn: 49109
2008-04-02 19:40:14 +00:00
8780ecbbac
Cosmetic changes per EH patch review feedback.
...
llvm-svn: 49096
2008-04-02 17:04:45 +00:00
Evan Cheng