Commit Graph

25308 Commits

Author SHA1 Message Date
Jim Grosbach 1ecf1fd5c8 remove extraneous #ifdef's
llvm-svn: 58006
2008-10-22 22:27:51 +00:00
Daniel Dunbar 890d0deb74 Add raw_ostream versions of WriteBitcodeToFile and BitcodeWriterPass.
- The old versions are still hanging around, but should be migrated
   away from.

llvm-svn: 57989
2008-10-22 17:39:14 +00:00
Dale Johannesen f6655a9e79 Remove allocation of unused stack slot.
llvm-svn: 57987
2008-10-22 17:26:06 +00:00
Julien Lerouge e9de15b88a Fix for PR2881: fix a small leak exposed by valgrind, using a ManagedStatic.
llvm-svn: 57984
2008-10-22 16:30:41 +00:00
Duncan Sands 8178141378 LegalizeTypes soft-float support for fpow.
llvm-svn: 57973
2008-10-22 11:49:09 +00:00
Duncan Sands 5ee1dde8fa Get this working with LegalizeTypes: (1) don't
assume that i64 has been turned into a BUILD_PAIR
node (when called from LegalizeTypes this hasn't
happened yet) and don't use a vector shuffle mask
with an illegal element type.

llvm-svn: 57972
2008-10-22 11:24:12 +00:00
Duncan Sands 578a68a91a Be nice to CellSPU: for this target getSetCCResultType
may return i8, which can result in SELECT nodes for
which the type of the condition is i8, but there are
no patterns for select with i8 condition.  Tweak the
LegalizeTypes logic to avoid this as much as possible.
This isn't a real fix because it is still perfectly
possible to end up with such select nodes - CellSPU
needs to be fixed IMHO.

llvm-svn: 57968
2008-10-22 09:23:20 +00:00
Duncan Sands 01a1c11218 Port from LegalizeDAG the logic to only generate
ADDC/ADDE/SUBC/SUBE if the target supports it.

llvm-svn: 57967
2008-10-22 09:07:29 +00:00
Duncan Sands a1a388cac3 Add some comments explaining the meaning of a boolean
that is not of type MVT::i1 in SELECT and SETCC nodes.
Relax the LegalizeTypes SELECT condition promotion
sanity checks to allow other condition types than i1.

llvm-svn: 57966
2008-10-22 09:06:24 +00:00
Duncan Sands 4b6b5fcd80 Temporarily allow the operands of a BUILD_VECTOR
to have a different type to the vector element
type.  This should be fairly harmless because in
the past guys like this were being built all over
the place (and were cleaned up when I added this
check).  The reason for relaxing this check is
that it helps LegalizeTypes legalize vector
shuffles: the mask is a BUILD_VECTOR that it is
*not always possible* to legalize while keeping it
a BUILD_VECTOR (vector_shuffle requires the mask
to be a BUILD_VECTOR, as opposed to a vector with
the right vector type).  With this check it is even
harder to legalize the mask - turning the check off
means that LegalizeTypes manages to legalize almost
all vector shuffles encountered in practice.  The
correct solution is to change vector_shuffle to be a
variadic node with the mask built into it as operands.
While waiting for that change, this hack stops the
problem with vector_shuffle from blocking the turning
on of LegalizeTypes.

llvm-svn: 57965
2008-10-22 09:00:33 +00:00
Chris Lattner 35b40f8c2f Fix PR2907 by digging through constant expressions to find FP constants that
are their operands.

llvm-svn: 57956
2008-10-22 04:53:16 +00:00
Daniel Dunbar 81b5fa5620 Move Print*Pass to use raw_ostream.
llvm-svn: 57946
2008-10-22 03:25:22 +00:00
Oscar Fuentes f3c03b02dc CMake: Turned some libraries into partially linked objects. Corrected
names of LLVMCore and ARMCodeGen.

llvm-svn: 57943
2008-10-22 02:51:53 +00:00
Dale Johannesen cf4607fcce Adjust comments for pedantic satisfaction.
llvm-svn: 57940
2008-10-22 00:02:32 +00:00
Oscar Fuentes 7089213eec CMake: updated lib/VMCore/CMakeLists.txt
llvm-svn: 57937
2008-10-21 23:52:03 +00:00
Daniel Dunbar 54d5b9ea2c Privatize PrintModulePass and PrintFunctionPass and add
createPrintModulePass and createPrintFunctionPass.
 - So clients who compile w/o RTTI can use them.

llvm-svn: 57933
2008-10-21 23:33:38 +00:00
Dale Johannesen 3d7ece1acb Add comments to explain uint64->f64 algorithm,
well, sort of.  (Algorithm by Ian Ollmann.)

llvm-svn: 57932
2008-10-21 23:07:49 +00:00
Dale Johannesen 28929589e7 Add an SSE2 algorithm for uint64->f64 conversion.
The same one Apple gcc uses, faster.  Also gets the
extreme case in gcc.c-torture/execute/ieee/rbug.c
correct which we weren't before; this is not
sufficient to get the test to pass though, there
is another bug.

llvm-svn: 57926
2008-10-21 20:50:01 +00:00
Dan Gohman 8b44b88eff Fix SelectionDAGBuild lowering of Select instructions to
handle first-class aggregate values. Also, fix a bug in
the Ret handling for empty aggregates.

llvm-svn: 57925
2008-10-21 20:00:42 +00:00
Daniel Dunbar 1ca20df437 Clear raw_fd_ostream error string on success and explain behavior in
documentation.

Add C++ header marker.

llvm-svn: 57923
2008-10-21 19:53:10 +00:00
Dan Gohman 4ddf7a4c22 Implement the optimized FCMP_OEQ/FCMP_UNE code for x86 fast-isel.
llvm-svn: 57915
2008-10-21 18:24:51 +00:00
Jim Grosbach cfebc18d7c use pre-UAL mnemonics for push/pop for compilaton callback function
llvm-svn: 57911
2008-10-21 16:54:12 +00:00
Nuno Lopes 94844e2054 fix a tricky bug in the JIT global variable emitter, that was triggered when JITing a variable independently of a function. This lead to sharing memory memory between functions and GVs thus changing the value of a GV could change the code in execution. more details on the ML.
llvm-svn: 57900
2008-10-21 11:42:16 +00:00
Dan Gohman c14e5227f0 Disable constant-offset folding for PowerPC, as the PowerPC target
isn't yet prepared for it.

llvm-svn: 57886
2008-10-21 03:41:46 +00:00
Dan Gohman 269246b034 Don't create TargetGlobalAddress nodes with offsets that don't fit
in the 32-bit signed offset field of addresses. Even though this
may be intended, some linkers refuse to relocate code where the
relocated address computation overflows.

Also, fix the sign-extension of constant offsets to use the
actual pointer size, rather than the size of the GlobalAddress
node, which may be different, for example on x86-64 where MVT::i32
is used when the address is being fit into the 32-bit displacement
field.

llvm-svn: 57885
2008-10-21 03:38:42 +00:00
Dan Gohman 97d95d6d85 Optimized FCMP_OEQ and FCMP_UNE for x86.
Where previously LLVM might emit code like this:

        ucomisd %xmm1, %xmm0
        setne   %al
        setp    %cl
        orb     %al, %cl
        jne     .LBB4_2

it now emits this:

        ucomisd %xmm1, %xmm0
        jne     .LBB4_2
        jp      .LBB4_2

It has fewer instructions and uses fewer registers, but it does
have more branches. And in the case that this code is followed by
a non-fallthrough edge, it may be followed by a jmp instruction,
resulting in three branch instructions in sequence. Some effort
is made to avoid this situation.

To achieve this, X86ISelLowering.cpp now recognizes FCMP_OEQ and
FCMP_UNE in lowered form, and replace them with code that emits
two branches, except in the case where it would require converting
a fall-through edge to an explicit branch.

Also, X86InstrInfo.cpp's branch analysis and transform code now
knows now to handle blocks with multiple conditional branches. It
uses loops instead of having fixed checks for up to two
instructions. It can now analyze and transform code generated
from FCMP_OEQ and FCMP_UNE.

llvm-svn: 57873
2008-10-21 03:29:32 +00:00
Dan Gohman c835458da9 When the coalescer is doing rematerializing, have it remove
the copy instruction from the instruction list before asking the
target to create the new instruction. This gets the old instruction
out of the way so that it doesn't interfere with the target's
rematerialization code. In the case of x86, this helps it find
more cases where EFLAGS is not live.

Also, in the X86InstrInfo.cpp, teach isSafeToClobberEFLAGS to check
to see if it reached the end of the block after scanning each
instruction, instead of just before. This lets it notice when the
end of the block is only two instructions away, without doing any
additional scanning.

These changes allow rematerialization to clobber EFLAGS in more
cases, for example using xor instead of mov to set the return value
to zero in the included testcase.

llvm-svn: 57872
2008-10-21 03:24:31 +00:00
Dan Gohman 97d3f6cfe3 Make the NaN test come second, heuristically assuming
that NaNs are less common.

llvm-svn: 57871
2008-10-21 03:12:54 +00:00
Dan Gohman 72e66eedb8 Use Function::getEntryBlock() instead of Function::front(), for clarity.
llvm-svn: 57870
2008-10-21 03:10:28 +00:00
Oscar Fuentes 0e12e5b12c CMake: updated lib/CodeGen/CMakeLists.txt
llvm-svn: 57869
2008-10-21 02:37:50 +00:00
Dan Gohman fa29b67aee Fix a bug that prevented llvm-extract -delete from working.
llvm-svn: 57864
2008-10-21 01:08:07 +00:00
Chris Lattner 4396e0d2c3 Fix gcc.c-torture/compile/920520-1.c by inserting bitconverts
for strange asm conditions earlier.  In this case, we have a
double being passed in an integer reg class.  Convert to like
sized integer register so that we allocate the right number 
for the class (two i32's for the f64 in this case).

llvm-svn: 57862
2008-10-21 00:45:36 +00:00
Evan Cheng 7e721ecd21 Add skeleton for the pre-register allocation live interval splitting pass.
llvm-svn: 57847
2008-10-20 21:44:59 +00:00
Jim Grosbach 9396051e3d Update the stub and callback code to handle lazy compilation. The stub
is re-written by the callback to branch directly to the compiled code
in future invocations.

Added back in range-based memory permission functions for the updating of
the stub on Darwin.

llvm-svn: 57846
2008-10-20 21:39:23 +00:00
Dan Gohman 1a59b3b9b8 Fast-isel no longer an experiment.
llvm-svn: 57845
2008-10-20 21:30:12 +00:00
Evan Cheng bc623edaba Add a register class -> virtual registers map.
llvm-svn: 57844
2008-10-20 20:03:28 +00:00
Duncan Sands aac74a9055 Support operations like fp_to_uint with a vector
result type when the result type is legal but
not the operand type.  Add additional support
for EXTRACT_SUBVECTOR and CONCAT_VECTORS,
needed to handle such cases.

llvm-svn: 57840
2008-10-20 16:31:21 +00:00
Duncan Sands e0fb87acf6 LegalizeTypes support for atomic operation promotion.
llvm-svn: 57838
2008-10-20 16:17:42 +00:00
Duncan Sands 840143fc6f Use DAG.getIntPtrConstant rather than DAG.getConstant
with TLI.getPointerTy for a small simplification.

llvm-svn: 57837
2008-10-20 16:14:43 +00:00
Duncan Sands 5805334d5b Always use either MVT::i1 or getSetCCResultType for
the condition of a SELECT node.  Make sure that the
correct extension type (any-, sign- or zero-extend)
is used.

llvm-svn: 57836
2008-10-20 16:13:04 +00:00
Duncan Sands fe9b5550de Formatting - no functional change.
llvm-svn: 57834
2008-10-20 16:06:47 +00:00
Duncan Sands 3ed8b29ace Don't use a random type for the select condition,
use an MVT::i1 and simplify the code while there.

llvm-svn: 57833
2008-10-20 16:04:57 +00:00
Duncan Sands 1d20ab5784 Have X86 custom lowering for LegalizeTypes use
LowerOperation if it doesn't know what else to do.
This methods should probably be factorized some,
but this is good enough for the moment.  Have
LowerATOMIC_BINARY_64 use EXTRACT_ELEMENT rather
than assuming the operand is a BUILD_PAIR (if it
is then getNode will automagically simplify the
EXTRACT_ELEMENT).  This way LowerATOMIC_BINARY_64
usable from LegalizeTypes.

llvm-svn: 57831
2008-10-20 15:56:33 +00:00
Bill Wendling 8ec2a4a96c Set N->OperandList to 0 after deletion. Otherwise, it's possible that it will
be either deleted or referenced afterwards.

llvm-svn: 57786
2008-10-19 20:51:12 +00:00
Bill Wendling 6c87bfc6fd Fix comment. Other formatting changes. No functionality changes.
llvm-svn: 57785
2008-10-19 20:34:04 +00:00
Duncan Sands 8d11adca4c Vector shuffle mask elements may be "undef". Handle
this everywhere in LegalizeTypes.

llvm-svn: 57783
2008-10-19 15:00:25 +00:00
Duncan Sands c6d12bd665 Use a legal integer type for vector shuffle mask
elements.  Otherwise LegalizeTypes will, reasonably
enough, legalize the mask, which may result in it
no longer being a BUILD_VECTOR node (LegalizeDAG
simply ignores the legality or not of vector masks).

llvm-svn: 57782
2008-10-19 14:58:05 +00:00
Chris Lattner 160e8abd77 Reapply r57699 with a fix to not crash on asms with multiple results. Unlike
the previous patch this one actually passes make check.

"Fix PR2356 on PowerPC: if we have an input and output that are tied together
that have different sizes (e.g. i32 and i64) make sure to reserve registers for
the bigger operand."

llvm-svn: 57771
2008-10-18 18:49:30 +00:00
Dan Gohman 727a94063c Don't truncate GlobalAddress offsets to int in debug output.
llvm-svn: 57770
2008-10-18 18:22:42 +00:00
Evan Cheng 2dadd3bbc6 By min, I mean max.
llvm-svn: 57766
2008-10-18 05:21:37 +00:00