Commit Graph

6232 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen ba0e124aaf Revert r109652, and remove the offending assert in loadRegFromStackSlot instead.
We do sometimes load from a too small stack slot when dealing with x86 arguments
(varargs and smaller-than-32-bit args). It looks like we know what we are doing
in those cases, so I am going to remove the assert instead of artifically
enlarging stack slot sizes.

The assert in storeRegToStackSlot stays in. We don't want to write beyond the
bounds of a stack slot.

llvm-svn: 109764
2010-07-29 17:42:27 +00:00
Jakob Stoklund Olesen f2234fbe70 Create a fixed stack object for varargs that is as large as any register.
The size of this object isn't used for anything - technically it is of variable
size.

This avoids a false positive from the assert in
X86InstrInfo::loadRegFromStackSlot, and fixes PR7735.

llvm-svn: 109652
2010-07-28 20:55:38 +00:00
Nate Begeman 53afc8f06a Implement a vectorized algorithm for <16 x i8> << <16 x i8>
This is about 4x faster and smaller than the existing scalarization.

llvm-svn: 109566
2010-07-28 00:21:48 +00:00
Nate Begeman 269a6da023 ~40% faster vector shl <4 x i32> on SSE 4.1 Larger improvements for smaller types coming in future patches.
For:

define <2 x i64> @shl(<4 x i32> %r, <4 x i32> %a) nounwind readnone ssp {
entry:
  %shl = shl <4 x i32> %r, %a                     ; <<4 x i32>> [#uses=1]
  %tmp2 = bitcast <4 x i32> %shl to <2 x i64>     ; <<2 x i64>> [#uses=1]
  ret <2 x i64> %tmp2
}

We get:

_shl:                                   ## @shl
	pslld	$23, %xmm1
	paddd	LCPI0_0, %xmm1
	cvttps2dq	%xmm1, %xmm1
	pmulld	%xmm1, %xmm0
	ret

Instead of:

_shl:                                   ## @shl
	pshufd	$3, %xmm0, %xmm2
	movd	%xmm2, %eax
	pshufd	$3, %xmm1, %xmm2
	movd	%xmm2, %ecx
	shll	%cl, %eax
	movd	%eax, %xmm2
	pshufd	$1, %xmm0, %xmm3
	movd	%xmm3, %eax
	pshufd	$1, %xmm1, %xmm3
	movd	%xmm3, %ecx
	shll	%cl, %eax
	movd	%eax, %xmm3
	punpckldq	%xmm2, %xmm3
	movd	%xmm0, %eax
	movd	%xmm1, %ecx
	shll	%cl, %eax
	movd	%eax, %xmm2
	movhlps	%xmm0, %xmm0
	movd	%xmm0, %eax
	movhlps	%xmm1, %xmm1
	movd	%xmm1, %ecx
	shll	%cl, %eax
	movd	%eax, %xmm0
	punpckldq	%xmm0, %xmm2
	movdqa	%xmm2, %xmm0
	punpckldq	%xmm3, %xmm0
	ret

llvm-svn: 109549
2010-07-27 22:37:06 +00:00
Michael J. Spencer f8270bdb2d Make MC use Windows COFF on Windows and add tests.
llvm-svn: 109494
2010-07-27 06:46:15 +00:00
Jakob Stoklund Olesen 96a890a7f8 The isLoadFromStackSlot and isStoreToStackSlot have no way of reporting
subregister operands like this:

%reg1040:sub_32bit<def> = MOV32rm <fi#-2>, 1, %reg0, 0, %reg0, %reg1040<imp-def>; mem:LD4[FixedStack-2](align=8)

Make them return false when subreg operands are present. VirtRegRewriter is
making bad assumptions otherwise.

This fixes PR7713.

llvm-svn: 109489
2010-07-27 04:17:01 +00:00
Jakob Stoklund Olesen c3c05ed02e Add assertions that expose the PR7713 miscompilation: Accessing a stack slot
with a too-big register class.

llvm-svn: 109488
2010-07-27 04:16:58 +00:00
Evan Cheng d4218b8793 On x86, f32 / f64 nodes share the same registers as 128-bit vector values.
llvm-svn: 109450
2010-07-26 21:50:05 +00:00
Bruno Cardoso Lopes 36c2ea6c7a Temporary hack to let codegen assert or generate poor code in case
we are using AVX and no AVX version of the desired intruction is present,
this is better for incremental dev (without fallbacks it's easier to spot
what's missing). Not sure this is the best hack thought (we can also disable
all HasSSE* predicates by dinamically marking them 'false' if AVX is present)

llvm-svn: 109434
2010-07-26 21:01:18 +00:00
Evan Cheng 37b740c4bf Add an ILP scheduler. This is a register pressure aware scheduler that's
appropriate for targets without detailed instruction iterineries.
The scheduler schedules for increased instruction level parallelism in
low register pressure situation; it schedules to reduce register pressure
when the register pressure becomes high.

On x86_64, this is a win for all tests in CFP2000. It also sped up 256.bzip2
by 16%.

llvm-svn: 109300
2010-07-24 00:39:05 +00:00
Bruno Cardoso Lopes 306a1f9721 Support x86 "eiz" and "riz" pseudo index registers in the assembler.
llvm-svn: 109295
2010-07-24 00:06:39 +00:00
Bruno Cardoso Lopes d65cd1d581 Remove trailing whitespace
llvm-svn: 109276
2010-07-23 22:15:26 +00:00
Bruno Cardoso Lopes ea0e05a3ce Add AVX version of CLMUL instructions
llvm-svn: 109248
2010-07-23 18:41:12 +00:00
Bruno Cardoso Lopes d618c8ac64 Declare CLMUL as a subtarget feature
llvm-svn: 109207
2010-07-23 01:22:45 +00:00
Bruno Cardoso Lopes 09dc24beac Add x86 CLMUL (Carry-less multiplication) cpu feature
llvm-svn: 109206
2010-07-23 01:17:51 +00:00
Bruno Cardoso Lopes acd9230b1b Add complete assembler support for FMA3 instructions, with descriptions and encodings taken from the AVX manual
llvm-svn: 109204
2010-07-23 00:54:35 +00:00
Dale Johannesen f2d75670b7 The only supported calling convention for X86-64 uses
SSE, so we can't return floating point values if this
is disabled.  Detect this error for clang.

With SSE1 only, f64 is a problem; it can be done, but
neither llvm-gcc nor clang has ever generated correct
code for it.  Since nobody noticed this I think it's
OK to treat it as an error for now.

This also handles SSE-sized vectors of floating point.
8207686, 8204109.

llvm-svn: 109201
2010-07-23 00:30:35 +00:00
Bruno Cardoso Lopes e29e389678 Fix some AVX instructions which didnt had HasAVX prefix. And also a problem with PINSRW, which was totally wrong because of a typo I introduced previously
llvm-svn: 109198
2010-07-23 00:14:54 +00:00
Bruno Cardoso Lopes 0710c74f29 Add remaining AVX instructions (most of them dealing with GR64 destinations. This complete the assembler support for the general AVX ISA. But we still miss instructions from FMA3 and CLMUL specific feature flags, which are now the next step
llvm-svn: 109168
2010-07-22 21:18:49 +00:00
Chris Lattner 8f3adc9057 remove the JIT "NeedsExactSize" feature and supporting logic.
llvm-svn: 109167
2010-07-22 21:17:55 +00:00
Chris Lattner b3f608bbba X86MCInstLower now depends on AsmPrinter being around.
llvm-svn: 109154
2010-07-22 21:10:04 +00:00
Chris Lattner 083be4d384 instead of migrating it to the MC instruction encoder, just
rip out the implementation of X86InstrInfo::GetInstSizeInBytes.
The code being ripped out just implemented a copy and hacked up
version of the (old) instruction encoder, and is buggy and 
terrible in other ways.  Since "GetInstSizeInBytes" is really 
only there to support the JIT's "NeedsExactSize" hook (which
noone is using), just rip out the code.  I will rip out the
NeedsExactSize hook next.

This resolves rdar://7617809 - switch X86InstrInfo::GetInstSizeInBytes to use X86MCCodeEmitter

llvm-svn: 109149
2010-07-22 21:05:13 +00:00
Chandler Carruth 3180f9f55f Attempt to fix linking issues with CMake. Please review other CMake users,
especially on other platforms. Is there a better way to fix this.

llvm-svn: 109084
2010-07-22 06:27:45 +00:00
Eric Christopher 9a77382685 Custom lower the memory barrier instructions and add support
for lowering without sse2.  Add a couple of new testcases.

Fixes a few libgomp tests and latent bugs.  Remove a few todos.

llvm-svn: 109078
2010-07-22 02:48:34 +00:00
Eric Christopher a4c435f1fa 80-columns.
llvm-svn: 109070
2010-07-22 00:26:08 +00:00
Nate Begeman 68a069a188 Make fast isel win64-aware w.r.t. call-clobbered regs
llvm-svn: 109069
2010-07-22 00:09:39 +00:00
Bruno Cardoso Lopes e3acfd4d58 Add more 256-bit forms for a bunch of regular AVX instructions
Add 64-bit (GR64) versions of some instructions (which are not
described in their SSE forms, but are described in AVX)

llvm-svn: 109063
2010-07-21 23:53:50 +00:00
Rafael Espindola 350b1a449f Fixes win64. It was broken by a previous patch where I missed the !isWin64
and then forced every register to be a vr128 on win64.

llvm-svn: 109060
2010-07-21 23:19:57 +00:00
Chris Lattner 5c91a5e747 add some rough support for making mcinst lowering work without an
asmprinter or mangler around.  This is option #B for killing off 
X86InstrInfo::GetInstSizeInBytes.  Option #A (killing 
"needsexactsize") was sent for consideration to llvmdev.

llvm-svn: 109056
2010-07-21 23:03:35 +00:00
Bruno Cardoso Lopes 6238c1d102 Add missing AVX convert instructions. Those instructions are not described in their SSE forms (although they exist), but add the AVX forms anyway, so the assembler can benefit from it
llvm-svn: 109039
2010-07-21 21:37:59 +00:00
Nate Begeman 784e062b2a Fix a couple issues with Win64 ABI
1) all registers were spilled as xmm, regardless of actual size
2) win64 abi doesn't do the varargs-size-in-%al thing

Still to look into:

xmm6-15 are marked as clobbered by call instructions on win64 even though they aren't.

llvm-svn: 109035
2010-07-21 20:49:52 +00:00
Bruno Cardoso Lopes 19b3830142 Avoid AVX instructions to be selected instead of its SSE form
llvm-svn: 109032
2010-07-21 20:38:42 +00:00
Eric Christopher d27913e516 Pulling out previous patch, must've run the tests in
the wrong directory.

llvm-svn: 109005
2010-07-21 09:23:56 +00:00
Eric Christopher b2d1067024 Lower MEMBARRIER on x86 and support processors without SSE2.
Fixes a pile of libgomp failures in the llvm-gcc testsuite due
to the libcall not existing.

llvm-svn: 109004
2010-07-21 09:05:23 +00:00
Bruno Cardoso Lopes cdbec62510 Add AVX only vzeroall and vzeroupper instructions
llvm-svn: 109002
2010-07-21 08:56:24 +00:00
Bruno Cardoso Lopes 3499934da6 Add new AVX vpermilps, vpermilpd and vperm2f128 instructions
llvm-svn: 108984
2010-07-21 03:07:42 +00:00
Bruno Cardoso Lopes 3ceaf7a0a2 Add new AVX vmaskmov instructions, and also fix the VEX encoding bits to support it
llvm-svn: 108983
2010-07-21 02:46:58 +00:00
Bruno Cardoso Lopes e706501975 Add new AVX vextractf128 instructions
llvm-svn: 108964
2010-07-20 23:19:02 +00:00
Chris Lattner 41ff5d4d91 make asmprinter optional, even though passing in null will cause things to explode right now.
llvm-svn: 108955
2010-07-20 22:45:33 +00:00
Chris Lattner b4dc58975b continue pushing dependencies around.
llvm-svn: 108952
2010-07-20 22:35:40 +00:00
Chris Lattner 2366d95af9 reduce X86MCInstLower dependencies on asmprinter.
llvm-svn: 108950
2010-07-20 22:30:53 +00:00
Chris Lattner 7fbdd7c852 pass around MF, not MMI.
llvm-svn: 108949
2010-07-20 22:26:07 +00:00
Chris Lattner d3f3a89425 cleanups.
llvm-svn: 108947
2010-07-20 22:23:57 +00:00
Chris Lattner 5ca516b87c move two asmprinter methods into the asmprinter .cpp file.
llvm-svn: 108945
2010-07-20 22:18:19 +00:00
Bruno Cardoso Lopes 3b505848fd Add new AVX instruction vinsertf128
llvm-svn: 108892
2010-07-20 19:44:51 +00:00
Eric Christopher 4adaccf0bf Constify some arguments.
llvm-svn: 108812
2010-07-20 06:52:21 +00:00
Bruno Cardoso Lopes 14c5fd437c Add AVX vbroadcast new instruction
llvm-svn: 108788
2010-07-20 00:11:13 +00:00
Daniel Dunbar 0aff8033c6 Update CMake files.
llvm-svn: 108787
2010-07-20 00:08:13 +00:00
Chris Lattner 64fffadad3 fix a layering problem by moving the x86 implementation
of AsmPrinter and InstLowering into libx86 and out of the
asmprinter subdirectory.  Now X86/AsmPrinter just depends on
MC stuff, not all of codegen and LLVM IR.

llvm-svn: 108782
2010-07-19 23:41:57 +00:00
Bruno Cardoso Lopes 9de0ca73d4 Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions!
llvm-svn: 108769
2010-07-19 23:32:44 +00:00