Commit Graph

411787 Commits

Author SHA1 Message Date
Jon Chesterfield e35c8f541c [openmp][amdgpu] Temporarily disable tests on old runtime 2022-01-19 15:39:00 +00:00
Fraser Cormack b8cb79404b [LangRef] Mangle all vector operands in insert/extract intrinsics
This better matches the canonical mangling of these intrinsics.

Reviewed By: peterwaller-arm

Differential Revision: https://reviews.llvm.org/D117675
2022-01-19 15:23:15 +00:00
Matt Arsenault adab71711e AMDGPU/GlobalISel: Fix legalize failure on i65 ctpop 2022-01-19 10:26:28 -05:00
Jay Foad 63eea41de6 [AMDGPU] Simplify SILoadStoreOptimizer::getSubRegIdxs. NFC. 2022-01-19 15:20:35 +00:00
Matt Arsenault b965617ccc GlobalISel: Fix assert on unmerge to different element of casted vector
This was failing if a G_UNMERGE_VALUES produced a different element
type than the cast result type.
2022-01-19 10:13:31 -05:00
Matt Arsenault 7f26a1027f AMDGPU/GlobalISel: Introduce pseudo to copy sp in call sequences
Arbitrary stack pointers are accessed using MUBUF instructions with
the voffset field, which is interpreted as the swizzled address. We
want to fold fold into the MUBUF form to use the SP in the SGPR
offset, and previously we were special casing the interpretation of
the pointer value if the access memory operand said it was relative to
the stack pointer.

690f5b7a01 removed this check, and moved
the DAG path to special casing copies from SGPRs. This is not an
entirely sound approach, since it's still changing the interpretation
of pointer values based the context.

Introduce a new pseudo which corresponds to the wave-to-vector address
transform. This way the memory instruction has consistent semantics
where the incoming pointer is always interpreted as a vector address,
and we're not obligated to optimize into the MUBUF offset-only
addressing mode. The DAG should probably have an equivalent pseudo.

This should fix some correctness issues, and folding this into
addressing modes will be a future optimization patch.
2022-01-19 10:13:31 -05:00
Haojian Wu 55b702c37b [clangd] NFC, emit source ranges in selection debug messages.
It will make the output more versbose, but I found that these are useful
information when debugging selection tree.

Differential Revision: https://reviews.llvm.org/D117475
2022-01-19 16:06:58 +01:00
Nikita Popov 0db30adcfb [MemCpyOpt] Test invalid noalias metadata after call slot opt (NFC) 2022-01-19 15:51:10 +01:00
Nikita Popov 4dc4815f56 [MemCpyOpt] Add some debug output to call slot optimization (NFC) 2022-01-19 15:51:10 +01:00
TCWG 9c4e93c71a [LLDB] Adjust compiler-full-path.test for Windows/Arm64
This patch updates compiler-full-path.test to make sure it passes on
Windows Arm64 platform with MSVC.
2022-01-19 19:47:03 +05:00
Sjoerd Meijer f269ec230e [LoopFlatten] Move it from LPM2 to LPM1
In D110057 we moved LoopFlatten to a LoopPassManager. This caused a performance
regression for our 64-bit targets (the 32-bit were unaffected), the pass is no
longer triggering for a motivating example. The reason is that the IR is just
very different than expected; we try to match loop statements and particular
uses of induction variables. The easiest is to just move LoopFlatten to a place
in the pipeline where the IR is as expected, which is just before
IndVarSimplify. This means we move it from LPM2 to LPM1, so that it actually
runs just a bit earlier from where it was running before. IndVarSimplify is
responsible for significant rewrites that are difficult to "look through" in
LoopFlatten.

Differential Revision: https://reviews.llvm.org/D116612
2022-01-19 14:38:05 +00:00
Sjoerd Meijer 016022e5da Recommit "[LoopFlatten] Move it to a LoopPassManager"
This was reverted because of a performance regression, which is fixed by
D116612 that I will commit directly after this change.

This reverts commit e92d63b467.
2022-01-19 14:38:05 +00:00
Kerry McLaughlin c740a07863 [LoopVectorize] Test in-loop reductions with tail folding for scalable vectors
Adds `-prefer-inloop-reductions` to the RUN line of sve-tail-folding.ll & adds
a new test where in-loop reductions cannot be used (`@cond_xor_reduction`). NFC.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D117578
2022-01-19 14:36:23 +00:00
Balazs Benics 881b6a009f [analyzer][NFC] Re-enable skipped SValTests by relaxing expectations
Some tests were skipped in D114454 to resolve test failures on some
platforms, where the pointers have different bitwidth than expected.
This patch re-enables these tests, by relaxing the requirements on the
types of the SVal.

The issue:
There is no way to reconstruct the type of the `SVal` perfectly
accurately, since there could be multiple types having the required
bitwidth and signedness.
Consider platforms where `int` and `long` have the same bitwidth.
Additionally, we need to be careful about casting a pointer to an
integral representation, because we don't know what smallest integral
type can represent that.

To workaround these issues, I propose enforcing a type that has the
same signedness and bitwidth as the expected type, instead of perfect
equality.

In the `GetLocAsIntType` test, in case of pointer-to-integral casts
I'm using the widest standard integral type (long long) to make sure
that the pointer can be represented by the type without losing
precision. This won't affect the test in any meaningful way, since the
type of the `lvalue` remained the same.

In one case, I had to replace `getUIntPtrType()` with `UnsignedLongTy`
because on some platforms `getUIntPtrType()` is different then `long
int`.

In this patch, I also enforce that the tests must compile without
errors, to prevent narrowing conversions in the future.

Reviewed By: stevewan

Differential Revision: https://reviews.llvm.org/D115349
2022-01-19 15:16:18 +01:00
luxufan dc18c5fa97 [JITLink] Add RISCV label subtraction and addition relocations
This patch add RISCV label subtraction and addition relocations in JITLink

Differential Revision: https://reviews.llvm.org/D116794
2022-01-19 22:12:56 +08:00
David Truby db04d3e30b
[AArch64][SVE][VLS] Move extends into arguments of comparisons
When a comparison is extended and it would be free to extend the
arguments to that comparison, we can propagate the extend into those arguments.
This prevents extra instructions being generated to extend the result of the
comparison, which is not free to extend.

Differential Revision: https://reviews.llvm.org/D116812
2022-01-19 14:11:45 +00:00
Valentin Clement 6df82597af
[flang][NFC] Fix indentation 2022-01-19 15:08:40 +01:00
Valentin Clement 64d7d5a597
[flang][NFC] Remove number of inlined elements
Following the recommendation just remove the specified number of
inlined elements since it is not well-motivated choice here.
2022-01-19 14:51:17 +01:00
Valentin Clement 367c4ed2f8
[flang][NFC] Fix includes order 2022-01-19 14:32:48 +01:00
Matthias Springer cd0a923b4c [mlir][linalg][bufferize][NFC] Move analysis-related code to Comprehensive Bufferize
The code in `BufferizableOpInterface`'s header/source no longer contains any analysis code. This makes it easier to run the bufferization with a different analysis or without any analysis.

Differential Revision: https://reviews.llvm.org/D117478
2022-01-19 22:25:36 +09:00
Marek Kurdej 5ea98988c6 [clang-format] [docs] Fix link to avoid redirection. NFC. 2022-01-19 14:23:04 +01:00
Ayke van Laethem ca27b026f9
[AVR] Do not clear r0 at interrupt entry
There is no reason to do this: it's a scratch register and can therefore
hold any arbitrary value. And because it is in an interrupt, this code
is performance critical so it should be as short as possible.

I believe r0 was cleared because of the following:

 1. There used to be a bug that the cleared register was r0, not r1 as
    it should have been.
 2. This was fixed in https://reviews.llvm.org/D99467, but left the code
    to clear r0.

This patch completes D99467 by removing the `clr r0` instruction.

Differential Revision: https://reviews.llvm.org/D116756
2022-01-19 14:22:13 +01:00
Ayke van Laethem 3d59d94a20
[AVR] Mark call-clobbered registers as clobbered in interrupt handlers
I have matched the RISCV backend, which only uses the interrupt save
list in getCalleeSavedRegs, _not_ in getCallPreservedMask. I don't know
the details of these two methods, but with it, the correct amount of
registers is saved and restored.

Without this patch, practically all interrupt handlers that call a
function will miscompile.

I have added a test to verify this behavior. I've also added a very
simple test to verify that more normal interrupt operations (in this
case, incrementing a global value) behave as expected.

Differential Revision: https://reviews.llvm.org/D116551
2022-01-19 14:22:13 +01:00
Ayke van Laethem f41d2d9469
[AVR] Remove redundant dynalloca SP save/restore pass
I think this pass was previously used under the assumption that most
functions would not need a frame pointer and it would be more efficient
to store the old stack pointer in a regular register pair.

Unfortunately, right now we're forced to always reserve the Y register
as a frame pointer: whether or not this is needed is only known after
regsiter allocation at which point it doesn't make sense anymore to mark
it as non-reserved. Therefore, it makes sense to use the Y register to
store the old stack pointer in functions with dynamic allocas (with a
variable size or not in the entry block). Knowing this can make the code
around dynamic allocas a lot simpler: simply save/restore the frame
pointer.

This is especially relevant in functions that have a frame pointer
anyway (for example, because they have stack spills). The stack restore
in the epilogue will implicitly restore the old stack pointer, so there
is no need to store the old stack pointer separately. It even reduces
register pressure as a side effect.

Differential Revision: https://reviews.llvm.org/D97815
2022-01-19 14:22:13 +01:00
Ayke van Laethem d649faff9c
[LLD][COFF] Support GNU style == aliases
D46245 added support for this in llvm-libtool, but while lld-link can
also create .lib files from .def files it didn't support aliases.

I compared the Inputs/library.def test against the output from
llvm-libtool and it matches, except for the fact that lld-link reorders
functions for some reason.

I have also verified that this fixes a bug I was running into while
trying to compile .def files to .lib files in MinGW-w64 (using lld-link
instead of llvm-libtool).

Differential Revision: https://reviews.llvm.org/D113365
2022-01-19 14:22:13 +01:00
Benjamin Kramer 579c4921c0 [bazel] Fix the python bindings for 7ceffae18c
Also run buildifier.
2022-01-19 14:21:21 +01:00
Haojian Wu 6c78703e3a [AST] Fix the incorrect auto-keyword loc for constrained auto type loc.
E.g.  `Concept auto Func();`

The nameLoc for the constained auto type loc pointed to the concept name
loc, it should be the auto token loc. This patch fixes it, and remove
a relevant hack in clang-tidy check.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D117009
2022-01-19 14:18:38 +01:00
Benjamin Kramer 73cc8dd2d7 [bazel] Port 7ceffae18c 2022-01-19 14:14:36 +01:00
Kadir Cetinkaya cae932b6c6
[clangd] Sort targets before printing for tests
Targets are not necessarily inserted in the order they appear in source
code. For example we could traverse overload sets, or selectively insert
template patterns after all other decls.
So order the targets before printing to make sure tests are not dependent on
such implementation details. We can also do it in production, but that might be
wasteful as we haven't seen any complaints in the wild around these orderings
yet.

Differential Revision: https://reviews.llvm.org/D117549
2022-01-19 14:06:53 +01:00
Matthias Springer 31355482e5 [mlir][linalg][bufferize][NFC] Split analysis-related code from BufferizationState/Options
This separates the analysis (and its helpers/data structures) more clearly from the rest of the bufferization.

Differential Revision: https://reviews.llvm.org/D117477
2022-01-19 21:59:23 +09:00
Denys Shabalin 19c3026891 [mlir] Fix PDL python bindings build
Fixes incorrect build definition for the bindings for the PDL dialect.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D117657
2022-01-19 13:58:55 +01:00
Jay Foad 0bc14a0a98 [AMDGPU] Tweak some compares in wqm.ll test
This prevents the compares from being optimized away when D86578 lands,
which seems unintended. Also fixed some unused results.
2022-01-19 12:42:56 +00:00
Jim Lin d6b0734837 [NFC] Use Register instead of unsigned 2022-01-19 20:17:04 +08:00
Nikita Popov 5ba73c924d [BuildLibCalls] Mark calloc as inaccessiblememonly
Now that DSE handles inaccessiblememonly calloc, mark it as such,
as we do with other memory allocation functions.
2022-01-19 12:55:09 +01:00
Nikita Popov 26f81984e7 [DSE] Handle inaccessiblememonly calloc
Change the DSE calloc handling to assume that it is
inaccessiblememonly, i.e. the defining access is liveOnEntry.

Differential Revision: https://reviews.llvm.org/D117543
2022-01-19 12:55:09 +01:00
Pavel Labath 903424532f [lldb] Introduce SBPlatform::SetSDKRoot
It complements the existing SBDebugger::SetCurrentPlatformSDKRoot and
allows one to set the sysroot of a platform without making it current.

Differential Revision: https://reviews.llvm.org/D117550
2022-01-19 12:49:47 +01:00
Pavel Labath b2a162e63b [lldb] Remove the requirement for windows clients to specify -DIMPORT_LIBLLDB
This macro was being used to select the proper import/export annotations
on SB classes. Non-windows clients do not have such requirements.

Instead introduce a new macro (LLDB_IN_LIBLLDB), which signals that
we're compiling liblldb itself (and should use dllexport). The default
(no macro) is to use dllimport. I've moved the macro definition to
SBDefines.h, since it only makes sense when building the API library.

Differential Revision: https://reviews.llvm.org/D117564
2022-01-19 12:49:47 +01:00
Pavel Labath 8bfa7a6dcc [lldb] Fix NativeThreadLinux to build with older compilers 2022-01-19 12:49:47 +01:00
Pavel Labath 6ff4af8e18 [lldb] Fix D114722 for python<=3.6
_Py_IsFinalizing was called _Py_Finalizing back then (and it was a
variable instead of a function).
2022-01-19 12:49:46 +01:00
Simon Pilgrim 6eb8fc9244 [X86] Add some missing dependency-breaking zero idiom patterns to scheduler models
Many of the x86 scheduler models are not accounting for their microarch's ability to handle dependency-breaking zero idioms (pxor xmm0,xmm0 etc.), which is causing some notable differences when comparing llvm-mca reports to iaca, uops.info etc.

These are based on the Intel AoMs and Agner's docs which list the instructions handled on each cpu model - there may be more, although tbh the xor/pxor/xorps/xorpd are by far the most commonly encountered.

Once this is in place we also need to review missing support for 'allones' idioms and reg-reg move elimination, but this needs fixing first.

@lebedev.ri The Barcelona test changes are due to the cpu still being tagged as using the SandyBridge model, if/when you get back to D63628 these will need to be addressed.

Based on an original patch by @andreadb (Andrea Di Biagio)

Differential Revision: https://reviews.llvm.org/D117497
2022-01-19 11:29:33 +00:00
Nikita Popov 42a68215a1 [AttrBuilder] Change storage to sorted vector (NFC)
This follows up on the work in D116599, which changed AttrBuilder
to store string attributes as SmallVector<Attribute>. This patch
changes the implementation to store *all* attributes as a sorted
vector.

This both makes the implementation simpler and improves compile-time.
We get a -0.5% geomean compile-time improvement on CTMark at O0.

Differential Revision: https://reviews.llvm.org/D117558
2022-01-19 12:29:04 +01:00
Nikita Popov d8bff13a8a [NFC] Add missing <map> includes
These were relying on a transitive include.
2022-01-19 12:29:03 +01:00
Ben Shi a2f488c6a5 [clang][AVR] Implement '__flashN' for variables on different flash banks
Reviewed By: aykevl

Differential Revision: https://reviews.llvm.org/D115982
2022-01-19 11:24:01 +00:00
Saiyedul Islam 6ee9654713
[Doc] Fix wrong indentation
Handle Sphinx's warning at line 218.
2022-01-19 11:15:31 +00:00
Nikita Popov da61cb019e [Attributes] Make attribute addition behavior consistent
Currently, the behavior when adding an attribute with the same key
as an existing attribute is inconsistent, depending on the type of
the attribute and the method used to add it. When going through
AttrBuilder::addAttribute(), the new attribute always overwrites
the old one. When going through AttrBuilder::merge() the new
attribute overwrites the existing one if it is a string attribute,
but keeps the existing one for int and type attributes. One
particular API also asserts that you can't overwrite an align
attribute, but does not handle any of the other int, type or string
attributes.

This patch makes the behavior consistent by always overwriting with
the new attribute, which is the behavior I would intuitively expect.
Two tests are affected, which now make a different (but equally
valid) choice. Those tests could be improved by taking the maximum
deref bytes, but I haven't bothered with that, since this is testing
a degenerate case -- the important bit is that it doesn't crash.

Differential Revision: https://reviews.llvm.org/D117552
2022-01-19 12:05:27 +01:00
Sjoerd Meijer d544a89a37 [LoopFlatten] Update MemorySSA state
I would like to move LoopFlatten from LoopPass Manager LPM2 to LPM1 (D116612),
but that is a LPM that is using MemorySSA and so LoopFlatten needs to preserve
MemorySSA and this adds that. More specifically, LoopFlatten restructures the
CFG and with this change the MSSA state is updated accordingly, where we also
update the DomTree. LoopFlatten doesn't rewrite/optimise/delete load or store
instructions, so I have not added any MSSA updates for that.

Differential Revision: https://reviews.llvm.org/D116660
2022-01-19 10:57:33 +00:00
Nikita Popov 93e8cd2685 [IR] Remove NumElements tracking from GEP type iterator
After ed0cdb2939, this is no longer
used by anything, and shouldn't be used by anything.
2022-01-19 11:50:15 +01:00
Saiyedul Islam 0731f6ba4f
[Doc] Add documentation for the clang-offload-wrapper tool (NFC)
Add the missing documentation for this tool.

Reviewed By: sdmitriev

Differential Revision: https://reviews.llvm.org/D117120
2022-01-19 10:45:13 +00:00
Nikita Popov ed0cdb2939 [Constants] Remove unused isGEPWithNoNotionalOverIndexing() method
Since d56b0ad441, this method is
no longer used -- and shouldn't be used.
2022-01-19 11:36:40 +01:00
Nikita Popov d56b0ad441 [ConstantHoist] Remove check for notional overindexing
ConstantHoist currently only hoists GEPs if there is no notional
overindexing. As this transform only hoists address arithmetic,
it shouldn't care about whether any overindexing occurs or not.

There is one caveat: If the hoisted base GEP is inbounds, and a
later non-inbounds GEP is rewritten in terms of it, the value
may be incorrectly poisoned. To avoid this, restrict the transform
to inbounds GEPs for now, as the notional overindexing check
effectively did that as well. The inbounds restriction could be
dropped by dropping inbounds from the base GEP expression.

Differential Revision: https://reviews.llvm.org/D117201
2022-01-19 11:32:10 +01:00