Commit Graph

230331 Commits

Author SHA1 Message Date
Richard Smith 57443fce3f When forming a fully-qualified type name, put any qualifiers outside/before the
nested-name-specifier. Patch by Sterling Augustine!

llvm-svn: 268988
2016-05-09 23:06:14 +00:00
Adam Nemet 0a77dfad95 [LV] Hint at the new loop distribution pragma in optimization remark
When we encounter unsafe memory dependencies, loop distribution could
help.

Even though, the diagnostics is in LAA, it's only currently emitted in
the vectorizer.

llvm-svn: 268987
2016-05-09 23:03:44 +00:00
Adam Nemet c6bbd80d59 [IndirectCallPromotion] Remove duplicate comment. NFC
llvm-svn: 268986
2016-05-09 23:03:06 +00:00
Adrian Prantl 134430dc52 Disable this unit test on MSVC, which crashes while compiling it.
llvm-svn: 268985
2016-05-09 22:59:55 +00:00
Rong Xu 2c9bdd0d3d Fix buildbot failure from r268968.
llvm-svn: 268984
2016-05-09 22:45:47 +00:00
Quentin Colombet 739614839f [X86] Fix the AllRegs AVX calling convention.
We used to list registers that were not in the AVX space. In other
words, we were pushing registers that the ISA cannot encode
(YMM16-YMM31).

This is part of llvm.org/PR27481.

llvm-svn: 268983
2016-05-09 22:37:05 +00:00
Artem Belevich 4d430badeb [CUDA] Restrict init of local __shared__ variables to empty constructors only.
Allow only empty constructors for local __shared__ variables in a way
identical to restrictions imposed on dynamic initializers for global
variables on device.

Differential Revision: http://reviews.llvm.org/D20039

llvm-svn: 268982
2016-05-09 22:09:56 +00:00
Marcin Koscielnicki a407f543c0 [MSan] Add a test for vararg with lots of non-vararg arguments.
This is a testcase for http://llvm.org/PR27646, hitting the bug on x86_64,
aarch64, mips.

Differential Revision: http://reviews.llvm.org/D19944

llvm-svn: 268981
2016-05-09 21:53:47 +00:00
Sanjay Patel 0f153424a9 [Inliner] don't assume that a Constant alloca size is a ConstantInt (PR27277)
Differential Revision: http://reviews.llvm.org/D20077

llvm-svn: 268980
2016-05-09 21:51:53 +00:00
Rong Xu c5508046b8 Fix buildbot failure from r268968.
llvm-svn: 268979
2016-05-09 21:51:50 +00:00
Xinliang David Li bde99c3b0f Remove XFAIL
llvm-svn: 268978
2016-05-09 21:47:29 +00:00
Chris Bieneman c49e5e336b [CMake] Support platform building builtins without a full toolchain
Summary:
This patch adds support for building lib/builtins without a fully functioning toolchain. It allows you to bootstrap a cross-compiler, which previously couldn't be done with CMake.

This patch contains the following specific changes:

* Split builtin-specific code out of config-ix.cmake into builtin-config-ix.cmake
* Split some common CMake functionality needed by both builtins and sanitizers into base-config-ix.cmake
* Made lib/builtins/CMakeLists.txt able to be a top-level CMake configuration

I have tested this on Darwin targeting embedded Darwin, and on FreeBSD x86_64 targeting FreeBSD AArch64.

This patch depends on http://reviews.llvm.org/D19692, and is the last part of http://reviews.llvm.org/D16653.

Reviewers: samsonov, iains, jroelofs

Subscribers: compnerd, aemerson, tberghammer, danalbert, srhines, emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D19742

llvm-svn: 268977
2016-05-09 21:45:52 +00:00
Rafael Espindola 78db5a9dca Print member name in undefined symbol error.
llvm-svn: 268976
2016-05-09 21:40:06 +00:00
Chad Rosier 58919cc6f8 Typo. NFC.
llvm-svn: 268975
2016-05-09 21:37:43 +00:00
Xinliang David Li dfa21c310d Cleanup followup of r268710 - [PM] port IR based PGO prof-gen pass to new pass manager
llvm-svn: 268974
2016-05-09 21:37:12 +00:00
Quentin Colombet b47b9b2de7 [X86] Strengthen the setting of inline asm constraints for fp regclasses.
This is similar to r268953, but for floating point and vector register
classes.

Explanations:
The setting of the inline asm constraints was implicitly relying on the
order of the register classes in the file generated by tablegen.
Since, we do not have any control on that order, make sure we do not
depend on it anymore.

llvm-svn: 268973
2016-05-09 21:24:31 +00:00
Simon Pilgrim eec3a95f95 [X86][SSE] Improve cost model for i64 vector comparisons on pre-SSE42 targets
As discussed on PR24888, until SSE42 we don't have access to PCMPGTQ for v2i64 comparisons, but the cost models don't reflect this, resulting in over-optimistic vectorizaton.

This patch adds SSE2 'base level' costs that match what a typical target is capable of and only reduces the v2i64 costs at SSE42.

Technically SSE41 provides a PCMPEQQ v2i64 equality test, but as getCmpSelInstrCost doesn't give us a way to discriminate between comparison test types we can't easily make use of this, otherwise we could split the cost of integer equality and greater-than tests to give better costings of each.

Differential Revision: http://reviews.llvm.org/D20057

llvm-svn: 268972
2016-05-09 21:14:38 +00:00
Sean Callanan e402e56492 Added a testcase that verifies that multiline expressions work.
llvm-svn: 268971
2016-05-09 21:14:18 +00:00
Sean Callanan f52c40c57f Fixed multiline expressions, and removed some dead code.
IOHandlerLinesUpdated() does nothing, and IOHandlerIsInputComplete should be
implemented but isn't.  This means that multiline expressions don't work.  This
patch fixes that.  Test case to follow in the next commit.

llvm-svn: 268970
2016-05-09 21:13:27 +00:00
Rong Xu a12f6d3c7b [PGO] Fix __llvm_profile_raw_version linkage in MACHO
IR instrumentation generates a COMDAT symbol __llvm_profile_raw_version to
overwrite the same symbol in profile run-time to distinguish IR profiles from
Clang generated profiles. In MACHO, LinkOnceODR linkage is used due to the
lack of COMDAT support.

But LinkOnceODR linkage might have .weak_def_can_be_hidden assembly directive,
while the weak variable in run-time has a .weak_definition directive. Linker
will not merge these two symbols even they have the same name. The end result
is IR profiles are not properly flagged in MACHO.

This patch changes the linkage for __llvm_profile_raw_version in each module to
LinkOnceAny so that it has same .weak_definition directive as in the run-time.

Differential Revision: http://reviews.llvm.org/D20078

llvm-svn: 268969
2016-05-09 21:03:06 +00:00
Kostya Serebryany ca9694ba2c [libFuzzer] add a test for libFuzzer+ubsan, extend the docs on using libFuzzer+ubsan
llvm-svn: 268968
2016-05-09 21:02:36 +00:00
Marcin Koscielnicki 60b3cbe095 [MSan] [AArch64] Fix vararg helper for >1 or non-int fixed arguments.
This fixes http://llvm.org/PR27646 on AArch64.

There are three issues here:

- The GR save area is 7 words in size, instead of 8.  This is not enough
  if none of the fixed arguments is passed in GRs (they're all floats or
  aggregates).
- The first argument is ignored (which counteracts the above if it's passed
  in GR).
- Like x86_64, fixed arguments landing in the overflow area are wrongly
  counted towards the overflow offset.

Differential Revision: http://reviews.llvm.org/D20023

llvm-svn: 268967
2016-05-09 20:57:36 +00:00
Adrian Prantl e36561855c Separate the Verifier into an analysis and a transformation pass and
allow the transformation to strip invalid debug info.

This patch separates the Verifier into an analysis and a transformation
pass, with the transformation pass optionally stripping malformed
debug info.

The problem I'm trying to solve with this sequence of patches is that
historically we've done a really bad job at verifying debug info. We want
to be able to make the verifier stricter without having to worry about
breaking bitcode compatibility with existing producers. For example, we
don't necessarily want IR produced by an older version of clang to be
rejected by an LTO link just because of malformed debug info, and rather
provide an option to strip it. Note that merely outdated (but well-formed)
debug info would continue to be auto-upgraded in this scenario.

http://reviews.llvm.org/D19988
rdar://problem/25818489

This reapplies r268937 without modifications.

llvm-svn: 268966
2016-05-09 19:57:29 +00:00
Adrian Prantl fe7a382453 Allow the LTO code generator to strip invalid debug info from the input.
This patch introduces a new option -lto-strip-invalid-debug-info, which
drops malformed debug info from the input.

The problem I'm trying to solve with this sequence of patches is that
historically we've done a really bad job at verifying debug info. We want
to be able to make the verifier stricter without having to worry about
breaking bitcode compatibility with existing producers. For example, we
don't necessarily want IR produced by an older version of clang to be
rejected by an LTO link just because of malformed debug info, and rather
provide an option to strip it. Note that merely outdated (but well-formed)
debug info would continue to be auto-upgraded in this scenario.

rdar://problem/25818489
http://reviews.llvm.org/D19987

This reapplies 268936 with a test case fix for Linux (-exported-symbol foo)

llvm-svn: 268965
2016-05-09 19:57:15 +00:00
Xinliang David Li e5e4713a56 Re install test reverted by r268866
llvm-svn: 268964
2016-05-09 19:51:50 +00:00
Quentin Colombet 3126db6fd7 [X86] Drop the 64-bit alignment for LOW32_ADDR_ACCESS register class.
The only 64-bit register in that register class is RIP and it will not
get spilled in the current ABIs.

llvm-svn: 268963
2016-05-09 19:50:30 +00:00
Artem Belevich 0c0ada01b6 [CUDA] Only __shared__ variables can be static local on device side.
According to CUDA programming guide (v7.5):
> E.2.9.4: Within the body of a device or global function, only
> shared variables may be declared with static storage class.

Differential Revision: http://reviews.llvm.org/D20034

llvm-svn: 268962
2016-05-09 19:36:08 +00:00
Kostya Serebryany a2dfae1fff [libFuzzer] reshuffle docs more
llvm-svn: 268961
2016-05-09 19:32:10 +00:00
Chad Rosier 131a42ccdf [InstCombine] Fold icmp eq/ne (udiv i32 A, B), 0 -> icmp ugt/ule B, A.
Differential Revision: http://reviews.llvm.org/D20036

llvm-svn: 268960
2016-05-09 19:30:20 +00:00
Kostya Serebryany abfac46023 [libFuzzer] reshuffle docs
llvm-svn: 268959
2016-05-09 19:29:53 +00:00
Kostya Serebryany 0a6c26e4dc [libFuzzer] better document the -merge=1 flag, part 2
llvm-svn: 268958
2016-05-09 19:23:28 +00:00
Kostya Serebryany 61b07ac75b [libFuzzer] better document the -merge=1 flag
llvm-svn: 268957
2016-05-09 19:11:36 +00:00
Douglas Katzman 5eddc2395b [Myriad] Use Generic_ELF::addClangTargetOptions()
llvm-svn: 268956
2016-05-09 19:09:59 +00:00
Quentin Colombet 86098ab10b Reapply [X86] Add a new LOW32_ADDR_ACCESS_RBP register class.
This reapplies commit r268796, with a fix for the setting of the inline asm
constraints. I.e., "mark" LOW32_ADDR_ACCESS_RBP as a GR variant, so that the
regular processing of the GR operands (setting of the subregisters) happens.

Original commit log:
[X86] Add a new LOW32_ADDR_ACCESS_RBP register class.

ABIs like NaCl uses 32-bit addresses but have 64-bit frame.
The new register class reflects those constraints when choosing a
register class for a address access.

llvm-svn: 268955
2016-05-09 19:01:46 +00:00
Quentin Colombet 52d8e3bd4c [X86] Update a regexp in a test case to resist register allocation
changes.

llvm-svn: 268954
2016-05-09 19:01:42 +00:00
Quentin Colombet bb15ce3d1f [X86] Strengthen the setting of inline asm constraints.
The setting of the inline asm constraints was implicitly relying on the
order of the register classes in the file generated by tablegen.
Since, we do not have any control on that order, make sure we do not
depend on it anymore.

llvm-svn: 268953
2016-05-09 19:01:35 +00:00
Xinliang David Li b5a2b3a429 Fix variable visibility
llvm-svn: 268952
2016-05-09 19:01:19 +00:00
Nemanja Ivanovic d99f21b0e6 [Power9] Enable -mcpu=pwr9 (-mcpu=power9) in the front end
This patch corresponds to review:
http://reviews.llvm.org/D19684

It simply adds the handling for the option and the corresponding macros.

llvm-svn: 268951
2016-05-09 18:58:02 +00:00
Nemanja Ivanovic 6e29baf7f5 [Power9] Add support for -mcpu=pwr9 in the back end
This patch corresponds to review:
http://reviews.llvm.org/D19683

Simply adds the bits for being able to specify -mcpu=pwr9 to the back end.

llvm-svn: 268950
2016-05-09 18:54:58 +00:00
Sanjay Patel da7fe0c4a4 clean up; NFC
llvm-svn: 268949
2016-05-09 18:54:14 +00:00
Zachary Turner d9563b8b25 Fix build error with ambiguity of size_t.
llvm-svn: 268948
2016-05-09 18:45:21 +00:00
Vedant Kumar 400a3f66e2 [cmake] Enable zlib support for Apple stage2 builds
This allows llvm-profdata to interact with profiles containing
compressed name data.

rdar://problem/26122944

llvm-svn: 268947
2016-05-09 18:40:09 +00:00
Krzysztof Parzyszek 7c7bb538cb [Hexagon] Treat all conditional branches as predicted (not-taken by default)
llvm-svn: 268946
2016-05-09 18:22:07 +00:00
Rafael Espindola 4ee6cb3a70 Document and test the first few .got.plt entries.
llvm-svn: 268945
2016-05-09 18:12:15 +00:00
Konstantin Zhuravlyov e34ead8269 [AMDGPU] Clean up debugger tests
llvm-svn: 268944
2016-05-09 18:05:42 +00:00
Benjamin Kramer ddd585f3df Unbreak the non-windows build.
llvm-svn: 268943
2016-05-09 18:05:28 +00:00
Zachary Turner 06c2b4be25 [pdb] Parse the module info stream for each module.
Differential Revision: http://reviews.llvm.org/D20026
Reviewed By: rnk

llvm-svn: 268942
2016-05-09 17:45:21 +00:00
Zachary Turner 9073ed6e5a Make TypeIterator generic so it can iterate symbols too.
Reviewed By: amccarth
Differential Revision: http://reviews.llvm.org/D20038

llvm-svn: 268941
2016-05-09 17:44:58 +00:00
Adrian Prantl 6d80100c6a Revert "Allow the LTO code generator to strip invalid debug info from the input."
This reverts commit 268936 while investigating buildbot breakage.

llvm-svn: 268940
2016-05-09 17:43:30 +00:00
Adrian Prantl 614d411a0d Revert "Separate the Verifier into an analysis and a transformation pass and"
This reverts commit 268937 while investigating build bot breakage.

llvm-svn: 268939
2016-05-09 17:43:24 +00:00