llvm-project

Commit Graph

Author	SHA1	Message	Date
Dan Gohman	40503396da	Eliminate more uses of llvm-as and llvm-dis. llvm-svn: 81290	2009-09-08 23:54:48 +00:00
Dan Gohman	a5b9645c4b	Split the Add, Sub, and Mul instruction opcodes into separate integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt llvm-svn: 72897	2009-06-04 22:49:04 +00:00
Evan Cheng	c2f95b56db	Minor optimization: Look for situations like this: %reg1024<def> = MOV r1 %reg1025<def> = MOV r0 %reg1026<def> = ADD %reg1024, %reg1025 r0 = MOV %reg1026 Commute the ADD to hopefully eliminate an otherwise unavoidable copy. llvm-svn: 65752	2009-03-01 02:03:43 +00:00

Author

SHA1

Message

Date

Dan Gohman

40503396da

Eliminate more uses of llvm-as and llvm-dis.

llvm-svn: 81290

2009-09-08 23:54:48 +00:00

Dan Gohman

a5b9645c4b

Split the Add, Sub, and Mul instruction opcodes into separate

integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt

llvm-svn: 72897

2009-06-04 22:49:04 +00:00

Evan Cheng

c2f95b56db

Minor optimization:

Look for situations like this:                                                                                                                                                              
%reg1024<def> = MOV r1                                                                                                                                                                      
%reg1025<def> = MOV r0                                                                                                                                                                      
%reg1026<def> = ADD %reg1024, %reg1025                                                                                                                                                      
r0            = MOV %reg1026                                                                                                                                                                
Commute the ADD to hopefully eliminate an otherwise unavoidable copy.

llvm-svn: 65752

2009-03-01 02:03:43 +00:00

3 Commits