Commit Graph

85 Commits

Author SHA1 Message Date
Pavel Labath 07695bd3ae Fix compiler warning in ArchSpec
llvm-svn: 242397
2015-07-16 13:11:34 +00:00
Jaydeep Patil 501a781998 [LLDB][MIPS] Detect MIPS application specific extensions like micromips
SUMMARY:
    The patch detects MIPS application specific extensions (ASE) like micromips by reading 
    ELF header.e_flags and SHT_MIPS_ABIFLAGS section. MIPS triple does not contain ASE 
    information like micromips, mips16, DSP, MSA etc. These can be read from header.e_flags 
    or SHT_MIPS_ABIFLAGS section.
    
    Reviewers: clayborg
    Subscribers: mohit.bhakkad, sagar, lldb-commits
    Differential Revision: http://reviews.llvm.org/D11133

llvm-svn: 242381
2015-07-16 03:51:55 +00:00
Sagar Thakur 6bee961a2e [LLDB][MIPS] Add mips cores in cores_match () in ArchSpec
This patch:
        - Allows mips32 cores to match with any mips32/mips64 cores.
        - Allows mips32r2 cores to match with core only up-to mips32r2/mips64r2.
        - Allows mips32r3 cores to match with core only up-to mips32r3/mips64r3.
        - Allows mips32r5 cores to match with core only up-to mips32r3/mips64r5.
        - Allows mips32r6 core to match with only mips32r6/mips64r6 or mips32/mips64.

Reviewers: emaste, jaydeep, clayborg
Subscribers: mohit.bhakkad, nitesh.jain, bhushan, lldb-commits
Differential Revision: http://reviews.llvm.org/D10921

llvm-svn: 242016
2015-07-13 09:52:06 +00:00
Tamas Berghammer ed1fa2084c Leave OS as unspecified unknown if it isn't specified in the ELF file
This is the redone of r238623 what was reverted with the refactor
in r239148.

Differential revision: http://reviews.llvm.org/D10957

llvm-svn: 241569
2015-07-07 09:11:59 +00:00
Jason Molenda d607afd148 Mark armv7em and armv7m as compatible architectures.
<rdar://problem/21244671> 

llvm-svn: 240713
2015-06-25 22:37:57 +00:00
Rafael Espindola 86f422e1aa Fix the lldb build for the EM_486 change.
llvm-svn: 240138
2015-06-19 17:02:25 +00:00
Ed Maste f6a1312f1b Improve OSType initialization in elf object file's arch_spec
Setting the OSType in the ArchSpec triple is needed to correctly setup
up the register context plugin. ArchSpec::SetArchitecture, for Mach-O
only, sets the OSType. For ELF it was left to the ObjectFileELF to fill
in the missing OSType.

This change moves the ObjectFileELF logic into ArchSpec.

A new optional 'os' parameter has been added to SetArchitecture.
For ELF, this value is the from the ELF header.e_ident[EI_OSABI].
The default value is 0 or ELFOSABI_NONE.

The real work of determining the OSType was done by the ObjectFileELF
helper function GetOsFromOSABI. This logic has been moved
SetArchitecture.

GetOsFromOSABI has been commented as being deprectated.  It is left in
to support asserts.

For ELF the vendor value returned from SetArchitecture should be
UnknownVendor.  An unneeded resetting in ObjectFileELF has been removed
and replaced with an assert.

This fixes a problem reading a core file on FreeBSD/ARM because the spec
triple was arm-unknown-unknown.

Patch by Tom Rix.

Differential Revision:     http://reviews.llvm.org/D9292

llvm-svn: 239148
2015-06-05 13:03:08 +00:00
Sagar Thakur ce815e4588 [MIPS][lldb-server] Add 32-bit register context and read/write FP registers on mips64
- Added support for read/write FP registers in FR1 mode.
    - Added 32 bit register context for mips32.

Reviewers: clayborg, tberghammer, jaydeep
Subscribers: emaste, nitesh.jain, bhushan, mohit.bhakkad, lldb-commits
Differential Revision: http://reviews.llvm.org/D10029

llvm-svn: 238914
2015-06-03 10:14:24 +00:00
Oleksiy Vyalov 817f40a7fa Leave OS type and vendor as unspecified unknowns.
http://reviews.llvm.org/D10080

llvm-svn: 238623
2015-05-29 22:45:47 +00:00
Mohit K. Bhakkad e8659b5df6 [LLDB][MIPS] Add MIPS32 and MIPS64 core revisions
Patch by Jaydeep Patil

Added MIPS32 and MIPS64 core revisions. This would be followed by register context and emulate-instruction for MIPS32.

DYLDRendezvous.cpp:
On Linux link map struct does not contain extra load offset field.

Reviewers: clayborg
Subscribers: bhushan, mohit.bhakkad, sagar, lldb-commits.
Differential Revision: http://reviews.llvm.org/D9190

llvm-svn: 235574
2015-04-23 06:36:20 +00:00
Tamas Berghammer dccbfaf917 Fix type detection for 'char' variables
A char can have signed and unsigned encoding but previously lldb always
assumed it is signed. This CL adds a logic to detect the encoding of
'char' types based on the default encoding on the target architecture.
It fixes variable printing and expression evaluation on architectures
where 'char' is signed by default.

Differential revision: http://reviews.llvm.org/D8636

llvm-svn: 233682
2015-03-31 10:21:50 +00:00
Zachary Turner 5023257f23 Move some functions from source/lldb.cpp to Utility.
Specifically, there were some functions for converting enums
to strings and a function for matching a string using a specific
matching algorithm.  This moves those functions to more appropriate
headers in lldb/Utility and updates references to include the
new headers.

llvm-svn: 232673
2015-03-18 21:31:45 +00:00
Mohit K. Bhakkad 3df471c32d [MIPS] - Register Context for MIPS64
Patch by Jaydeep Patil

Summery:
1. Add MIPS variants by parsing e_flags of the ELF
2. Create RegisterInfoInterface and RegisterContext for MIPS64 and MIPS64EL

Reviewers: clayborg

Subscribers: tberghammer, bhushan, mohit.bhakkad, sagar

Differential Revision: http://reviews.llvm.org/D8166

llvm-svn: 232467
2015-03-17 11:43:56 +00:00
Zachary Turner 5e6f45201f Don't stomp the triple when loading a PECOFF target.
When you create a target, it tries to look for the platform's list
of supported architectures for a match.  The match it finds can
contain specific triples, like i386-pc-windows-msvc.  Later, we
overwrite this value with the most generic triple that can apply
to any platform with COFF support, causing some of the fields of
the triple to get overwritten.

This patch changes the behavior to only merge in values from the COFF
triple if the fields of the matching triple were unknown/unspecified
to begin with.

This fixes load address resolution on Windows, since it enables the
DynamicLoaderWindows to be used instead of DynamicLoaderStatic.

Reviewed by: Greg Clayton
Differential Revision: http://reviews.llvm.org/D7120

llvm-svn: 226849
2015-01-22 18:59:05 +00:00
Greg Clayton a97c4d2154 Handle thumb IT instructions correctly all the time.
The issue with Thumb IT (if/then) instructions is the IT instruction preceeds up to four instructions that are made conditional. If a breakpoint is placed on one of the conditional instructions, the instruction either needs to match the thumb opcode size (2 or 4 bytes) or a BKPT instruction needs to be used as these are always unconditional (even in a IT instruction). If BKPT instructions are used, then we might end up stopping on an instruction that won't get executed. So if we do stop at a BKPT instruction, we need to continue if the condition is not true.

When using the BKPT isntructions are easy in that you don't need to detect the size of the breakpoint that needs to be used when setting a breakpoint even in a thumb IT instruction. The bad part is you will now always stop at the opcode location and let LLDB determine if it should auto-continue. If the BKPT instruction is used, the BKPT that is used for ARM code should be something that also triggers the BKPT instruction in Thumb in case you set a breakpoint in the middle of code and the code is actually Thumb code. A value of 0xE120BE70 will work since the lower 16 bits being 0xBE70 happens to be a Thumb BKPT instruction. 

The alternative is to use trap or illegal instructions that the kernel will translate into breakpoint hits. On Mac this was 0xE7FFDEFE for ARM and 0xDEFE for Thumb. The darwin kernel currently doesn't recognize any 32 bit Thumb instruction as a instruction that will get turned into a breakpoint exception (EXC_BREAKPOINT), so we had to use the BKPT instruction on Mac. The linux kernel recognizes a 16 and a 32 bit instruction as valid thumb breakpoint opcodes. The benefit of using 16 or 32 bit instructions is you don't stop on opcodes in a IT block when the condition doesn't match. 

To further complicate things, single stepping on ARM is often implemented by modifying the BCR/BVR registers and setting the processor to stop when the PC is not equal to the current value. This means single stepping is another way the ARM target can stop on instructions that won't get executed.

This patch does the following:
1 - Fix the internal debugserver for Apple to use the BKPT instruction for ARM and Thumb
2 - Fix LLDB to catch when we stop in the middle of a Thumb IT instruction and continue if we stop at an instruction that won't execute
3 - Fixes this in a way that will work for any target on any platform as long as it is ARM/Thumb
4 - Adds a patch for ignoring conditions that don't match when in ARM mode (see below)

This patch also provides the code that implements the same thing for ARM instructions, though it is disabled for now. The ARM patch will check the condition of the instruction in ARM mode and continue if the condition isn't true (and therefore the instruction would not be executed). Again, this is not enable, but the code for it has been added.

<rdar://problem/19145455> 

llvm-svn: 223851
2014-12-09 23:31:02 +00:00
Jason Molenda 229525848a Sketch out the armv7 and arm64 core file writing support in
ObjectFileMachO.  It's close but we seem to be missing some
of the memory region segments - not exactly sure how that's
happening.  The register context writing into the LC_THREAD
load commands is working correctly though.

Slightly reordered the arm64 definitions in ArchSpec.cpp so
when we look for an arm64 core file definiton we're getting
a cpu subtype of CPU_ANY which we can't put in the mach
header of a core file.  Make the first definition we find by
linear search have the currently correct '1' cpu subtype.

llvm-svn: 221743
2014-11-12 01:11:36 +00:00
Justin Hibbits db39cdfbb7 Fix some bugs from D5988
Summary:
Ed Maste found some problems with the commit in D5988.  Address most of these.
While here, also add floating point return handling.  This doesn't handle
128-bit long double yet.  Since I don't have any system that uses it, I don't
currently have plans to implement it.

Reviewers: emaste

Reviewed By: emaste

Subscribers: emaste, lldb-commits

Differential Revision: http://reviews.llvm.org/D6049

llvm-svn: 220963
2014-10-31 15:57:52 +00:00
Justin Hibbits 6256a0ea8f First cut of PowerPC(64) support in LLDB.
Summary:
This adds preliminary support for PowerPC/PowerPC64, for FreeBSD.  There are
some issues still:

 * Breakpoints don't work well on powerpc64.
 * Shared libraries don't yet get loaded for a 32-bit process on powerpc64 host.
 * Backtraces don't work.  This is due to PowerPC ABI using a backchain pointer
   in memory, instead of a dedicated frame pointer register for the backchain.
 * Breakpoints on functions without debug info may not work correctly for 32-bit
   powerpc.

Reviewers: emaste, tfiala, jingham, clayborg

Reviewed By: clayborg

Subscribers: emaste, lldb-commits

Differential Revision: http://reviews.llvm.org/D5988

llvm-svn: 220944
2014-10-31 02:34:28 +00:00
Matthew Gardiner f03e6d84bc Very minimal support 24-bit kalimbas. Vanilla "memory read" for data sections
works, as do breakpoints, run and pause, display zeroth frame.

See
http://reviews.llvm.org/D5503

for a fuller description of the changes in this commit.

llvm-svn: 218596
2014-09-29 08:02:24 +00:00
Matthew Gardiner e77b2948b4 Add an interface on ArchSpec to provide lldb client code
with a mechanism to query if the current target architecture
has non 8-bit bytes.

llvm-svn: 216867
2014-09-01 09:06:03 +00:00
Todd Fiala 02e7181508 lldb - towards AArch64 being recognised as platform architecture
See http://reviews.llvm.org/D4381.

Change by Paul Osmialowski.

llvm-svn: 216668
2014-08-28 14:32:43 +00:00
Matthew Gardiner 5f67579f69 Add support for kalimba architecture variants 3, 4 and 5.
Add entries to core_definitions and elf_arch_entries for
those variants. Select the subtype for the variant by parsing
the e_flags field of the elf header.

llvm-svn: 216541
2014-08-27 12:09:39 +00:00
Zachary Turner 13b1826104 Move Host::GetArchitecture to HostInfo::GetArchitecture.
As a side effect, this patch also eliminates all of the
preprocessor conditionals previously used to implement
GetArchitecture().

llvm-svn: 216074
2014-08-20 16:42:51 +00:00
Sylvestre Ledru 1c9e0646b9 add missing break. Fix CID 1229446 & 1203680
llvm-svn: 215894
2014-08-18 14:53:42 +00:00
Greg Clayton a3a6c12c03 When constructing an ArchSpec from a MachO cpu type and subtype, don't set the OS for x86_64 and x86 in case the binary ends up being for macosx or ios.
<rdar://problem/17819272> 

llvm-svn: 214188
2014-07-29 18:04:57 +00:00
Zachary Turner ad587ae4ca Fix supported architectures on PlatformWindows.
i386, i486, i486sx, and i686 are all indistinguishable as far as
PE/COFF files are concerned.  This patch adds support for all of
these architectures to PlatformWindows.

Differential Revision: http://reviews.llvm.org/D4658

llvm-svn: 214092
2014-07-28 16:44:49 +00:00
Zachary Turner 3b2065f017 Fix the MSVC build. MSVC does not support constexpr.
llvm-svn: 214091
2014-07-28 16:44:28 +00:00
Greg Clayton 56b796856f Make sure we don't crash if someone (E.G.) comments out on entry from g_core_definitions[] without removing the ArchSpec::Core enumeration when submitting from source.
We now catch the issue with a static_assert() at compile time and use llvm::array_lengthof(g_core_definitions) as well.

<rdar://problem/17767541>

llvm-svn: 213778
2014-07-23 18:12:06 +00:00
Todd Fiala d8eaa17587 Update lldb to track recent Triple arm64 enum removal and collapse into aarch64.
See the following llvm change for details:

r213743 | tnorthover | 2014-07-23 05:32:47 -0700 (Wed, 23 Jul 2014) | 9 lines
AArch64: remove arm64 triple enumerator.

This change fixes build breaks on Linux and MacOSX lldb.

llvm-svn: 213755
2014-07-23 14:37:35 +00:00
Todd Fiala cfee963282 Add kalimba as a platform.
This change comprises of additions and some minor changes in order that
"kalimba" is listed as a supported platform and that debugging any
kalimbas results in PlatformKalimba being associated with the target.

The changes are as follows:

* The PlatformKalimba implementation itself
* A tweak to ArchSpec
* .note parsing for Kalimba in ObjectFileELF.cpp
* Plugin registration
* Makefile additions

Change by Matthew Gardiner

Minor tweak for cmake and Xcode by Todd Fiala

Tested:
Ubuntu 14.04 x86_64, clang 3.5-built lldb, all tests pass.
MacOSX 10.9.4, Xcode 6.0 Beta 1-built lldb, all tests pass.

llvm-svn: 213158
2014-07-16 15:03:10 +00:00
Greg Clayton 52edb364a1 lldb.LLDB_ARCH_DEFAULT now works correctly on Macs with haswell enabled kernels.
<rdar://problem/17604133>

llvm-svn: 213004
2014-07-14 22:53:02 +00:00
Greg Clayton 44362e06d1 Allow generic ARM cores to match any more specific ARM architecture.
<rdar://problem/15932248>

llvm-svn: 212863
2014-07-12 00:11:34 +00:00
Greg Clayton 3f19ada88e Cleanup the iOS simulator code.
Fixes include:
- Don't say that "<arch>-apple-ios" is compatible with "<arch>-apple-macosx"
- Fixed DynamicLoaderMacOSXDYLD so specify an architecture that was converted solely from a cputype and subtype, just specify the file + UUID.
- Fixed PlatformiOSSimulator::GetSupportedArchitectureAtIndex() so it returns the correct archs
- Fixed SymbolFileDWARFDebugMap to load .o files correctly by just specifying the architecture without the vendor and OS now that "<arch>-apple-ios" is not compatible with "<arch>-apple-macosx" so we can load .o files correctly for DWARF with debug map
- Fixed the coded in TargetList::CreateTarget() so it does the right thing with an underspecified triple where just the arch is specified.

llvm-svn: 212783
2014-07-10 23:33:37 +00:00
Todd Fiala 14bbef5ac7 Add Kalimba support to ArchSpec.
See http://lists.cs.uiuc.edu/pipermail/lldb-commits/Week-of-Mon-20140630/011508.html
for more details.

Change by Matthew Gardiner.

llvm-svn: 212145
2014-07-01 23:33:32 +00:00
Saleem Abdulrasool 28606954bf lldb: remove adhoc implementation of array_sizeof
Replace adhoc inline implementation of llvm::array_lengthof in favour of the
implementation in LLVM.  This is simply a cleanup change, no functional change
intended.

llvm-svn: 211868
2014-06-27 05:17:41 +00:00
Greg Clayton 7ab7f89ae0 iOS simulator cleanup to make sure we use "*-apple-ios" for iOS simulator apps and binaries.
Changes include:
- ObjectFileMachO can now determine if a binary is "*-apple-ios" or "*-apple-macosx" by checking the min OS and SDK load commands
- ArchSpec now says "<arch>-apple-macosx" is equivalent to "<arch>-apple-ios" since the simulator mixes and matches binaries (some from the system and most from the iOS SDK).
- Getting process inforamtion on MacOSX now correctly classifies iOS simulator processes so they have "*-apple-ios" architectures in the ProcessInstanceInfo
- PlatformiOSSimulator can now list iOS simulator processes correctly instead of showing nothing by using:
    (lldb) platform select ios-simulator
    (lldb) platform process list
- debugserver can now properly return "*-apple-ios" for the triple in the process info packets for iOS simulator executables
- GDBRemoteCommunicationClient now correctly passes along the triples it gets for process info by setting the OS in the llvm::Triple correctly

<rdar://problem/17060217>

llvm-svn: 209852
2014-05-29 21:33:45 +00:00
Virgile Bello 97a70e4f7e Added i686 architecture (ArchSpec::Core::eCore_x86_32_i686).
llvm-svn: 205770
2014-04-08 14:48:48 +00:00
Jim Ingham 46d005dbc4 Workaround for collision between enum members in LLVM's MachO.h and system headers
on Mac OS X (in particular mach/machine.h).

<rdar://problem/16494607>

llvm-svn: 205480
2014-04-02 22:53:21 +00:00
Jason Molenda a332978b2a lldb arm64 import.
These changes were written by Greg Clayton, Jim Ingham, Jason Molenda.

It builds cleanly against TOT llvm with xcodebuild.  I updated the
cmake files by visual inspection but did not try a build.  I haven't
built these sources on any non-Mac platforms - I don't think this
patch adds any code that requires darwin, but please let me know if
I missed something.

In debugserver, MachProcess.cpp and MachTask.cpp were renamed to
MachProcess.mm and MachTask.mm as they picked up some new Objective-C
code needed to launch processes when running on iOS.

llvm-svn: 205113
2014-03-29 18:54:20 +00:00
Saleem Abdulrasool 1108cb3682 update for renaming in LLVM
llvm-svn: 203533
2014-03-11 03:09:08 +00:00
Deepak Panickal 6d3df420d2 Initial patch for supporting Hexagon DSP
llvm-svn: 201665
2014-02-19 11:16:46 +00:00
Greg Clayton a86dc43371 Add support for Haswell on x86_64.
<rdar://problem/15312873>

llvm-svn: 199854
2014-01-22 23:42:03 +00:00
Todd Fiala a9ddb0e14f Added distribution info to ArchSpec and qHostInfo message.
ArchSpec now contains an optional distribution_id, with getters and
setters. Host::GetArchitecture () sets it on non-Apple platforms using
Host::GetDistributionId (). The distribution_id is ignored during
ArchSpec comparisons.

The gdb remote qHostInfo message transmits it, if set, via the
distribution_id={id-value} key/value pair. Updated gdb remote docs to
reflect this change.

As before, GetDistributionId () returns nothing on non-Linux platforms
at this time. On Linux, it is returned only if the lsb_platform
command is installed (in /bin or /usr/bin), and only if the
distributor id key is returned by 'lsb_platform -i'. This id is
lowercased, and whitespace is replaced with underscores.

llvm-svn: 199539
2014-01-18 03:02:39 +00:00
Ed Maste b73f844be3 POSIX RegisterContext for mips64
Based on the POSIX x86_64 register context.  This is sufficient for opening
a mips64 (big endian) core file.  Subsequent changes will connect the
disassembler, dynamic loader support, ABI, etc.

Review: http://llvm-reviews.chandlerc.com/D1873
llvm-svn: 192335
2013-10-10 00:59:47 +00:00
Jason Molenda 64a11733c9 Add entries for arm6m to ArchSpec's g_macho_arch_entries.
<rdar://problem/15099306>

llvm-svn: 192161
2013-10-08 03:01:08 +00:00
Jason Molenda c7cda27f79 Mark armv6m as "compatible" with armv7 - that's the
closest ISA.  armv6 wouldn't have the handful of
T32 instructions that the Cortex-M0 ISA specifies.
<rdar://problem/15099306> 

llvm-svn: 191588
2013-09-27 23:29:10 +00:00
Jason Molenda a3a0452831 Add definitions for "armv6m", which indicates a Cortex-M0 processor.
It uses the T16 and a few T32 instructions from the ARMv7-A ISA.
<rdar://problem/15099306> 

llvm-svn: 191587
2013-09-27 23:21:54 +00:00
Charles Davis 510938e528 Fix some names in the wake of my Mach-O changes to LLVM.
llvm-svn: 189317
2013-08-27 05:04:57 +00:00
Charles Davis 237ad9741a Plugins/ObjectFile/PECOFF: Use enums from LLVM, and don't use Mach-O definitions.
Since I renamed most of the LLVM Mach-O enums in r189314, I had to go fix
LLDB to use the new names. While I was here, I decided that a COFF
plugin really shouldn't be using Mach-O enums.

llvm-svn: 189316
2013-08-27 05:04:33 +00:00
Greg Clayton 83b162d87f Change PowerPC to have the correct byte order.
llvm-svn: 188189
2013-08-12 18:34:04 +00:00