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Author SHA1 Message Date
Stefan Maksimovic 8d7c351799 [Mips] Supplement long branch pseudo instructions 
Expand on LONG_BRANCH_LUi and LONG_BRANCH_(D)ADDiu pseudo
instructions by creating variants which support
less operands/accept GPR64Opnds as their operand in order
to appease the machine verifier pass.

Differential Revision: https://reviews.llvm.org/D53977

llvm-svn: 346133
 2018-11-05 14:37:41 +00:00
Aleksandar Beserminji 949a17c016 [mips] Handle branch expansion corner cases 
When potential jump instruction and target are in the same segment, use
jump instruction with immediate field.

In cases where offset does not fit immediate value of a bc/j instructions,
offset is stored into register, and then jump register instruction is used.

Differential Revision: https://reviews.llvm.org/D48019

llvm-svn: 339126
 2018-08-07 10:45:45 +00:00