Commit Graph

155908 Commits

Author SHA1 Message Date
Alex Bradbury 8971842f43 [RISCV] Initial codegen support for ALU operations
This adds the minimum necessary to support codegen for simple ALU operations
on RV32. Prolog and epilog insertion, support for memory operations etc etc 
follow in future patches.

Leave guessInstructionProperties=1 until https://reviews.llvm.org/D37065 is 
reviewed and lands.

Differential Revision: https://reviews.llvm.org/D29933

llvm-svn: 316188
2017-10-19 21:37:38 +00:00
Eugene Zelenko f27d161bf0 [Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 316187
2017-10-19 21:21:30 +00:00
Craig Topper ff69ffbf9a [SelectionDAG] Add a check to getVectorShuffle to ensure that the only negative index we allow is -1.
llvm-svn: 316183
2017-10-19 20:59:41 +00:00
Craig Topper 7bce79a539 [X86] Remove LowerEXTRACT_SUBVECTOR handler. All EXTRACT_SUBVECTORs are marked as legal.
llvm-svn: 316182
2017-10-19 20:59:40 +00:00
Simon Pilgrim e8e2c4c0cf [X86][AES] Test AES intrinsics on 32/64-bit targets with/without VEX encoding
Don't just test on 32-bit

llvm-svn: 316176
2017-10-19 19:05:04 +00:00
Graham Yiu 488782efa3 The cost of splitting a large vector instruction is not being taken into account by the getUserCost function. This was leading to some loops being over unrolled. The cost of a vector instruction is now being multiplied by the cost of the type legalization. This will return a more accurate cost.
Committing on behalf on Brad Nemanich (brad.nemanich@ibm.com)

Differential Revision: https://reviews.llvm.org/D38961

llvm-svn: 316174
2017-10-19 18:16:31 +00:00
Konstantin Zhuravlyov ea35e46b71 AMDGPU/Docs: Fix unreadable characters
llvm-svn: 316171
2017-10-19 17:12:55 +00:00
Krzysztof Parzyszek e4d0e199bf [Hexagon] Fix store conversion from rr to io in optimize addressing modes
llvm-svn: 316170
2017-10-19 16:59:22 +00:00
Saleem Abdulrasool 1261151912 ExecutionEngine: adjust COFF i386 tautological asserts
Modify static_casts to not be tautological in some COFF i386
relocations.

Patch by Alex Langford!

llvm-svn: 316169
2017-10-19 16:57:40 +00:00
Alex Bradbury 3c941e7ed9 [RISCV] RISCVAsmParser: early exit if RISCVOperand isn't immediate as expected
This is necessary to avoid an assertion in the included test case and similar 
assembler inputs.

llvm-svn: 316168
2017-10-19 16:22:51 +00:00
Alex Bradbury baa54d4ac8 [RISCV][NFC] Drop unused parameter from createImm helper in RISCVAsmParser
llvm-svn: 316167
2017-10-19 16:09:20 +00:00
Nikolai Bozhenov 8dcab54cb4 Revert r315992 because of a found miscompilation failure
llvm-svn: 316164
2017-10-19 15:36:18 +00:00
Simon Pilgrim fdd63d1535 [X86] Replace custom scalar integer absolute matching with ISD::ABS lowering.
x86 has its own copy of integer absolute pattern matching to combine directly to a SUB+CMOV.

This patch removes the x86 combine and adds custom lowering support for ISD::ABS instead, allowing us to use the DAGCombiner version.

Additional test cases are already covered by iabs.ll (rL315706 and rL315711).

Differential Revision: https://reviews.llvm.org/D38895

llvm-svn: 316162
2017-10-19 15:02:24 +00:00
Simon Pilgrim 0444e4fcd4 Fix MSVC signed/unsigned comparison warning
llvm-svn: 316161
2017-10-19 15:00:31 +00:00
Simon Pilgrim d0649f978f [X86] Add scalar (abs (abs x)) -> (abs x) combine test.
Before landing D38895

llvm-svn: 316160
2017-10-19 14:59:26 +00:00
Alex Bradbury ee7c7ecd03 [RISCV] Prepare for the use of variable-sized register classes
While parameterising by XLen, also take the opportunity to clean up the 
formatting of the RISCV .td files.

This commit unifies the in-tree code with my patchset at 
<https://github.com/lowrisc/riscv-llvm>.

llvm-svn: 316159
2017-10-19 14:29:03 +00:00
Max Kazantsev 27c1f464e6 Revert rL316156 due to failure on APFloatTest.fromToStringSpecials
llvm-svn: 316158
2017-10-19 12:22:39 +00:00
Serguei Katkov 4f7d5ef226 Fix APFloat from string conversion for Inf
The method IEEEFloat::convertFromStringSpecials() does not recognize
the "+Inf" and "-Inf" strings but these strings are printed for
the double Infinities by the IEEEFloat::toString().

This patch adds the "+Inf" and "-Inf" strings to the list of recognized
patterns in IEEEFloat::convertFromStringSpecials().

Reviewers: sberg, bogner, majnemer, timshen, rnk, skatkov, gottesmm, bkramer, scanon
Reviewed By: skatkov
Subscribers: apilipenko, reames, llvm-commits
Differential Revision: https://reviews.llvm.org/D38030

llvm-svn: 316156
2017-10-19 11:16:03 +00:00
Diana Picus 7bf71008aa [ARM GlobalISel] Fix liveins in test. NFC
llvm-svn: 316155
2017-10-19 09:28:19 +00:00
Diana Picus a993859335 [ARM GlobalISel] Remove redundant tests
These test cases don't really add anything that isn't covered by other
tests as well, so we can safely remove them.

llvm-svn: 316154
2017-10-19 08:50:28 +00:00
Vassil Vassilev e866d7ef9d Revert 316150 which reinstated r316025.
It fails on some bots and now we know how to reproduce it.

llvm-svn: 316153
2017-10-19 08:44:19 +00:00
Sam McCall f309f0fd70 Const fix for YAMLParser.
llvm-svn: 316151
2017-10-19 08:13:49 +00:00
Vassil Vassilev 448291ef5e Reinstate r316025, reverted in r316029.
Original commit message:
"[cmake] Use find_package to discover zlib

This allows us to use standard cmake utilities to point to non-system zlib
locations.

Patch by Oksana Shadura and me (D39002)."

The new patch brings back the old behavior in the cases where find_package
cannot find zlib.

llvm-svn: 316150
2017-10-19 08:04:22 +00:00
Vedant Kumar f5f153dd6f [Coverage] Simplify r316141. NFC.
llvm-svn: 316147
2017-10-19 06:16:23 +00:00
Max Kazantsev 3612d4b4f9 [NFC][IRCE] Filter out empty ranges early
llvm-svn: 316146
2017-10-19 05:33:28 +00:00
whitequark a99ecf1bbb [MergeFunctions] Don't blindly RAUW a GlobalValue with a ConstantExpr.
MergeFunctions uses (through FunctionComparator) a map of GlobalValues
to identifiers because it needs to compare functions and globals
do not have an inherent total order. Thus, FunctionComparator
(through GlobalNumberState) has a ValueMap<GlobalValue *>.

r315852 added a RAUW on globals that may have been previously
encountered by the FunctionComparator, which would replace
a GlobalValue * key with a ConstantExpr *, which is illegal.

This commit adjusts that code path to remove the function being
replaced from the ValueMap as well.

llvm-svn: 316145
2017-10-19 04:47:48 +00:00
Rafael Espindola deaba3862f Simplify.
llvm-svn: 316144
2017-10-19 01:32:18 +00:00
Rafael Espindola 55680d0add Fix buffer overflow.
We were reading past the end of the buffer.

llvm-svn: 316143
2017-10-19 01:25:48 +00:00
Chris Bieneman 2a0a8fb6bc [CMake] Allow parent projects to use in-source builds
LLVM checks if it is performing an in-source build and then stop the
build. However, this check is also triggered if LLVM is being build as
part of a parent project, which prevents the parent project itself from
using in-source builds. For example, CMake allows a parent project to
specify the output of its subproject:

add_subdirectory(llvm llvm_build)

This tells CMake to conduct an out-tree build of LLVM, which without
this patch will still fails because what is being tested is the parent
project, not LLVM. This is fixed by using the "CURRENT" variable, which
is only concerned by the CMakeLists that is actually bein processed at
the moment.

Tests:
Ran `make check-llvm`.

Patch by Henrique Jung <henriquenj_AT_gmail_DOT_com>

llvm-svn: 316142
2017-10-19 00:43:48 +00:00
Vedant Kumar 821160d5ef [llvm-cov] Move LineCoverageIterator to libCoverage. NFC.
LineCoverageIterator makes it easy for clients of coverage data to
determine line execution counts for a file or function. The coverage
iteration logic is tricky enough that it really pays not to have
multiple copies of it. Hopefully having just one implementation in LLVM
will make the iteration logic easier to test, reuse, and update.

This commit is NFC but I've added a unit test to go along with it just
because it's easy to do now.

llvm-svn: 316141
2017-10-18 23:58:28 +00:00
Vedant Kumar e955f61837 [llvm-cov] Use the coverage namespace. NFC.
This is a simple code cleanup. It will facilitate moving
LineCoverageIterator to libCoverage.

llvm-svn: 316140
2017-10-18 23:58:27 +00:00
Justin Bogner 876ad287d1 GISel: Canonicalize select tests using update_mir_test_checks
This runs `udpate_mir_test_checks --add-vreg-checks` on the tests taht
are already more or less in the format that generates, so that there
will be less churn in some upcoming changes.

llvm-svn: 316139
2017-10-18 23:33:31 +00:00
Justin Bogner f8dc015bd1 AArch64/GISel: Modernize the localizer test
llvm-svn: 316138
2017-10-18 23:26:24 +00:00
Justin Bogner d45849f703 Canonicalize a large number of mir tests using update_mir_test_checks
This converts a large and somewhat arbitrary set of tests to use
update_mir_test_checks. I ran the script on all of the tests I expect
to need to modify for an upcoming mir syntax change and kept the ones
that obviously didn't change the tests in ways that might make it
harder to understand.

llvm-svn: 316137
2017-10-18 23:18:12 +00:00
Chandler Carruth 3f0e056df4 [PM] Refactor the bounds checking pass to remove a method only called in
one place.

llvm-svn: 316135
2017-10-18 22:42:36 +00:00
Justin Bogner da9600e646 update_mir_test_checks: Support adding checks for vreg classes
This is a temporary hack to support adding checks for the "registers:"
block of mir functions. This is necessary to convert a number of tests
so that there's less churn when we change the MIR printer to put the
vreg classes on defs instead of in their own block.

llvm-svn: 316134
2017-10-18 22:39:55 +00:00
Justin Bogner 6b55f1f513 update_mir_test_checks: Improve message when updating fails
llvm-svn: 316133
2017-10-18 22:36:08 +00:00
Tony Tye 6baa6d21e8 [AMDGPU] Corrections to memory model description.
- Add description on nontemporal support.
 - Correct OpenCL sequentially consistent and fence code sequences.
 - Minor test cleanup.

Differential Revision: https://reviews.llvm.org/D39073

llvm-svn: 316131
2017-10-18 22:16:55 +00:00
Sanjoy Das 2f27456c82 Revert "[ScalarEvolution] Handling for ICmp occuring in the evolution chain."
This reverts commit r316054.  There was some confusion over the review process:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20171016/495884.html

llvm-svn: 316129
2017-10-18 22:00:57 +00:00
Eugene Zelenko 306d29977d [Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 316128
2017-10-18 21:46:47 +00:00
Sam Clegg 799f55cb32 Fix lit.site.cfg.py.in after rL316123
llvm-svn: 316126
2017-10-18 20:46:05 +00:00
Dylan McKay 443695f80a [AVR] Fix the select_mbb_placement_bug.ll test
llvm-svn: 316124
2017-10-18 20:04:57 +00:00
Sam Clegg 0be459e066 Don't set static-libs test feature when using LLVM_LINK_LLVM_DYLIB
This was causing execname-options.ll to fail on the wasm
waterfall.

Differential Revision: https://reviews.llvm.org/D39022

llvm-svn: 316123
2017-10-18 19:37:30 +00:00
Vedant Kumar 9cbd33fec9 [llvm-cov] Suppress sub-line highlights in simple cases
llvm-cov tends to highlight too many regions because its policy is to
highlight all region entry segments. This can look confusing to users:
not all region entry segments are interesting and deserve highlighting.
Emitting these highlights only when the region count differs from the
line count is a more user-friendly policy.

llvm-svn: 316109
2017-10-18 18:52:29 +00:00
Vedant Kumar 08a0a31003 [llvm-cov] Pass LineCoverageStats in SourceCoverageView. NFC.
Instead of copying around the wrapped segment and the list of line
segments, just pass a reference to a LineCoverageStats object. This
simplifies the interface. It also makes an upcoming change to suppress
distracting highlights possible.

llvm-svn: 316108
2017-10-18 18:52:28 +00:00
Vedant Kumar 988faf87f8 [llvm-cov] Highlight gaps in consecutive uncovered regions
llvm-cov typically doesn't highlight gap segments, but it should if the
gap occurs after an uncovered region in order to preserve continuity.

llvm-svn: 316107
2017-10-18 18:52:27 +00:00
Sumanth Gundapaneni e1983bcf55 [Hexagon] New HVX target features.
This patch lets the llvm tools handle the new HVX target features that
are added by frontend (clang). The target-features are of the form
"hvx-length64b" for 64 Byte HVX mode, "hvx-length128b" for 128 Byte mode HVX.
"hvx-double" is an alias to "hvx-length128b" and is soon will be deprecated.
The hvx version target feature is upgated form "+hvx" to "+hvxv{version_number}.
Eg: "+hvxv62"

For the correct HVX code generation, the user must use the following
target features.
For 64B mode: "+hvxv62" "+hvx-length64b"
For 128B mode: "+hvxv62" "+hvx-length128b"

Clang picks a default length if none is specified. If for some reason,
no hvx-length is specified to llvm, the compilation will bail out.
There is a corresponding clang patch.

Differential Revision: https://reviews.llvm.org/D38851

llvm-svn: 316101
2017-10-18 18:07:07 +00:00
Konstantin Zhuravlyov 265d253aae AMDGPU/Docs: Make target naming consistent
- R600 Arch: Use Radeon HD XXXX Series
  - GCN Arch: Use GFXX

Differential Revision: https://reviews.llvm.org/D39019

llvm-svn: 316100
2017-10-18 17:59:20 +00:00
Sumanth Gundapaneni 9d954c4169 [Hexagon] Update Hexagon ArchEnum and sync some downstream changes(NFC)
Differential Revision: https://reviews.llvm.org/D38850

llvm-svn: 316099
2017-10-18 17:45:22 +00:00
Krzysztof Parzyszek 8c53c95137 [Hexagon] Mark vector loads as predicable, update instruction mappings
All loads of form V6_vL32b_{,cur,nt,tmp,nt_cur,nt_tmp}_{ai,pi,ppu} are
predicable on v62 (but not on v60). Mark them all as predicable in the
instruction definitions, and handle the v60 case in HII::isPredicable.

llvm-svn: 316098
2017-10-18 17:36:46 +00:00
Konstantin Zhuravlyov 8d5e9e110c AMDGPU: Rename MaxFlatWorkgroupSize to MaxFlatWorkGroupSize for consistency
Differential Revision: https://reviews.llvm.org/D38957

llvm-svn: 316097
2017-10-18 17:31:09 +00:00
Alex Bradbury 13ce95b77f [RISCV] Bugfix createRISCVELFObjectWriter
r315275 set the IsLittleEndian parameter incorrectly. This patch corrects 
this, and adds a test to ensure such mistakes will be caught in the future.

llvm-svn: 316091
2017-10-18 16:11:31 +00:00
Justin Bogner 3de36d6f11 update_mir_test_checks: Handle empty liveins
An empty livein block doesn't make much sense (why not just omit it?)
but they're legal and some tests have them, so its best to handle it.

llvm-svn: 316089
2017-10-18 15:38:56 +00:00
Justin Bogner 1a33cdb2e2 update_mir_test_checks: Do a better job of disambiguating names
Matching prefixes isn't good enough, because it leads to things like
calling the first constant C3 just because there were two copies
before it. Tighten up the check to match more precisely, but also be
careful about ambiguity when dealing with target opcodes that end in a
number.

llvm-svn: 316088
2017-10-18 15:37:09 +00:00
Justin Bogner 2ac32cc9ce AArch64/GISel: Fix a couple of tests that were testing the wrong thing
Fix a couple of tests that were extending the wrong vreg, and
regenerate their checks with update_mir_test_checks. This looks like
it was a copy-paste or test update error.

llvm-svn: 316087
2017-10-18 15:34:33 +00:00
Andre Vieira d4a25707f0 [ARM] Fix disassembly for conditional VMRS and VMSR instructions in ARM mode
Differential Revision: https://reviews.llvm.org/D38347

llvm-svn: 316085
2017-10-18 14:47:37 +00:00
Simon Dardis 03c2c65b2d [mips] Fix analyzeBranch to handle debug data
In the case where there was a conditional branch followed by a unconditional
branch with debug instruction separating them, MipsInstrInfo::analyzeBranch
would not skip past debug instruction when searching for the second branch
which give erroneous results about the control flow of the block.

This could lead to the branch folder to merge the non-fall through case
into it's predecessor, leaving the conditional branch with a dangling
basic block operand.

This resolves PR34975.

Thanks to Alexander Richardson for reporting the issue!

Reviewers: atanasyan

Differential Revision: https://reviews.llvm.org/D39003

llvm-svn: 316084
2017-10-18 14:35:29 +00:00
Nikolai Bozhenov 9723f12491 Fixup patch for revision rL316070.
Added check that type of CmpConst and source type of trunc are equal
for correct matching of the case when we can set widened C constant
equal to CmpConstant.

  %cond = cmp iN %x, CmpConst
  %tr = trunc iN %x to iK
  %narrowsel = select i1 %cond, iK %t, iK C

Patch by: Gainullin, Artur <artur.gainullin@intel.com>

llvm-svn: 316082
2017-10-18 14:24:50 +00:00
Simon Dardis 77bf0fd59c [mips] Move test to correct directory. NFCI
llvm-svn: 316081
2017-10-18 13:59:48 +00:00
Michael Zuckerman 7ba046c784 Adding new test for
bug fix 316067 https://bugs.llvm.org/show_bug.cgi?id=34978

This test checks that the x86-interleaved ends without any
assertion.

Change-Id: I1e970482a4d0404516cbc85517fc091bb21c35a8
llvm-svn: 316080
2017-10-18 13:51:31 +00:00
NAKAMURA Takumi 6f43bd4bde Untabify.
llvm-svn: 316079
2017-10-18 13:31:28 +00:00
Dylan McKay bebde41ec5 [AVR] Update to current LLVM API
r315410 broke a number of things in the AVR backend, which are now
fixed.

llvm-svn: 316076
2017-10-18 12:35:15 +00:00
Michael Zuckerman 49293264cc [AVX512][AVX2]Cost calculation for interleave load/store patterns {v8i8,v16i8,v32i8,v64i8}
This patch adds accurate instructions cost.
The formula presents two cases(stride 3 and stride 4) and calculates the cost according to the VF and stride.

Reviewers:
1. delena
2. Farhana
3. zvi
4. dorit
5. Ayal

Differential Revision: https://reviews.llvm.org/D38762

Change-Id: If4cfbd4ac0e63694e8144cb78c7fa34850647ff7
llvm-svn: 316072
2017-10-18 11:41:55 +00:00
Hiroshi Inoue 5388e66d3a [PowerPC] Use helper functions to check sign-/zero-extended value
Helper functions to identify sign- and zero-extending machine instruction is introduced in rL315888.
This patch makes PPCInstrInfo::optimizeCompareInstr use the helper functions. It simplifies the code and also makes possible more optimizations since the helper can do more analysis than the original check code; I observed about 5000 more compare instructions are eliminated while building LLVM.

Also, this patch fixes a bug in helpers on ANDIo instruction handling due to the order of checks. This bug causes a failure in an existing test case for optimizeCompareInstr.

Differential Revision: https://reviews.llvm.org/D38988

llvm-svn: 316071
2017-10-18 10:31:19 +00:00
Nikolai Bozhenov 74c047eabb Improve lookThroughCast function.
Summary:
When we have the following case:

  %cond = cmp iN %x, CmpConst
  %tr = trunc iN %x to iK
  %narrowsel = select i1 %cond, iK %t, iK C

We could possibly match only min/max pattern after looking through cast.
So it is more profitable if widened C constant will be equal CmpConst.
That is why just set widened C constant equal to CmpConst, because there
is a further check in this function that trunc CmpConst == C.

Also description for lookTroughCast function was added.

Reviewers: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38536

Patch by: Artur Gainullin <artur.gainullin@intel.com>

llvm-svn: 316070
2017-10-18 09:28:09 +00:00
Michael Zuckerman 72a6f893cb Fixing bug issue https://bugs.llvm.org/show_bug.cgi?id=34978
Change-Id: I7f13d5bcb181be2860377df7b40e1579a8ad4add
llvm-svn: 316067
2017-10-18 08:04:31 +00:00
Serguei Katkov faecc3c741 Fix the incorrect detection of ICONV_LIBRARY_PATH
This is introduced in rL308711.
Check for c library is incorrect here just because libc will be found always
and it does not mean that iconv is presented.

Thank to Andrew Krasny for narrowing down the root cause.

Reviewers: ecbeckmann
Reviewed By: ecbeckmann
Subscribers: mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D38875

llvm-svn: 316064
2017-10-18 06:26:39 +00:00
Justin Bogner 4b1ab94c7a update_mir_test_checks: Support '-' in function names
Some AArch64 and AMDGPU tests have functions with hyphens in the names

llvm-svn: 316063
2017-10-18 05:52:56 +00:00
Justin Bogner cf30db922e update_mir_test_checks: Fix a typo I made while preparing for commit
I accidentally added an extra arg here, so this didn't work at all.

llvm-svn: 316062
2017-10-18 05:39:22 +00:00
Vlad Tsyrklevich 4dc1c9735b Statically link llvm-cfi-verify's libraries.
Summary:
llvm-cfi-verify (D38379) introduced a potential build failure when compiling with `-DLLVM_BUILD_LLVM_DYLIB=ON -DLLVM_LINK_LLVM_DYLIB=ON`. Specific versions of cmake seem to treat the `add_subdirectory()` rule differently. It seems as if old versions of cmake BFS these rules, adding them to the fringe for expansion later. Newer versions of cmake seem to immediately execute CMakeFiles that are present in this subdirectory.

If the subdirectory is expanded through the fringe, the globbing resultant from `llvm_add_implicit_projects()` from `cmake/modules/AddLLVM.cmake:1012` means that `tools/llvm-shlib/CMakeFile.txt` gets executed before `tools/llvm-cfi-verify/lib/CMakeFile.txt`. As the latter CMakeFile adds a new library, this expansion order means that the library files required the unit tests in `unittests/tools/llvm-cfi-verify/` are not present in the dynamic library. This causes unit tests to fail as the required functions can't be found.

This change now ensures that the libraries created by `llvm-cfi-verify` are statically linked into the unit tests. As `tools/llvm-cfi-verify/lib` no longer adds anything to `llvm-shlib`, there should be no concern about the order-of-compilation.

Reviewers: skatkov, pcc

Reviewed By: skatkov, pcc

Subscribers: llvm-commits, kcc, pcc, aheejin, vlad.tsyrklevich, mgorny

Differential Revision: https://reviews.llvm.org/D39020

llvm-svn: 316059
2017-10-18 04:27:53 +00:00
Justin Bogner 7c1bdaf7ca Add a utility to update MIR checks, similar to update_llc_test_checks
This adds update_mir_test_checks, which updates the check lines in mir
tests. This can only update tests that start and end with .mir
currently (ie, -run-pass) but it should be sufficient for updating at
least some of the GlobalISel tests.

llvm-svn: 316057
2017-10-18 02:20:31 +00:00
Jatin Bhateja 1fc49627e4 [ScalarEvolution] Handling for ICmp occuring in the evolution chain.
Summary:
 If a compare instruction is same or inverse of the compare in the
 branch of the loop latch, then return a constant evolution node.
 Currently scope of evaluation is limited to SCEV computation for
 PHI nodes.

 This shall facilitate computations of loop exit counts in cases
 where compare appears in the evolution chain of induction variables.

 Will fix PR 34538
Reviewers: sanjoy, hfinkel, junryoungju

Reviewed By: junryoungju

Subscribers: javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D38494

llvm-svn: 316054
2017-10-18 01:36:16 +00:00
Adrian Prantl 5a82f0a470 Verifier: Ignore CUs pulled in by ODR-uniqued types.
When more than one Module is imported into the same context, such as during
an LTO build before linking the modules, ODR type uniquing may cause types
to point to a different CU. This check does not make sense in this case.

This fixes the error reported in PR34944.

https://bugs.llvm.org/show_bug.cgi?id=34944
rdar://problem/34940685

This reapplies a cleaner implementation of r316049.

llvm-svn: 316052
2017-10-18 01:11:01 +00:00
Adrian Prantl fe8226fd94 Revert "Verifier: Ignore CUs pulled in by ODR-uniqued types."
This reverts commit r316049.

llvm-svn: 316050
2017-10-18 00:54:31 +00:00
Adrian Prantl f9a1cf6dcc Verifier: Ignore CUs pulled in by ODR-uniqued types.
When more than one Module is imported into the same context, such as during
an LTO build before linking the modules, ODR type uniquing may cause types
to point to a different CU. This check does not make sense in this case.

This fixes the error reported in PR34944.

https://bugs.llvm.org/show_bug.cgi?id=34944
rdar://problem/34940685

llvm-svn: 316049
2017-10-18 00:49:31 +00:00
Daniel Sanders 30247fd1d9 [aarch64][globalisel] Register banks and classes should have distinct names.
Otherwise they are ambiguous in MIR.

llvm-svn: 316047
2017-10-18 00:12:43 +00:00
Michael Zolotukhin c4fcc189d2 [GlobalDCE] Use DenseMap instead of unordered_multimap for GVDependencies.
Summary:
std::unordered_multimap happens to be very slow when the number of elements
grows large. On one of our internal applications we observed a 17x compile time
improvement from changing it to DenseMap.

Reviewers: mehdi_amini, serge-sans-paille, davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38916

llvm-svn: 316045
2017-10-17 23:47:06 +00:00
Peter Collingbourne c03ceb92ca lit: Improve %: normalization.
The new scheme should match the normalization of embedded paths in
linkrepro tar files.

Differential Revision: https://reviews.llvm.org/D39023

llvm-svn: 316044
2017-10-17 23:46:34 +00:00
Wei Ding 7ab1f7a421 AMDGPU : Fix an error for the llvm.cttz implementation.
Differential Revision: http://reviews.llvm.org/D39014

llvm-svn: 316037
2017-10-17 21:49:52 +00:00
Matthias Braun a2f96b5bde AArch64: Enable AES instruction fusion on Cyclone.
Note that cyclone itself doesn't fuse, but newer apple chips do and we
are using cyclone as the default when targeting apple OSes.

The current code also does not capture all fusion patterns of apple CPUs
yet; I am still looking for ways to refactor the code nicely to extend
it.

llvm-svn: 316036
2017-10-17 21:46:15 +00:00
Tim Northover 350a87eaf1 AArch64: account for possible frame index operand in compares.
If the address of a local is used in a comparison, AArch64 can fold the
address-calculation into the comparison via "adds". Unfortunately, a couple of
places (both hit in this one test) are not ready to deal with that yet and just
assume the first source operand is a register.

llvm-svn: 316035
2017-10-17 21:43:52 +00:00
Eugene Zelenko 6cadde7f40 [Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 316034
2017-10-17 21:27:42 +00:00
Simon Pilgrim 7cd4e2c96f [X86][SSE] Tests packuswb/truncation codegen from PR34773
llvm-svn: 316033
2017-10-17 21:14:53 +00:00
Jessica Paquette 60d31fc3a9 [MachineOutliner][NFC] Clean up prune logic a bit
Move the prune logic in pruneOverlaps to a new function, prune. This lets us
reuse the prune functionality. Makes the code a bit more readable. It'll also
make it easier to emit remarks/debug statements for pruned functions.

llvm-svn: 316031
2017-10-17 21:11:58 +00:00
Vassil Vassilev e38a984474 Revert "[cmake] Use find_package to discover zlib"
We are investigating what went wrong.

llvm-svn: 316029
2017-10-17 20:51:25 +00:00
Jessica Paquette 1a81dfba97 Fix typo in checkTwoLevelHintsCommand
BigSize had a copy/paste typo in it. This fixes that.

llvm-svn: 316027
2017-10-17 20:43:33 +00:00
Vassil Vassilev 96d9b7f5e1 [cmake] Use find_package to discover zlib
This allows us to use standard cmake utilities to point to non-system zlib
locations.

Patch by Oksana Shadura and me (D39002).

llvm-svn: 316025
2017-10-17 20:32:27 +00:00
Konstantin Zhuravlyov 7dabe9ced7 AMDGPU: Start generating metadata for MaxFlatWorkGroupSize
Differential Revision: https://reviews.llvm.org/D38958

llvm-svn: 316024
2017-10-17 20:03:21 +00:00
Jessica Paquette 85af63d044 [MachineOutliner][NFC] Move decrement logic to OutlinedFunction
This commit moves the decrement logic for outlined functions into the class,
and makes OccurrenceCount private. It can now be accessed via
getOccurrenceCount().

This makes it more difficult to accidentally introduce bugs by incorrectly
decrementing the occurrence count on OutlinedFunctions.

llvm-svn: 316020
2017-10-17 19:03:23 +00:00
Jessica Paquette c9ab4c2634 [MachineOutliner][NFC] Move end index calculation into Candidate
Cleanup to Candidate that moves all end index calculations into
Candidate.endIdx(). For the sake of consistency, StartIdx and Len are now
private members, and can be accessed with length() and startIdx() respectively.

llvm-svn: 316019
2017-10-17 18:43:15 +00:00
Vitaly Buka 524c0a639d Fix signed overflow detected by ubsan
This overflow does not affect algorithm, so just suppress it.

llvm-svn: 316018
2017-10-17 18:33:15 +00:00
Simon Pilgrim 654bbb3b05 [DAGCombine] Add SCALAR_TO_VECTOR undef handling to simplifyShuffleMask.
This allows us to simplify later visitVECTOR_SHUFFLE optimizations such as combineShuffleOfScalars.

Noticed whilst working on D38696

llvm-svn: 316017
2017-10-17 18:14:48 +00:00
Matt Morehouse 3f6c1627f7 [llvm-special-case-list-fuzzer] Add fuzz target.
Summary: Create a fuzzer for sanitizer blacklists.

Patch by: hctim

Reviewers: morehouse

Reviewed By: morehouse

Subscribers: llvm-commits, mgorny, kcc

Differential Revision: https://review.llvm.org/D38981

llvm-svn: 316014
2017-10-17 17:43:34 +00:00
Sanjay Patel 94c0eb031c [ARM, AArch64] adjust tests trying to maintain their objective; NFC
A smarter compiler will see that these might be better without a jump table
if we're just using the constant values of the switch.

llvm-svn: 316012
2017-10-17 16:54:56 +00:00
Sanjay Patel 6d172f2d72 [SimplifyCFG] add test for part of PR34471 (switch squashing); NFC
llvm-svn: 316008
2017-10-17 15:56:42 +00:00
Sanjay Patel 6ed5c91422 [SimplifyCFG] update test to use auto-generated FileCheck asserts; NFC
llvm-svn: 316006
2017-10-17 15:50:47 +00:00
Sam McCall 627b33471e Fix pthread_[gs]etname_np detection
llvm-svn: 316005
2017-10-17 15:32:17 +00:00
Gadi Haber 85d99b4310 [X86][Broadwell] Added the broadwell cpu to the scheduling regression tests.<NFC>
NFC.
Added the Broadwell cpu and the BROADWELL prefix to all the scheduling regression tests, as part of prepartion for a larger commit of adding all Broadwell scheduiling.

Reviewers: RKSimon, zvi, aaboud
Differential Revision: https://reviews.llvm.org/D38994

Change-Id: I54bc9065168844c107b1729fcdc1d311ce3ea0a9
llvm-svn: 315998
2017-10-17 13:45:39 +00:00
Nikolai Bozhenov 346f4329c4 Improve clamp recognition in ValueTracking.
Summary:
ValueTracking was recognizing not all variations of clamp. Swapping of
true value and false value of select was added to fix this problem. This
change breaks the canonical form of cmp inside the matchMinMax function,
that is why additional checks for compare predicates is needed. Added
corresponding test cases.

Reviewers: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38531

Patch by: Artur Gainullin <artur.gainullin@intel.com>

llvm-svn: 315992
2017-10-17 11:50:48 +00:00
Yichao Yu a18b0b1817 Fix implicit null check with negative offset
Summary:
It seems that negative offset was accidentally allowed in D17967.
AFAICT small negative offset should be valid (always raise segfault) on all archs that I'm aware of (especially x86, which is the only one with this optimization enabled) and such case can be useful when loading hiden metadata from an object.

However, like the positive side, it should only be done within a certain limit.
For now, use the same limit on the positive side for the negative side.
A separate option can be added if needs appear.

Reviewers: mcrosier, skatkov

Reviewed By: skatkov

Subscribers: sanjoy, llvm-commits

Differential Revision: https://reviews.llvm.org/D38925

llvm-svn: 315991
2017-10-17 11:47:36 +00:00
Yichao Yu a46eb8e649 Fix `FaultMaps` crash when the out streamer is reused
Summary:
Make sure the map is cleared before processing a new module. Similar to what is done on `StackMaps`.

This issue is similar to D38588, though this time for FaultMaps (on x86) rather than ARM/AArch64. Other than possible mixing of information between modules, the crash is caused by the pointers values in the map that was allocated by the bump pointer allocator that is unwinded when emitting the next file. This issue has been around since 3.8.

This issue is likely much harder to write a test for since AFAICT it requires emitting something much more compilcated (and possibly real code) instead of just some random bytes.

Reviewers: skatkov, sanjoy

Reviewed By: skatkov, sanjoy

Subscribers: sanjoy, aemerson, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D38924

llvm-svn: 315990
2017-10-17 11:44:34 +00:00
Gadi Haber 3020490aac [X86][Skylake] fixed/updated regression test mmx-schedule.ll which failed after r315978.
Change-Id: I60cd7e03ea6c3d9a3dc661a882458e83feca66e3
llvm-svn: 315985
2017-10-17 10:00:08 +00:00
Andrew V. Tischenko 5bfbfb48b5 More tests with x86 prefixes which work after rL315899 commit
llvm-svn: 315983
2017-10-17 08:49:47 +00:00
Gadi Haber 1e0f1f476a [X86][SKL] Updated scheduling information for the SkylakeClient target
Updated the scheduling information for the SkylakeClient target with the following changes:

1. regrouped the instructions after adding load and store latencies.
2. regrouped the instructions after adding identified missing ports in several groups.
The changes were made after revisiting the latencies impact of all the load and store uOps.

Reviewers: zvi, RKSimon, craig.topper
Differential Revision: https://reviews.llvm.org/D38727

Change-Id: I778a308cc11e490e8fa5e27e2047412a1dca029f
llvm-svn: 315978
2017-10-17 06:47:04 +00:00
Max Kazantsev 4faa509bb1 Remove a test after revert of rL315440
llvm-svn: 315977
2017-10-17 06:43:31 +00:00
Max Kazantsev 20fc63351d [NFC] Add test from bug 34937
llvm-svn: 315976
2017-10-17 06:37:58 +00:00
Philip Reames 6a7bbfb2e2 Revert 315440 on behalf of mkazantsev
This patch reverts rL315440 because of the bug described at
https://bugs.llvm.org/show_bug.cgi?id=34937

The fix for the bug is on review as D38944, but not yet ready.  Given this is a regression reverting until a fix is ready is called for.

Max would have done the revert himself, but is having trouble doing a build of fresh LLVM for some reason.  I did the build and test to ensure the revert worked as expected on his behalf.

llvm-svn: 315974
2017-10-17 06:21:07 +00:00
Daniel Sanders 3229217620 [globalisel][tablegen] Add a GIM_CheckIsSameOperand test where OtherInsnID and OtherOpIdx differ
llvm-svn: 315972
2017-10-17 05:24:44 +00:00
Craig Topper 341f2ab444 [X86] Add masked palignr tests to vector-shuffle-masked.ll
llvm-svn: 315971
2017-10-17 04:17:56 +00:00
Craig Topper 19f2f49ef1 [X86] Add AVX512BW to the vector-shuffle-masked test to prepare for an upcoming commit.
llvm-svn: 315970
2017-10-17 04:17:55 +00:00
Craig Topper fbb1985c14 [X86] Fix typo in comment. NFC
llvm-svn: 315969
2017-10-17 04:17:54 +00:00
Justin Bogner 45623bd06d FuzzMutate: Fix arch parsing in FuzzerCLI
The right way to parse arch names is by creating a triple. This was
using getArchTypeForLLVMName before, which doesn't really do the right
thing here.

llvm-svn: 315965
2017-10-17 02:39:40 +00:00
Shoaib Meenai a42f60e7f7 [ExecutionEngine] Correct the size of a write in a COFF i386 relocation
We want to be writing a 32bit value, so we should be writing 4 bytes
instead of 2.

Patch by Alex Langford <apl@fb.com>.

Differential Revision: https://reviews.llvm.org/D38872

llvm-svn: 315964
2017-10-17 01:41:14 +00:00
Vedant Kumar 4d1969f22b [llvm-cov] Add one correction to r315960 (PR34962)
In r315960, I accidentally assumed that the first line segment is
guaranteed to be the non-gap region entry segment (given that one is
present). It can actually be any segment on the line, and the test I
checked in demonstrates that.

llvm-svn: 315963
2017-10-17 01:34:41 +00:00
Sanjoy Das 3a5e25278a Revert "[SCEV] Maintain and use a loop->loop invalidation dependency"
This reverts commit r315713.  It causes PR34968.

I think I know what the problem is, but I don't think I'll have time to fix it
this week.

llvm-svn: 315962
2017-10-17 01:03:56 +00:00
Reid Kleckner 57b7d4fad7 Try to make crlf portable to other printf implementations
llvm-svn: 315961
2017-10-17 00:27:31 +00:00
Vedant Kumar 58548c30da [llvm-cov] Remove workaround in line execution count calculation (PR34962)
Gap areas make it possible to correctly determine when to use counts
from deferred regions. Before gap areas were introduced, llvm-cov needed
to use a heuristic to do this: it ignored counts from segments that
start, but do not end, on a line. This heuristic breaks down on a simple
example (see PR34962).

This patch removes the heuristic and picks counts from any region entry
segment which isn't a gap area.

llvm-svn: 315960
2017-10-16 23:47:10 +00:00
Mark Searles 4e3d6160db Use the return value of UpdateNodeOperands(); in some cases, UpdateNodeOperands() modifies the node in-place and using the return value isn’t strictly necessary. However, it does not necessarily modify the node, but may return a resultant node if it already exists in the DAG. See comments in UpdateNodeOperands(). In that case, the return value must be used to avoid such scenarios as an infinite loop (node is assumed to have been updated, so added back to the worklist, and re-processed; however, node hasn’t changed so it is once again passed to UpdateNodeOperands(), assumed modified, added back to worklist; cycle infinitely repeats).
Differential Revision: https://reviews.llvm.org/D38466

llvm-svn: 315957
2017-10-16 23:38:53 +00:00
Simon Pilgrim a590c74549 [X86][AVX] Add v4x64 vector shuffle test for <0,2,1,3> mask
llvm-svn: 315955
2017-10-16 23:20:16 +00:00
Matthias Braun cf3ab11caa cmake: BSD: Mark /usr/local/include as system include directory
We add /usr/local/include to the include directory list for some BSD
systems. We should mark this as a system directory to avoid files from
/usr/local/include getting picked over files shipping with llvm.

This typically manifested as gtest headers installed with the system
getting picked over the ones shipping with llvm.

Patch by Petr Penzin <penzin.dev@gmail.com>

Differential Revision: https://reviews.llvm.org/D37415

llvm-svn: 315952
2017-10-16 23:03:21 +00:00
Quentin Colombet 0bd2825517 Re-apply [AArch64][RegisterBankInfo] Use the statically computed mappings for COPY
This reverts commit r315823, thus re-applying r315781.

Also make sure we don't use G_BITCAST mapping for non-generic registers.
Non-generic registers don't have a type but do have a reg bank.
Something the COPY mapping now how to deal with but the G_BITCAST
mapping don't.

-- Original Commit Message --
We use to resort on the generic implementation to get the mappings for
COPYs. The generic implementation resorts on table lookup and
dynamically allocated objects to get the valid mappings.

Given we already know how to map G_BITCAST and have the static mappings
for them, use that code path for COPY as well. This is much more
efficient.

Improve the compile time of RegBankSelect by up to 20%.

Note: When we eventually generate all the mappings via TableGen, we
wouldn't have to do that dance to shave compile time. The intent of this
change was to make sure that moving to static structure really pays off.

NFC.

llvm-svn: 315947
2017-10-16 22:28:40 +00:00
Quentin Colombet 9f20af6135 [AArch64][RegisterBankInfo] Add mapping support for G_BITCAST of s128
Anything bigger than 64-bit just map to FPR.

llvm-svn: 315946
2017-10-16 22:28:38 +00:00
Quentin Colombet 7c114d3d70 [AArch64][LegalizerInfo] Mark s128 G_BITCAST legal
We used to mark all G_BITCAST of 128-bit legal but only for vector
types. Scalars of this size are just fine as well.

llvm-svn: 315945
2017-10-16 22:28:27 +00:00
Matthew Simpson 36bbc8ce98 Add !callees metadata
This patch adds a new kind of metadata that indicates the possible callees of
indirect calls.

Differential Revision: https://reviews.llvm.org/D37354

llvm-svn: 315944
2017-10-16 22:22:11 +00:00
Reid Kleckner b0c9e0d647 [MC] Lex CRLF as one token
This will prevent doubling of line endings when parsing assembly and
emitting assembly.

Otherwise we'd parse the directive, consume the end of statement, hit
the next end of statement, and emit a fresh newline.

llvm-svn: 315943
2017-10-16 22:20:03 +00:00
Simon Pilgrim 03c89a840a [X86][3DNow] Add scheduling latency/throughput tests for 3DNow! instructions
llvm-svn: 315942
2017-10-16 21:55:09 +00:00
Craig Topper 91259e2681 [JumpThreading] Move two PredValueInfoTy vectors to a scope closer to their usage. NFCI
llvm-svn: 315941
2017-10-16 21:54:13 +00:00
Eugene Zelenko dd40f5e7c1 [Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 315940
2017-10-16 21:34:24 +00:00
Simon Pilgrim 608e1b57cf [X86][MMX] Add scheduling latency/throughput tests for MMX instructions
llvm-svn: 315939
2017-10-16 21:29:29 +00:00
Krzysztof Parzyszek e29e07904c Replace make_range in MachineRegisterInfo with ArrayRef, NFC
llvm-svn: 315938
2017-10-16 21:19:40 +00:00
Vitaly Buka d3b231c44d [libFuzzer] Delete llvm/lib/Fuzzer
Summary: Code is already in compiler-rt

Reviewers: kcc

Subscribers: krytarowski, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D38912

llvm-svn: 315937
2017-10-16 20:48:19 +00:00
Tony Tye d288430c3e Add base relative relocation record that can be used for the following case (OpenCL example):
static __global int Var = 0; 
__global int* Ptr[] = {&Var};
...

In this case Var is a non premptable symbol and so its address can be used as the value of Ptr, with a base relative relocation that will add the delta between the ELF address and the actual load address. Such relocations do not require a symbol.

Differential Revision: https://reviews.llvm.org/D38909

llvm-svn: 315935
2017-10-16 20:44:29 +00:00
Kostya Serebryany e21b940ff2 fix llvm-isel-fuzzer: LLVMFuzzerTestOneInput should never return non-zero (according to the contract)
llvm-svn: 315933
2017-10-16 20:36:57 +00:00
Reid Kleckner cfdd4a2699 Revert MSVC 2017 build fix and fix it by moving the method that implicitly instantiates addPredicate out of line
llvm-svn: 315932
2017-10-16 20:31:16 +00:00
Reid Kleckner 46e0918f83 Fix the build of GlobalISelEmitter with MSVC 2017 by specializing earlier
MSVC doesn't seem to like implicitly instantiating addPredicate and then
explicitly specializing it later. It causes an internal compiler error.

llvm-svn: 315930
2017-10-16 20:23:16 +00:00
Krzysztof Parzyszek 72518eaa6f Add iterator range MachineRegisterInfo::liveins(), adopt users, NFC
llvm-svn: 315927
2017-10-16 19:08:41 +00:00
Krzysztof Parzyszek 02893de4ef [Hexagon] Rangify some loops, NFC
Recommit r315763 with a fix.

llvm-svn: 315925
2017-10-16 18:43:08 +00:00
Anna Thomas 79503c035f [SCEV] Rename getMaxBECount and update comments. NFC
Post commit review comments at D38825.

llvm-svn: 315920
2017-10-16 17:47:17 +00:00
Matthew Simpson 28799a2509 [SparsePropagation] Enable interprocedural analysis
This patch adds the ability to perform IPSCCP-like interprocedural analysis to
the generic sparse propagation solver. The patch gives clients the ability to
define their own custom LatticeKey types that the generic solver maps to custom
LatticeVal types. The custom lattice keys can be used, for example, to
distinguish among mappings for regular values, values returned from functions,
and values stored in global variables. Clients are responsible for defining how
to convert between LatticeKeys and LLVM Values by providing a specialization of
the LatticeKeyInfo template.

The added unit tests demonstrate how the generic solver can be used to perform
a simplified version of interprocedural constant propagation.

Differential Revision: https://reviews.llvm.org/D37353

llvm-svn: 315919
2017-10-16 17:44:17 +00:00
Alexander Timofeev 9dff31c769 [AMDGPU] : revert r315908
llvm-svn: 315916
2017-10-16 16:57:37 +00:00
Akira Hatanaka e8c1a54c07 [ObjCARC] Do not move a release that has the clang.imprecise_release tag
above PHI instructions.

ARC optimizer has an optimization that moves a call to an ObjC runtime
function above a phi instruction when the phi has a null operand and is
an argument passed to the function call. This optimization should not
kick in when the runtime function is an objc_release that releases an
object with precise lifetime semantics.

rdar://problem/34959669

llvm-svn: 315914
2017-10-16 16:46:59 +00:00
Sanjay Patel a4b89ed0b7 [x86] add minmax tests with more predicate coverage; NFC
llvm-svn: 315913
2017-10-16 15:20:00 +00:00
Javed Absar dfd8e2ffd1 [TableGen] Simplify CallingConvEmitter.cpp. NFC.
llvm-svn: 315911
2017-10-16 14:52:26 +00:00
Sanjay Patel 42135beac8 [InstCombine] don't unnecessarily generate a constant; NFCI
llvm-svn: 315910
2017-10-16 14:47:24 +00:00
Sanjay Patel b7d1238cfc [ValueTracking] fix typos, formatting; NFC
llvm-svn: 315909
2017-10-16 14:46:37 +00:00
Alexander Timofeev 3828242c7e [AMDGPU] Prevent Machine Copy Propagation from replacing live copy with the dead one
Differential revision: https://reviews.llvm.org/D38754

llvm-svn: 315908
2017-10-16 14:35:29 +00:00
Simon Pilgrim 259b190f0d Fix test name typo.
llvm-svn: 315907
2017-10-16 14:33:51 +00:00
Simon Pilgrim 664f2f697a [X86][SSE] Added additional PACKUS shuffle tests
Mainly inspired by PR34773

llvm-svn: 315906
2017-10-16 14:32:41 +00:00
Simon Dardis 0d378a9eed [mips][micromips] Fix (dis)assembly of bc1(t|f)
Previously these instructions were marked codegen only and had
an under-specified instruction description that did not record the
fcc register.

Reviewers: atanasyan, abeserminji

Differential Revision: https://reviews.llvm.org/D38847

llvm-svn: 315905
2017-10-16 14:20:22 +00:00
Sjoerd Meijer 7508fbd581 ISel type legalizer: debug messages. NFC.
Minor addition and follow up of r314773 and r311533: this adds more
debug messages to the type legalizer. For each node, it dumps
legalization info for results and operands nodes, rather than just the
final legalized node.

Differential Revision: https://reviews.llvm.org/D38726

llvm-svn: 315904
2017-10-16 14:07:30 +00:00
Simon Pilgrim 73bd5aa049 Fix or vs || typo.
llvm-svn: 315903
2017-10-16 14:01:59 +00:00
Stefan Maksimovic ee6b5a79dc [mips] Provide alternate predicates for constant synthesis
Ordering of patterns should not be of importance anymore
since the predicates used are mutually exclusive now.

llvm-svn: 315901
2017-10-16 13:18:21 +00:00
Hiroshi Inoue a7eb78b47f [PowerPC] fix up in sign-/zero-extension elimination
This patch fixes a potential problem in my previous commit (https://reviews.llvm.org/rL315888) by adding a null check.

llvm-svn: 315900
2017-10-16 12:11:15 +00:00
Andrew V. Tischenko bfc9061593 This patch is a result of D37262: The issues with X86 prefixes. It closes PR7709, PR17697, PR19251, PR32809 and PR21640. There could be other bugs closed by this patch.
llvm-svn: 315899
2017-10-16 11:14:29 +00:00
George Rimar 68b285f69e [llvm-dwarfdump] - Teach tool to parse DW_CFA_GNU_args_size.
Currently llvm-dwarfdump runs into llvm_unreachable when
faces DW_CFA_GNU_args_size. Patch implements the support.

Differential revision: https://reviews.llvm.org/D38879

llvm-svn: 315897
2017-10-16 10:26:17 +00:00
NAKAMURA Takumi 414151a47e Revert rL315894, "SLPVectorizer.cpp: Try to appease stage2-3 difference. (D38586)"
llvm-svn: 315896
2017-10-16 09:50:01 +00:00
Nikolai Bozhenov 0e7ebbccc7 Move folding of icmp with zero after checking for min/max idioms.
Summary:
The following transformation for cmp instruction:

  icmp smin(x, PositiveValue), 0 -> icmp x, 0

should only be done after checking for min/max to prevent infinite
looping caused by a reverse canonicalization. That is why this
transformation was moved to place after the mentioned check.

Reviewers: spatel, efriedma

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38934

Patch by: Artur Gainullin <artur.gainullin@intel.com>

llvm-svn: 315895
2017-10-16 09:19:21 +00:00
NAKAMURA Takumi 4543affa98 SLPVectorizer.cpp: Try to appease stage2-3 difference. (D38586)
llvm-svn: 315894
2017-10-16 09:15:23 +00:00
Javed Absar 776bf1de01 [TableGen] Range loopify DAGISelMatcher. NFC.
llvm-svn: 315891
2017-10-16 06:43:54 +00:00
Daniel Sanders 01805b6747 [aarch64][globalisel] Fix a crash in selectAddrModeIndexed() caused by incorrect G_FRAME_INDEX handling
The wrong operand was being rendered to the result instruction.

The crash was detected by Bitcode/simd_ops/AArch64_halide_runtime.bc

llvm-svn: 315890
2017-10-16 05:39:30 +00:00
Yonghong Song 6621cf67cf bpf: fix bug on silently truncating 64-bit immediate
We came across an llvm bug when compiling some testcases that 64-bit
immediates are silently truncated into 32-bit and then packed into
BPF_JMP | BPF_K encoding.  This caused comparison with wrong value.

This bug looks to be introduced by r308080.  The Select_Ri pattern is
supposed to be lowered into J*_Ri while the latter only support 32-bit
immediate encoding, therefore Select_Ri should have similar immediate
predicate check as what J*_Ri are doing.

Reported-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Reviewed-by: Yonghong Song <yhs@fb.com>
llvm-svn: 315889
2017-10-16 04:14:53 +00:00
Hiroshi Inoue e3a3e3c9e9 [PowerPC] Eliminate sign- and zero-extensions if already sign- or zero-extended
This patch enables redundant sign- and zero-extension elimination in PowerPC MI Peephole pass.
If the input value of a sign- or zero-extension is known to be already sign- or zero-extended, the operation is redundant and can be eliminated.
One common case is sign-extensions for a method parameter or for a method return value; they must be sign- or zero-extended as defined in PPC ELF ABI. 
For example of the following simple code, two extsw instructions are generated before the invocation of int_func and before the return. With this patch, both extsw are eliminated.

void int_func(int);
void ii_test(int a) {
    if (a & 1) return int_func(a);
}

Such redundant sign- or zero-extensions are quite common in many programs; e.g. I observed about 60,000 occurrences of the elimination while compiling the LLVM+CLANG.

Differential Revision: https://reviews.llvm.org/D31319

llvm-svn: 315888
2017-10-16 04:12:57 +00:00
Daniel Sanders ea8711b88e Re-commit r315885: [globalisel][tblgen] Add support for iPTR and implement am_unscaled* and am_indexed*
Summary:
iPTR is a pointer of subtarget-specific size to any address space. Therefore
type checks on this size derive the SizeInBits from a subtarget hook.

At this point, we can import the simplests G_LOAD rules and select load
instructions using them. Further patches will support for the predicates to
enable additional loads as well as the stores.

The previous commit failed on MSVC due to a failure to convert an
initializer_list to a std::vector. Hopefully, MSVC will accept this version.

Depends on D37457

Reviewers: ab, qcolombet, t.p.northover, rovka, aditya_nandakumar

Reviewed By: qcolombet

Subscribers: kristof.beyls, javed.absar, llvm-commits, igorb

Differential Revision: https://reviews.llvm.org/D37458

llvm-svn: 315887
2017-10-16 03:36:29 +00:00
Daniel Sanders ce72d611af Revert r315885: [globalisel][tblgen] Add support for iPTR and implement am_unscaled* and am_indexed*
MSVC doesn't like one of the constructors.

llvm-svn: 315886
2017-10-16 02:15:39 +00:00
Daniel Sanders 6735ea86cd [globalisel][tblgen] Add support for iPTR and implement am_unscaled* and am_indexed*
Summary:
iPTR is a pointer of subtarget-specific size to any address space. Therefore
type checks on this size derive the SizeInBits from a subtarget hook.

At this point, we can import the simplests G_LOAD rules and select load
instructions using them. Further patches will support for the predicates to
enable additional loads as well as the stores.

Depends on D37457

Reviewers: ab, qcolombet, t.p.northover, rovka, aditya_nandakumar

Reviewed By: qcolombet

Subscribers: kristof.beyls, javed.absar, llvm-commits, igorb

Differential Revision: https://reviews.llvm.org/D37458

llvm-svn: 315885
2017-10-16 01:16:35 +00:00
Daniel Sanders a71f454765 [globalisel][tablegen] Implement unindexed load, non-extending load, and MemVT checks
Summary:
This includes some context-sensitivity in the MVT to LLT conversion so that
pointer types are tested correctly.
FIXME: I'm not happy with the way this is done since everything is a
       special-case. I've yet to find a reasonable way to implement it.

select-load.mir fails because <1 x s64> loads in tablegen get priority over s64
loads. This is fixed in the next patch and as such they should be committed
together, I've posted them separately to help with the review.

Depends on D37456

Reviewers: ab, qcolombet, t.p.northover, rovka, aditya_nandakumar

Subscribers: kristof.beyls, javed.absar, llvm-commits, igorb

Differential Revision: https://reviews.llvm.org/D37457

llvm-svn: 315884
2017-10-16 00:56:30 +00:00
Krzysztof Parzyszek 7467119149 [Hexagon] Add LLVM_ATTRIBUTE_UNUSED to operator<<, NFC
This should silence "unused function" warnings.

llvm-svn: 315883
2017-10-16 00:29:47 +00:00
Nico Weber 58c8e3bba5 Search for libxml2 on macOS too.
This allows lld-link to process /manifestinput: flags on macOS too.
Also makes the `REQUIRES: manifesttool` lld tests run on macOS.
Setting LLVM_ENABLE_LIBXML2 to off can suppress this behavior, like on Linux.

llvm-svn: 315873
2017-10-15 19:13:57 +00:00
Daniel Sanders adbf58dc0b [tablegen] Use hasPredCode()/hasImmCode() instead of getPredCode().empty()/getImmCode().empty(). NFC
These are cheaper ways of testing for the presence of code than generating the C++ code and testing it's empty.

llvm-svn: 315872
2017-10-15 19:01:32 +00:00
Krzysztof Parzyszek bc7f806cea Phony change to CMakeLists.txt to (hopefully) trigger regeneration
Ninja doesn't seem to recognize a change in a CMakeLists.txt in a
subdirectory, so r315861 is not having any effect.

llvm-svn: 315870
2017-10-15 18:23:16 +00:00
Daniel Sanders df39cbae2f Re-commit r315863: [globalisel][tablegen] Import ComplexPattern when used as an operator
Summary:
It's possible for a ComplexPattern to be used as an operator in a match
pattern. This is used by the load/store patterns in AArch64 to name the
suboperands returned by ComplexPattern predicate so that they can be broken
apart and referenced independently in the result pattern.

This patch adds support for this in order to enable the import of load/store
patterns.

Depends on D37445

Hopefully fixed the ambiguous constructor that a large number of bots reported.

Reviewers: ab, qcolombet, t.p.northover, rovka, aditya_nandakumar

Reviewed By: qcolombet

Subscribers: aemerson, javed.absar, igorb, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D37456

llvm-svn: 315869
2017-10-15 18:22:54 +00:00
Daniel Sanders bb082a36d3 Revert r315863: [globalisel][tablegen] Import ComplexPattern when used as an operator
A large number of bots are failing on an ambiguous constructor call.

llvm-svn: 315866
2017-10-15 17:51:07 +00:00
Daniel Sanders b95b867dd8 [globalisel][tablegen] Import ComplexPattern when used as an operator
Summary:
It's possible for a ComplexPattern to be used as an operator in a match
pattern. This is used by the load/store patterns in AArch64 to name the
suboperands returned by ComplexPattern predicate so that they can be broken
apart and referenced independently in the result pattern.

This patch adds support for this in order to enable the import of load/store
patterns.

Depends on D37445

Reviewers: ab, qcolombet, t.p.northover, rovka, aditya_nandakumar

Reviewed By: qcolombet

Subscribers: aemerson, javed.absar, igorb, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D37456

llvm-svn: 315863
2017-10-15 17:03:36 +00:00
Craig Topper 2738117326 [X86] Remove the SlowBTMem feature flag entirely
Turns out we have no patterns on the instructions that were using this feature flag for other reasons. These instructions are slow on all modern CPUs so it seems unlikely that we will spend any effort supporting these instructions going forward. So we might as well just kill of the feature flag and just fix up the comments.

llvm-svn: 315862
2017-10-15 16:57:33 +00:00
Krzysztof Parzyszek c2e2e0a678 [unittests] Only build llvm-cfi-verify if X86 is in LLVM_TARGETS_TO_BUILD
The test requires a target for triple x86-64, and it fails in builds that
do not have the X86 backend.

llvm-svn: 315861
2017-10-15 16:55:23 +00:00
Craig Topper a5af4a64d0 [AVX512] Don't mark EXTLOAD as legal with AVX512. Continue using custom lowering.
Summary:
This was impeding our ability to combine the extending shuffles with other shuffles as you can see from the test changes.

There's one special case that needed to be added to use VZEXT directly for v8i8->v8i64 since the custom lowering requires v64i8.

Reviewers: RKSimon, zvi, delena

Reviewed By: delena

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38714

llvm-svn: 315860
2017-10-15 16:41:17 +00:00
Craig Topper a1f9c9dd8b [X86] Add FeatureSlowBTMem to Haswell, Broadwell, Skylake, Cannonlake, and Knights Landing CPUs.
Summary: I see nothing in Agner Fog's tables to indicate that this improved between Ivy Bridge and Haswell. It's also set for all Atom CPUs so I assume KNL should have it too.

Reviewers: RKSimon, zvi, gadi.haber

Reviewed By: gadi.haber

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38890

llvm-svn: 315859
2017-10-15 16:41:15 +00:00
Krzysztof Parzyszek 4b3876f7a3 [TableGen] Remove error checks incorrectly failing on non-error conditions
In type inference, an empty type set for a specific hw mode is not an
error. In earlier stages of the design it was, but having to use non-
parameterized types with target intrinsics necessarily led to type
contradictions: since the intrinsics used specific types, they were
only valid for a specific hw mode, and the resulting type set for other
modes ended up empty. To accommodate the existence of such intrinsics
individual type sets were allowed to be empty as long as not all sets
were empty.

llvm-svn: 315858
2017-10-15 15:39:56 +00:00
Sanjay Patel 934738a3da revert r314984: revert r314698 - [InstCombine] remove one-use restriction for icmp (shr exact X, C1), C2 --> icmp X, (C2<<C1)
Recommitting r314698. The bug exposed by this change should be fixed with:
https://reviews.llvm.org/rL315579 

llvm-svn: 315857
2017-10-15 15:39:15 +00:00
Sanjay Patel 30f30d37fb [SimplifyCFG] use range-for-loops, tidy; NFCI
There seems to be something missing here as shown in PR34471:
https://bugs.llvm.org/show_bug.cgi?id=34471 

llvm-svn: 315855
2017-10-15 14:43:39 +00:00
Aaron Ballman 615eb47035 Reverting r315590; it did not include changes for llvm-tblgen, which is causing link errors for several people.
Error LNK2019 unresolved external symbol "public: void __cdecl `anonymous namespace'::MatchableInfo::dump(void)const " (?dump@MatchableInfo@?A0xf4f1c304@@QEBAXXZ) referenced in function "public: void __cdecl `anonymous namespace'::AsmMatcherEmitter::run(class llvm::raw_ostream &)" (?run@AsmMatcherEmitter@?A0xf4f1c304@@QEAAXAEAVraw_ostream@llvm@@@Z) llvm-tblgen D:\llvm\2017\utils\TableGen\AsmMatcherEmitter.obj 1

llvm-svn: 315854
2017-10-15 14:32:27 +00:00
whitequark ae12efab20 [MergeFunctions] Merge small functions if possible without a thunk.
This can result in significant code size savings in some cases,
e.g. an interrupt table all filled with the same assembly stub
in a certain Cortex-M BSP results in code blowup by a factor of 2.5.

Differential Revision: https://reviews.llvm.org/D34806

llvm-svn: 315853
2017-10-15 12:29:09 +00:00
whitequark b2ce9ffede [MergeFunctions] Replace all uses of unnamed_addr functions.
This reduces code size for constructs like vtables or interrupt
tables that refer to functions in global initializers.

Differential Revision: https://reviews.llvm.org/D34805

llvm-svn: 315852
2017-10-15 12:29:01 +00:00
Amjad Aboud c8d67979c0 [X86] Ignore DBG instructions in X86CmovConversion optimization to resolve PR34565
Differential Revision: https://reviews.llvm.org/D38359

llvm-svn: 315851
2017-10-15 11:00:56 +00:00
Hongbin Zheng 73f650435b [LoopInfo][Refactor] Make SetLoopAlreadyUnrolled a member function of the Loop Pass, NFC.
This avoid code duplication and allow us to add the disable unroll metadata elsewhere.

Differential Revision: https://reviews.llvm.org/D38928

llvm-svn: 315850
2017-10-15 07:31:02 +00:00
Craig Topper a9cd59fb5d [X86] Lower vselect with constant condition to vector_shuffle even with AVX512 instructions.
Summary:
It's better to use our shuffle lowering code to handle these than loading an immediate into a k-register.

It really feels like this should be a DAG combine optimization rather than a lowering operation, but that's a problem for another day.

Reviewers: RKSimon, delena, zvi

Reviewed By: delena

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38932

llvm-svn: 315849
2017-10-15 06:39:07 +00:00
Craig Topper f02e97859b [X86] Don't use constant condition for select instruction when testing masking ops.
We should be able to fold constant conditions by converting to shuffles, but fixing that would break these tests in their current form. Since they are really trying to test masking ops, add a non-constant mask to the selects.

llvm-svn: 315848
2017-10-15 06:05:50 +00:00
Vitaly Buka 7450398e01 Remove unused variables
llvm-svn: 315847
2017-10-15 05:35:02 +00:00
Daniel Sanders 39690bdf42 [globalisel][tablegen] Map ld and st to G_LOAD and G_STORE. NFC
Summary:
There is an important mismatch between ISD::LOAD and G_LOAD (and likewise for
ISD::STORE and G_STORE). In SelectionDAG, ISD::LOAD is a non-atomic load
and atomic loads are handled by a separate node. However, this is not true of
GlobalISel's G_LOAD. For G_LOAD, the MachineMemOperand indicates the atomicity
of the operation. As a result, this mapping must also add a predicate that
checks for non-atomic MachineMemOperands.

This is NFC since these nodes always have predicates in practice and are
therefore always rejected at the moment.

Depends on D37443

Reviewers: ab, qcolombet, t.p.northover, rovka, aditya_nandakumar

Reviewed By: qcolombet

Subscribers: kristof.beyls, llvm-commits, igorb

Differential Revision: https://reviews.llvm.org/D37445

llvm-svn: 315843
2017-10-15 02:41:12 +00:00
Daniel Sanders 3f267bf769 [tablegen] Handle common load/store predicates inside tablegen. NFC.
Summary:
GlobalISel and SelectionDAG require different code for the common
load/store predicates due to differences in the representation.
For example:
   SelectionDAG: (load<signext,i8>:i32 GPR32:$addr) // The <> denote properties of the SDNode that are not printed in the DAG
   GlobalISel: (G_SEXT:s32 (G_LOAD:s8 GPR32:$addr))
Even without that, differences in the IR (SDNode vs MachineInstr) require
differences in the C++ predicate.

This patch moves the implementation of the common load/store predicates
into tablegen so that it can handle these differences.

It's NFC for SelectionDAG since it emits equivalent code and it's NFC for
GlobalISel since the rules involving the relevant predicates are still
rejected by the importer.

Depends on D36618

Reviewers: ab, qcolombet, t.p.northover, rovka, aditya_nandakumar

Subscribers: llvm-commits, igorb

Differential Revision: https://reviews.llvm.org/D37443

Includes a partial revert of r315826 since this patch makes it necessary for
getPredCode() to return a std::string and getImmCode() should have the same
interface as getPredCode().

llvm-svn: 315841
2017-10-15 02:06:44 +00:00
Davide Italiano 76067588dc [Hexagon] Mark RangeTree::dump() with LLVM_DUMP_METHOD.
GCC otherwise emits a "defined but not used" warning on the
member function.

llvm-svn: 315838
2017-10-14 23:46:01 +00:00
Konstantin Zhuravlyov 263f7f6676 AMDGPU: Temporary disable pal metadata check line in llvm-readobj test
It fails on mips

llvm-svn: 315837
2017-10-14 23:42:11 +00:00
Konstantin Zhuravlyov 8c18f5b3d4 AMDGPU: Don't use TargetStreamer if it has not been initialized
Fixes cfe/trunk/test/Misc/backend-resource-limit-diagnostics.cl
test after r315808

We may hit few other similar issues, but I want to discuss good
solution offline.

llvm-svn: 315830
2017-10-14 22:16:26 +00:00
Craig Topper dfb443e88c [X86] Remove a bunch of dead FileCheck lines with the wrong prefix.
llvm-svn: 315828
2017-10-14 21:46:55 +00:00
Simon Pilgrim 6ecae9fc97 [TableGen] Avoid unnecessary std::string creations
Avoid unnecessary std::string creations in the TreePredicateFn getters.

llvm-svn: 315826
2017-10-14 21:27:53 +00:00
Simon Pilgrim 36fe00ee17 [X86][SSE] Don't attempt to reduce the imul vector width of odd sized vectors (PR34947)
llvm-svn: 315825
2017-10-14 19:57:19 +00:00
Simon Pilgrim 3f49b988e0 [X86][SSE] Test vector imul reduction on 32 and 64-bit targets
llvm-svn: 315824
2017-10-14 19:46:08 +00:00
Bruno Cardoso Lopes caac2fbd19 Revert "[AArch64][RegisterBankInfo] Use the statically computed mappings for COPY"
This reverts commit r315781, breaks:
http://green.lab.llvm.org/green/job/Compiler_Verifiers_GlobalISEL/9882

llvm-svn: 315823
2017-10-14 19:31:03 +00:00
Konstantin Zhuravlyov 13376a4bdf AMDGPU: Add AMDGPU HSA Kernel Descriptor
- Update docs to match llvm coding style
  - Add missing FP16_OVFL bit for gfx9
  - Fix the size of the kernel descriptor in the docs

Differential Revision: https://reviews.llvm.org/D38902

llvm-svn: 315822
2017-10-14 19:17:08 +00:00
Konstantin Zhuravlyov a01d8b0b63 AMDGPU: Bring HSA metadata on par with the specification
Differential Revision: https://reviews.llvm.org/D38753

llvm-svn: 315821
2017-10-14 19:03:51 +00:00
Konstantin Zhuravlyov b3c605d680 llvm-readobj: Print AMDGPU note contents
Differential Revision: https://reviews.llvm.org/D38752

llvm-svn: 315819
2017-10-14 18:21:42 +00:00
Simon Pilgrim f5b9f353c3 Pull out repeated calls to VT.getVectorNumElements(). NFCI.
llvm-svn: 315818
2017-10-14 17:37:42 +00:00
Simon Pilgrim 5bd4431aec Cleanup update_llc_test_checks.py notes.
llvm-svn: 315817
2017-10-14 17:37:03 +00:00
Konstantin Zhuravlyov 7b4be1ed89 AMDGPU: Cleanup elf-notes.ll test
llvm-svn: 315816
2017-10-14 17:36:53 +00:00
Simon Pilgrim cded82837d Use DAG::getBitcast() helper. NFCI.
llvm-svn: 315815
2017-10-14 17:14:42 +00:00
Konstantin Zhuravlyov 716af741e9 llvm-readobj: Print AMDGPU note type names
Differential Revision: https://reviews.llvm.org/D38751

llvm-svn: 315813
2017-10-14 16:43:46 +00:00
Konstantin Zhuravlyov 219066bab8 AMDGPU: Improve note directive verification in assembler
- Do not allow amd_amdgpu_isa directives on non-amdgcn architectures
  - Do not allow amd_amdgpu_hsa_metadata on non-amdhsa OSes
  - Do not allow amd_amdgpu_pal_metadata on non-amdpal OSes

Differential Revision: https://reviews.llvm.org/D38750

llvm-svn: 315812
2017-10-14 16:15:28 +00:00
Konstantin Zhuravlyov eda425edd4 AMDGPU: Do not emit deprecated notes for code object v3
Differential Revision: https://reviews.llvm.org/D38749

llvm-svn: 315810
2017-10-14 15:59:07 +00:00
Konstantin Zhuravlyov 9c05b2bc3b AMDGPU: Add support for isa version note
- Emit NT_AMD_AMDGPU_ISA
  - Add assembler parsing for isa version directive
    - If isa version directive does not match command line arguments, then return error

Differential Revision: https://reviews.llvm.org/D38748

llvm-svn: 315808
2017-10-14 15:40:33 +00:00
Simon Pilgrim f367c27d2d [X86][SSE] Support combining AND(EXTRACT(SHUF(X)), C) -> EXTRACT(SHUF(X))
If we are applying a byte mask to a value extracted from a shuffle, see if we can combine the mask into shuffle.

Fixes the last issue with PR22415

llvm-svn: 315807
2017-10-14 15:01:36 +00:00
Craig Topper f7e777763d [X86] Add patterns for vzmovl+cvtpd2dq/cvttpd2dq with a load.
llvm-svn: 315802
2017-10-14 07:04:48 +00:00
Craig Topper 61010a85b8 [X86] Add AVX512 versions of VCVTPD2PS to load folding tables.
llvm-svn: 315801
2017-10-14 05:55:43 +00:00
Craig Topper ee277e190c [X86] Add patterns for vzmovl+cvtpd2ps with a load.
llvm-svn: 315800
2017-10-14 05:55:42 +00:00
Craig Topper aec05a9303 [X86] Remove some patterns for bitcasted alignednonedtemporalloads.
These select the same instruction as the non-bitcasted pattern. So this provides no additional value.

llvm-svn: 315799
2017-10-14 04:18:11 +00:00
Craig Topper 009f0aaeb0 [X86] Remove unnecessary bitconverts as the root of patterns for zero extended VCVTPD2UDQZ128rr and VCVTTPD2UDQZ128rr.
We don't need a bitconvert as a root pattern in these cases. The types in the other parts of the pattern are sufficient to express the behavior of these instructions.

llvm-svn: 315798
2017-10-14 04:18:10 +00:00
Craig Topper d746747d03 [X86] Add additional patterns for folding loads with 128-bit VCVTDQ2PD and VCVTUDQ2PD.
This matches the patterns we have for the SSE/AVX version.

This is a prerequisite for D38714.

llvm-svn: 315797
2017-10-14 04:18:09 +00:00
Craig Topper 134241e4af [X86] Add AVX512 flavors of VCVTDQ2PD plus VCVTUDQ2PD to the load folding tables.
llvm-svn: 315796
2017-10-14 04:18:08 +00:00
Craig Topper 0b64e67b0d [X86] Remove TB_NO_REVERSE from VCVTDQ2PDYrr and VCVTPS2PDYrr in the load folding tables.
I believe these were added incorrectly under the belief that the load size was smaller than the input register size, but that's not true.

llvm-svn: 315795
2017-10-14 04:18:07 +00:00
Craig Topper 53b0cb7fa9 [X86] Add an additional isel pattern to CVTDQ2PDrm/VCVTDQ2PDrm to enable load folding without the peephole pass.
This pattern is already used in AVX512VL version of these instructions. Though AVX512VL version is missing other patterns.

llvm-svn: 315794
2017-10-14 04:18:06 +00:00
Jordan Rose e55d9a1403 Revert "lit.py: Add new %{shared_output(LABEL)} substitution"
This reverts r315697 and my ill-fated attempts to fix it on Windows.
I'll try again when I get access to a Windows machine.

llvm-svn: 315793
2017-10-14 04:01:27 +00:00
Jordan Rose a33a17605d lit.py: Give up and disable the new shared-output.py test on Windows
"No such file or directory: C:\\...\\tests\\Output\\shared-output.py.tmp/Output/Shared/SHARED.tmp"

And yet other forward-slashes don't seem to be causing the same
problem. I'll see if I can get ahold of a Windows machine to poke at
this directly later.

llvm-svn: 315792
2017-10-14 03:33:46 +00:00
Yaxun Liu adde4e4c01 Fix assembler for alloca of multiple elements in non-zero addr space
Currently llvm assembler emits parsing error for valid IR assembly

alloca i32, i32 9, addrspace(5)
when alloca addr space is 5.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D38713

llvm-svn: 315791
2017-10-14 03:23:18 +00:00
Jakub Kuderski 369e85a900 [Dominators] Remove the NCA check
Summary:
This patch removes the `verifyNCD` check.

The reason for this is that the other checks are sufficient to prove or disprove correctness of any DominatorTree, and that `verifyNCD` doesn't provide (in my option) better error messages then the other ones.
Additionally, this should give a (small) improvement to the total verification time, as the check is O(n), and checking the sibling property takes O(n^3).

Reviewers: dberlin, grosser, davide, brzycki

Reviewed By: brzycki

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38802

llvm-svn: 315790
2017-10-14 03:00:56 +00:00
Vedant Kumar 1963f51f14 [llvm-cov] Factor out logic to iterate over line coverage stats (NFC)
There were two copies of the logic needed to construct a line stats
object for each line in a range: this patch brings it down to one. In
the future, this will make it easier for IDE clients to display coverage
in-line in source editors. To do that, we just need to move the new
LineCoverageIterator class to libCoverage.

llvm-svn: 315789
2017-10-14 02:27:29 +00:00
Daniel Sanders 0eb929b08b [globalisel][tablegen] Fix an unused variable warning caused by a typo (corrected OtherInsnID->OtherOpIdx).
The tests were passing by luck since the instruction ID and operand index happened to be the same.

llvm-svn: 315788
2017-10-14 01:51:46 +00:00
Daniel Sanders ab3a464482 [globalisel][tablegen] Fix undefined references to dump()
Two debugging statements snuck into the commit.

llvm-svn: 315783
2017-10-14 00:56:01 +00:00
Jordan Rose fddfb5ad4c lit.py: Previous test fix was a red herring; backslashes are escapes
I don't have access to a Windows machine at the moment, so if this
doesn't fix it I'll just revert for now.

llvm-svn: 315782
2017-10-14 00:49:19 +00:00
Quentin Colombet dc2da06c55 [AArch64][RegisterBankInfo] Use the statically computed mappings for COPY
We use to resort on the generic implementation to get the mappings for
COPYs. The generic implementation resorts on table lookup and
dynamically allocated objects to get the valid mappings.

Given we already know how to map G_BITCAST and have the static mappings
for them, use that code path for COPY as well. This is much more
efficient.

Improve the compile time of RegBankSelect by up to 20%.

Note: When we eventually generate all the mappings via TableGen, we
wouldn't have to do that dance to shave compile time. The intent of this
change was to make sure that moving to static structure really pays off.

NFC.

llvm-svn: 315781
2017-10-14 00:43:48 +00:00
Daniel Sanders bfa9e2cae7 [globalisel][tablegen] Simplify named operand/operator lookups and fix a wrong-code bug this revealed.
Summary:
Operand variable lookups are now performed by the RuleMatcher rather than
searching the whole matcher hierarchy for a match. This revealed a wrong-code
bug that currently affects ARM and X86 where patterns that use a variable more
than once in the match pattern will be imported but won't check that the
operands are identical. This can cause the tablegen-erated matcher to
accept matches that should be rejected.

Depends on D36569

Reviewers: ab, t.p.northover, qcolombet, rovka, aditya_nandakumar

Subscribers: aemerson, igorb, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D36618

llvm-svn: 315780
2017-10-14 00:31:58 +00:00
Jordan Rose aafbc1c4db lit.py: Fix new test harder for systems that don't use / as os.path.sep
I didn't think about '%{inputs}' having the same problem. This one
should be a fully Windows path name.

llvm-svn: 315779
2017-10-14 00:26:48 +00:00
Jordan Rose f4fd5938e7 lit.py: Fix new test for systems that don't use / as os.path.sep
llvm-svn: 315773
2017-10-13 22:46:40 +00:00
Krzysztof Parzyszek a7e5c84590 Revert r315763: "[Hexagon] Rangify some loops, NFC"
Broke some builds (using libstdc++).

llvm-svn: 315769
2017-10-13 21:57:11 +00:00
Craig Topper f6c69564e7 [X86] Use X86ISD::VBROADCAST in place of v2f64 X86ISD::MOVDDUP when AVX2 is available
This is particularly important for AVX512VL where we are better able to recognize the VBROADCAST loads to fold with other operations.

For AVX512VL we now use X86ISD::VBROADCAST for all of the patterns and remove the 128-bit X86ISD::VMOVDDUP.

We may be able to use this for AVX1 as well which would allow us to remove more isel patterns.

I also had to add X86ISD::VBROADCAST as a node to call combineShuffle for so that we treat it similar to X86ISD::MOVDDUP.

Differential Revision: https://reviews.llvm.org/D38836

llvm-svn: 315768
2017-10-13 21:56:48 +00:00
Craig Topper 526b70a089 [X86] Use fsub in the movddup scheduling tests to prevent a future patch from folding movddup as a broadcast load.
llvm-svn: 315767
2017-10-13 21:56:45 +00:00
Daniel Sanders 2fed4ffa9e [globalisel][tablegen] Fix a use-after free bug that manifests on non-macOS machines.
llvm-svn: 315765
2017-10-13 21:51:20 +00:00
Krzysztof Parzyszek 63ca5d6196 [Hexagon] Rangify some loops, NFC
llvm-svn: 315763
2017-10-13 21:43:00 +00:00
Sanjay Patel b869f76d85 [InstCombine] use m_Neg() to reduce code; NFCI
llvm-svn: 315762
2017-10-13 21:28:50 +00:00
Daniel Sanders 11300cead8 [globalisel][tablegen] Add support for fpimm and import of APInt/APFloat based ImmLeaf.
Summary:
There's only a tablegen testcase for IntImmLeaf and not a CodeGen one
because the relevant rules are rejected for other reasons at the moment.
On AArch64, it's because there's an SDNodeXForm attached to the operand.
On X86, it's because the rule either emits multiple instructions or has
another predicate using PatFrag which cannot easily be supported at the
same time.

Reviewers: ab, t.p.northover, qcolombet, rovka, aditya_nandakumar

Reviewed By: qcolombet

Subscribers: aemerson, javed.absar, igorb, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D36569

llvm-svn: 315761
2017-10-13 21:28:03 +00:00
Eugene Zelenko 3b87939604 [Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 315760
2017-10-13 21:17:07 +00:00
Quentin Colombet 4a6b75012d [RegisterBankInfo] Cache the getMinimalPhysRegClass information
TargetRegisterInfo::getMinimalPhysRegClass is actually pretty expensive
because it has to iterate over all the register classes.
Cache this information as we need and get it so that we limit its usage.
Right now, we heavily rely on it, because this is how we get the mapping
for vregs defined by copies from physreg (i.e., the one that are ABI
related).

Improve compile time by up to 10% for that pass.

NFC

llvm-svn: 315759
2017-10-13 21:16:15 +00:00
Quentin Colombet d58265ad55 [Legalizer] Use SmallSetVector instead of SetVector.
NFC

llvm-svn: 315758
2017-10-13 21:16:14 +00:00
Quentin Colombet b1a3bd1529 [LegalizerInfo] Don't evaluate end boundary every time through the loop
Match the LLVM coding standard for loop conditions.

NFC.

llvm-svn: 315757
2017-10-13 21:16:13 +00:00
Quentin Colombet 86220488b4 [Legalizer] Only allocate the SetVectors once per function.
Prior to this patch we used to create SetVectors in temporaries that
were created and destroyed for each instruction. Now, instead we create
and destroyed them only once, but clear the content for each
instruction.
This speeds up the pass by ~25%.

NFC.

llvm-svn: 315756
2017-10-13 21:16:05 +00:00
Matt Arsenault e11d8aca77 AMDGPU: Implement hasBitPreservingFPLogic
llvm-svn: 315754
2017-10-13 21:10:22 +00:00
Peter Collingbourne 868783e855 LowerTypeTests: Give imported symbols a type with size 0 so that they are not assumed not to alias.
It is possible for both a base and a derived class to be satisfied
with a unique vtable. If a program contains casts of the same pointer
to both of those types, the CFI checks will be lowered to this
(with ThinLTO):

if (p != &__typeid_base_global_addr)
  trap();
if (p != &__typeid_derived_global_addr)
  trap();

The optimizer may then use the first condition combined
with the assumption that __typeid_base_global_addr and
__typeid_derived_global_addr may not alias to optimize away the second
comparison, resulting in an unconditional trap.

This patch fixes the bug by giving imported globals the type [0 x i8]*,
which prevents the optimizer from assuming that they do not alias.

Differential Revision: https://reviews.llvm.org/D38873

llvm-svn: 315753
2017-10-13 21:02:16 +00:00
Sanjay Patel 505e071dc7 [Reassociate] auto-generate better checks; NFC
These would fail if the created variable names changed.

llvm-svn: 315752
2017-10-13 20:56:35 +00:00
Benjamin Kramer 9f21ca6361 [Hexagon] Avoid unused variable warnings in release builds.
No functionality change intended.

llvm-svn: 315749
2017-10-13 20:46:14 +00:00
Matt Arsenault 550c66d10f AMDGPU: Look for src mods before fp_extend
When selecting modifiers for mad_mix instructions,
look at fneg/fabs that occur before the conversion.

llvm-svn: 315748
2017-10-13 20:45:49 +00:00
Daniel Sanders 649c585710 [aarch64] Support APInt and APFloat in ImmLeaf subclasses and make AArch64 use them.
Summary:
The purpose of this patch is to expose more information about ImmLeaf-like
PatLeaf's so that GlobalISel can learn to import them. Previously, ImmLeaf
could only be used to test int64_t's produced by sign-extending an APInt.
Other tests on immediates had to use the generic PatLeaf and extract the
constant using C++.

With this patch, tablegen will know how to generate predicates for APInt,
and APFloat. This will allow it to 'do the right thing' for both SelectionDAG
and GlobalISel which require different methods of extracting the immediate
from the IR.

This is NFC for SelectionDAG since the new code is equivalent to the
previous code. It's also NFC for FastISel because FastIselShouldIgnore is 1
for the ImmLeaf subclasses. Enabling FastIselShouldIgnore == 0 for these new
subclasses will require a significant re-factor of FastISel.

For GlobalISel, it's currently NFC because the relevant code to import the
affected rules is not yet present. This will be added in a later patch.

Depends on D36086

Reviewers: ab, t.p.northover, qcolombet, rovka, aditya_nandakumar

Reviewed By: qcolombet

Subscribers: bjope, aemerson, rengolin, javed.absar, igorb, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D36534

llvm-svn: 315747
2017-10-13 20:42:18 +00:00
Benjamin Kramer d76ed069eb [SmallPtrSet] Add iterator epoch tracking.
This will detect invalid iterators when ABI breaking checks are enabled.

llvm-svn: 315746
2017-10-13 20:37:52 +00:00
Sanjay Patel f0242de143 [InstCombine] move code to remove repeated constant check; NFCI
Also, consolidate tests for this fold in one place.

llvm-svn: 315745
2017-10-13 20:29:11 +00:00
Matt Arsenault 4d70754e3c AMDGPU: Implement isFPExtFoldable
This helps match v_mad_mix* in some cases.

llvm-svn: 315744
2017-10-13 20:18:59 +00:00
Sanjay Patel 28b3aa3663 [InstCombine] recycle adds for better efficiency
Also, clean up unnecessary matcher capture variable initializations.

llvm-svn: 315743
2017-10-13 20:12:21 +00:00
Matt Arsenault f2db97d8fa DAG: Add opcode and source type to isFPExtFree
This is only currently used for mad/fma transforms.
This is the only case where it should be used for AMDGPU,
so add an opcode to be sure.

llvm-svn: 315740
2017-10-13 19:55:45 +00:00
Krzysztof Parzyszek 7c9c05888c [Hexagon] Minimize number of repeated constant extenders
Each constant extender requires an extra instruction, which adds to the
code size and also reduces the number of available slots in an instruction
packet. In most cases, the value of a repeated constant extender could be
loaded into a register, and the instructions using the extender could be
replaced with their counterparts that use that register instead.

This patch adds a pass that tries to reduce the number of constant
extenders, including extenders which differ only in an immediate offset
known at compile time, e.g. @global and @global+12.

llvm-svn: 315735
2017-10-13 19:02:59 +00:00
Daniel Sanders 9e0ae7bd8b Revert r315148 [TableGen] Avoid unnecessary std::string creations
I'm about to commit a patch that makes them necessary for getPredCode() and
it would be strange for getPredCode() and getImmCode() to require different
usage.

llvm-svn: 315733
2017-10-13 19:00:01 +00:00
Sanjay Patel 2118952162 [InstCombine] use local var to reduce code duplication; NFCI
llvm-svn: 315728
2017-10-13 18:32:53 +00:00
Sanjay Patel bdaa2f9d05 [LLVMCore] fix description for OverflowingBinaryOperator; NFC
llvm-svn: 315726
2017-10-13 18:25:23 +00:00
Craig Topper 5d692917f4 [X86] Add initial skeleton support for knm cpu
This adds Intel's Knights Mill CPU to valid CPU names for the backend. For now its an alias of "knl", but ultimately we need to support AVX5124FMAPS and AVX5124VNNIW instruction sets for it.

Differential Revision: https://reviews.llvm.org/D38811

llvm-svn: 315722
2017-10-13 18:10:17 +00:00
Matthew Simpson 2284937bbc [IPSCCP] Move common functions to ValueLatticeUtils (NFC)
This patch moves some common utility functions out of IPSCCP and makes them
available globally. The functions determine if interprocedural data-flow
analyses can propagate information through function returns, arguments, and
global variables.

Differential Revision: https://reviews.llvm.org/D37638

llvm-svn: 315719
2017-10-13 17:53:44 +00:00
Sanjay Patel c419c9f640 [InstCombine] add hasOneUse check to add-zext-add fold to prevent increasing instructions
llvm-svn: 315718
2017-10-13 17:47:25 +00:00
Sanjay Patel 399fcbea37 [InstCombine] add tests for add (zext (add nuw X, C2)), C --> zext (add nuw X, C2 + C); NFC
llvm-svn: 315717
2017-10-13 17:42:12 +00:00
Matt Morehouse e29452b4b7 [llvm-demangle-fuzzer] Add a fuzz target for ItaniumDemangler.
Patch By: hctim

Reviewers: morehouse, bogner

Reviewed By: bogner

Subscribers: bogner, kcc, llvm-commits, mgorny

Differential Revision: https://reviews.llvm.org/D38855

llvm-svn: 315716
2017-10-13 17:35:37 +00:00
Max Moroz 43df793f5c [llvm-cov] Reland sources-specified.test with addition of "-path-equivalence".
Summary: This version of tests should be working properly.

Reviewers: vsk

Reviewed By: vsk

Differential Revision: https://reviews.llvm.org/D38889

llvm-svn: 315714
2017-10-13 17:27:39 +00:00
Sanjoy Das c70a7a02ea [SCEV] Maintain and use a loop->loop invalidation dependency
Summary:
This change uses the loop use list added in the previous change to remember the
loops that appear in the trip count expressions of other loops; and uses it in
forgetLoop.  This lets us not scan every loop in the function on a forgetLoop
call.

With this change we no longer invalidate clear out backedge taken counts on
forgetValue.  I think this is fine -- the contract is that SCEV users must call
forgetLoop(L) if their change to the IR could have changed the trip count of L;
solely calling forgetValue on a value feeding into the backedge condition of L
is not enough.  Moreover, I don't think we can strengthen forgetValue to be
sufficient for invalidating trip counts without significantly re-architecting
SCEV.  For instance, if we have the loop:

  I = *Ptr;
  E = I + 10;
  do {
    // ...
  } while (++I != E);

then the backedge taken count of the loop is 9, and it has no reference to
either I or E, i.e. there is no way in SCEV today to re-discover the dependency
of the loop's trip count on E or I.  So a SCEV client cannot change E to (say)
"I + 20", call forgetValue(E) and expect the loop's trip count to be updated.

Reviewers: atrick, sunfish, mkazantsev

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D38435

llvm-svn: 315713
2017-10-13 17:13:44 +00:00
Simon Pilgrim c4977fa9a1 [X86] Test scalar integer absolutes on 32-bit targets with/without CMOV
llvm-svn: 315711
2017-10-13 17:09:20 +00:00
Reid Kleckner be3724b5e1 Not all buildbots seem to dump the nuw flag in SDAG
llvm-svn: 315710
2017-10-13 17:00:49 +00:00
Sanjay Patel 76ed9eab29 [InstCombine] use AddOne helper to reduce code; NFC
llvm-svn: 315709
2017-10-13 17:00:47 +00:00
Simon Pilgrim df9611e178 [X86] Updated scalar integer absolute tests to cover i8/i16/i32/i64
llvm-svn: 315706
2017-10-13 16:53:07 +00:00
Sanjay Patel 8d810fee43 [InstCombine] rearrange code to remove repeated constant check; NFCI
llvm-svn: 315703
2017-10-13 16:43:58 +00:00
Sanjay Patel 2150651ac3 [InstCombine] allow zext(bool) + C --> select bool, C+1, C for vector types
The backend should be prepared for this transform after:
https://reviews.llvm.org/rL311731

llvm-svn: 315701
2017-10-13 16:29:38 +00:00
Javed Absar 08fb414b21 [TableGen] : Simplify RegisterInfoEmitter
llvm-svn: 315700
2017-10-13 16:27:57 +00:00
Reid Kleckner c687a34870 Update test to expect nuw flag in SDAG dump, fixes test after r315690
llvm-svn: 315698
2017-10-13 16:13:23 +00:00
Jordan Rose 53be3224b2 lit.py: Add new %{shared_output(LABEL)} substitution
This refers to a temporary path that can be shared across all tests,
identified by a particular label. This can be used for things like
caches.

At the moment, the character set for the LABEL is limited to C
identifier characters, plus '-', '+', '=', and '.'. This is the same
set of characters currently allowed in REQUIRES clause identifiers.

llvm-svn: 315697
2017-10-13 16:12:23 +00:00
Craig Topper 5805fb3dfc [X86] Fix some inconsistent formatting in the processor feature lists.
llvm-svn: 315696
2017-10-13 16:06:06 +00:00
Craig Topper 54541c4675 [X86] Add ProcIntelBDW to BroadwellProc class not BDWFeatures class.
This isn't a property we want inherited.

llvm-svn: 315695
2017-10-13 16:04:08 +00:00
Daniel Neilson fa14ebd138 [RS4GC] Look through vector bitcasts when looking for base pointer
Summary:
 In RS4GC it is possible that a base pointer is contained in a vector that
has undergone a bitcast from one element-pointertype to another. We teach
RS4GC how to look through bitcasts of vector types when looking for a base
pointer.

Reviewers: anna

Reviewed By: anna

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38849

llvm-svn: 315694
2017-10-13 15:59:13 +00:00
Max Moroz 8ff311b54a [llvm-cov] Temporary delete sources-specified.test, it is failing on some bots.
Summary: http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu/builds/5950/steps/test-stage1-compiler/logs/stdio

Reviewers: vsk, Dor1s

Reviewed By: Dor1s

Subscribers: mehdi_amini

Differential Revision: https://reviews.llvm.org/D38888

llvm-svn: 315693
2017-10-13 15:58:58 +00:00
Krzysztof Parzyszek a0f2f7c413 [Hexagon] Add patterns for cmpb/cmph with immediate arguments
Patch by Sumanth Gundapaneni.

llvm-svn: 315692
2017-10-13 15:43:12 +00:00
Max Moroz 8bc53fd031 [llvm-cov] Fix sources-specified.test so it ignores the order of files printed.
Summary: https://reviews.llvm.org/D38884#896964

Reviewers: vsk, Dor1s

Reviewed By: Dor1s

Differential Revision: https://reviews.llvm.org/D38887

llvm-svn: 315691
2017-10-13 15:41:51 +00:00
Matt Arsenault 846dd6b2fa DAG: Add flags to dumps
llvm-svn: 315690
2017-10-13 15:41:40 +00:00
Max Moroz c5834e5e88 [llvm-cov] An attempt to fix sources_specified.test failing on some buildbots.
Summary: https://reviews.llvm.org/rL315685#115380

Reviewers: vsk, Dor1s

Reviewed By: Dor1s

Differential Revision: https://reviews.llvm.org/D38884

llvm-svn: 315687
2017-10-13 15:30:24 +00:00
Craig Topper 0817346aef [X86] Stop creating CMOV nodes with a second MVT::Glue result
Summary: We seem to inconsistently create CMOV nodes some with a Glue result and some without. But I can't find any cases that use the Glue result. So I've tried to remove all the place that did this.

Reviewers: RKSimon, spatel, zvi

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38664

llvm-svn: 315686
2017-10-13 15:28:35 +00:00
Max Moroz 4a4bfa4e27 [llvm-cov] Generate "report" for given source paths if sources are specified.
Summary:
Documentation says that user can specify sources for both "show" and
"report" commands. "Show" command respects specified sources, but "report" does
not. It is useful to have both "show" and "report" generated for specified
sources. Also added tests to for both commands with sources specified.

Reviewers: vsk, kcc

Reviewed By: vsk

Differential Revision: https://reviews.llvm.org/D38860

llvm-svn: 315685
2017-10-13 14:44:51 +00:00
Jonas Devlieghere 614fab4bd8 Re-land "[dsymutil] Timestmap verification for __swift_ast"
This patch adds timestamp verification for swiftmodule files. A new flag
is provided to allows us to disable this check in order to allow testing
of this feature.

Differential revision: https://reviews.llvm.org/D38686

llvm-svn: 315684
2017-10-13 14:41:23 +00:00
Anna Thomas a2ca902033 [SCEV] Teach SCEV to find maxBECount when loop endbound is variant
Summary:
This patch teaches SCEV to calculate the maxBECount when the end bound
of the loop can vary. Note that we cannot calculate the exactBECount.

This will only be done when both conditions are satisfied:
1. the loop termination condition is strictly LT.
2. the IV is proven to not overflow.

This provides more information to users of SCEV and can be used to
improve identification of finite loops.

Reviewers: sanjoy, mkazantsev, silviu.baranga, atrick

Reviewed by: mkazantsev

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38825

llvm-svn: 315683
2017-10-13 14:30:43 +00:00
Sanjay Patel 45d5568010 [InstCombine] add tests for boolean extend + add; NFC
llvm-svn: 315681
2017-10-13 14:09:45 +00:00
Daniel Jasper 3344a21236 Revert r314923: "Recommit : Use the basic cost if a GEP is not used as addressing mode"
Significantly reduces performancei (~30%) of gipfeli
(https://github.com/google/gipfeli)

I have not yet managed to reproduce this regression with the open-source
version of the benchmark on github, but will work with others to get a
reproducer to you later today.

llvm-svn: 315680
2017-10-13 14:04:21 +00:00
Sjoerd Meijer 9a26a7ec33 [FileCheck] regexp doc update/fix
Minor doc update that the FileCheck matcher supports POSIX ERE.
It also fixes a minor issue in the regexp describing a variable
name: underscores are allowed too.

Differential Revision: https://reviews.llvm.org/D38787

llvm-svn: 315679
2017-10-13 14:02:36 +00:00
Marco Castelluccio 0dcf64ad20 Disable gcov instrumentation of functions using funclet-based exception handling
Summary: This patch fixes the crash from https://bugs.llvm.org/show_bug.cgi?id=34659 and https://bugs.llvm.org/show_bug.cgi?id=34833.

Reviewers: rnk, majnemer

Reviewed By: rnk, majnemer

Subscribers: majnemer, llvm-commits

Differential Revision: https://reviews.llvm.org/D38223

llvm-svn: 315677
2017-10-13 13:49:15 +00:00
Justin Bogner 1cd8cf3937 docs: Improve wording on building for fuzzing
The original sentence didn't really make sense.

Patch by Vedant Kumar. Thanks!

llvm-svn: 315676
2017-10-13 06:29:09 +00:00
Craig Topper bf0de9d3b6 [X86] Remove patterns that select unmasked vbroadcastf2x32/vbroadcasti2x32. Prefer vbroadcastsd/vpbroadcastq instead.
There's no advantage to using these instructions when they aren't masked. This enables some additional execution domain switching without needing to update the table.

llvm-svn: 315674
2017-10-13 06:07:10 +00:00
Sanjoy Das e6b995f2b2 [SCEV] Maintain loop use lists, and use them in forgetLoop
Summary:
Currently we do not correctly invalidate memoized results for add recurrences
that were created directly (i.e. they were not created from a `Value`).  This
change fixes this by keeping loop use lists and using the loop use lists to
determine which SCEV expressions to invalidate.

Here are some statistics on the number of uses of in the use lists of all loops
on a clang bootstrap (config: release, no asserts):

     Count: 731310
       Min: 1
      Mean: 8.555150
50th %time: 4
95th %tile: 25
99th %tile: 53
       Max: 433

Reviewers: atrick, sunfish, mkazantsev

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D38434

llvm-svn: 315672
2017-10-13 05:50:52 +00:00
Craig Topper 6794eb8ba1 [SelectionDAG] Cleanup the SIGN_EXTEND_INREG handling in computeKnownBits. NFCI
Use less temporary APInts. Use bit counting more. Don't call getScalarSizeInBits so many places, just capture it once.

llvm-svn: 315671
2017-10-13 05:35:35 +00:00
Craig Topper bde7abe9c9 [SelectionDAG] Fix typo in comment. NFC
llvm-svn: 315670
2017-10-13 05:35:34 +00:00
Justin Bogner 386b2bd0e3 docs: Improve the docs about llvm-isel-fuzzer on OSS Fuzz
llvm-svn: 315651
2017-10-13 00:27:35 +00:00
Craig Topper 11655b22dc [X86] Add the test case for r315613 that I forgot to 'git add'.
llvm-svn: 315649
2017-10-13 00:20:47 +00:00
Craig Topper d6630b9889 [SelectionDAG] Correct the early out in SelectionDAG::getZeroExtendInReg to work properly for vector types.
I don't know if we ever hit this case or not. Turning it into an assert only fired on expanding some atomic operation in a SystemZ lit test.

llvm-svn: 315648
2017-10-13 00:18:58 +00:00
Matt Morehouse 8bc23ab658 [llvm-isel-fuzzer] Use "--" as separator rather than '='.
Summary: OSS-Fuzz doesn't support '=' in filenames.

Reviewers: bogner, kcc

Reviewed By: kcc

Subscribers: javed.absar, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D38866

llvm-svn: 315647
2017-10-13 00:18:32 +00:00
Justin Bogner 9c03fd5f64 llvm-isel-fuzzer: Use the right REQUIRES line for r315599
I'd mixed up ENABLE_SHARED and BUILD_SHARED_LIBS before, so these
tests were being disabled in too many places.

llvm-svn: 315646
2017-10-13 00:17:54 +00:00