Commit Graph

35 Commits

Author SHA1 Message Date
Konstantin Zhuravlyov ea35e46b71 AMDGPU/Docs: Fix unreadable characters
llvm-svn: 316171
2017-10-19 17:12:55 +00:00
Tony Tye 6baa6d21e8 [AMDGPU] Corrections to memory model description.
- Add description on nontemporal support.
 - Correct OpenCL sequentially consistent and fence code sequences.
 - Minor test cleanup.

Differential Revision: https://reviews.llvm.org/D39073

llvm-svn: 316131
2017-10-18 22:16:55 +00:00
Konstantin Zhuravlyov 265d253aae AMDGPU/Docs: Make target naming consistent
- R600 Arch: Use Radeon HD XXXX Series
  - GCN Arch: Use GFXX

Differential Revision: https://reviews.llvm.org/D39019

llvm-svn: 316100
2017-10-18 17:59:20 +00:00
Konstantin Zhuravlyov 8d5e9e110c AMDGPU: Rename MaxFlatWorkgroupSize to MaxFlatWorkGroupSize for consistency
Differential Revision: https://reviews.llvm.org/D38957

llvm-svn: 316097
2017-10-18 17:31:09 +00:00
Tony Tye d288430c3e Add base relative relocation record that can be used for the following case (OpenCL example):
static __global int Var = 0; 
__global int* Ptr[] = {&Var};
...

In this case Var is a non premptable symbol and so its address can be used as the value of Ptr, with a base relative relocation that will add the delta between the ELF address and the actual load address. Such relocations do not require a symbol.

Differential Revision: https://reviews.llvm.org/D38909

llvm-svn: 315935
2017-10-16 20:44:29 +00:00
Konstantin Zhuravlyov 13376a4bdf AMDGPU: Add AMDGPU HSA Kernel Descriptor
- Update docs to match llvm coding style
  - Add missing FP16_OVFL bit for gfx9
  - Fix the size of the kernel descriptor in the docs

Differential Revision: https://reviews.llvm.org/D38902

llvm-svn: 315822
2017-10-14 19:17:08 +00:00
Konstantin Zhuravlyov a01d8b0b63 AMDGPU: Bring HSA metadata on par with the specification
Differential Revision: https://reviews.llvm.org/D38753

llvm-svn: 315821
2017-10-14 19:03:51 +00:00
Yaxun Liu de4b88d9a1 [AMDGPU] Lower enqueued blocks and generate runtime metadata
This patch adds a post-linking pass which replaces the function pointer of enqueued
block kernel with a global variable (runtime handle) and adds
runtime-handle attribute to the enqueued block kernel.

In LLVM CodeGen the runtime-handle metadata will be translated to
RuntimeHandle metadata in code object. Runtime allocates a global buffer
for each kernel with RuntimeHandel metadata and saves the kernel address
required for the AQL packet into the buffer. __enqueue_kernel function
in device library knows that the invoke function pointer in the block
literal is actually runtime handle and loads the kernel address from it
and puts it into AQL packet for dispatching.

This cannot be done in FE since FE cannot create a unique global variable
with external linkage across LLVM modules. The global variable with internal
linkage does not work since optimization passes will try to replace loads
of the global variable with its initialization value.

Differential Revision: https://reviews.llvm.org/D38610

llvm-svn: 315352
2017-10-10 19:39:48 +00:00
Konstantin Zhuravlyov 3696352d85 AMDGPU/Docs: Follow up on review feedback in https://reviews.llvm.org/D38387
llvm-svn: 314848
2017-10-03 21:18:03 +00:00
Konstantin Zhuravlyov 0aa94d314c AMDGPU: Add ELFOSABI_AMDGPU_MESA3D
Differential Revision: https://reviews.llvm.org/D38387

llvm-svn: 314846
2017-10-03 21:14:14 +00:00
Konstantin Zhuravlyov a952b44ed5 AMDGPU: Add ELFOSABI_AMDGPU_PAL
llvm-svn: 314843
2017-10-03 20:54:07 +00:00
Tony Tye 46d3576c24 Update AMDGPUUsage.rst documentation:
1. Correct description of the kernel initial state for FLAT_SCRATCH_INIT.
    2. Add link to GFX9 architecture documentation.
    3. Update product names.
    4. Rename note record from NT_AMD_AMDGPU_METADATA to NT_AMD_AMDGPU_HSA_METADATA and move description to the AMDHSA coding convention section.
    5. Minor typo corrections.

Differential Revision: https://reviews.llvm.org/D36549

llvm-svn: 310954
2017-08-15 20:47:41 +00:00
Konstantin Zhuravlyov 6cbcb27b5e AMDGPU: Also remove SI from docs
Differential Revision: https://reviews.llvm.org/D36424

llvm-svn: 310335
2017-08-08 04:28:31 +00:00
Tony Tye d5b1cbf046 Correct GFX9 processor names.
Differential Revision: https://reviews.llvm.org/D33736

llvm-svn: 307353
2017-07-07 03:10:01 +00:00
Sylvestre Ledru e3fdbaea0d fix various typos
llvm-svn: 306262
2017-06-26 02:45:39 +00:00
Tony Tye 1fd77b2599 Correct AMDGPU Hawaii and Kabini target names
The FirePro and Radeon versions of Hawaii have different 64 bit floating point configurations so use distinct target names for them. Rename the target name for Kabini to accommodate.

Differential Revision: https://reviews.llvm.org/D34016

llvm-svn: 304959
2017-06-08 01:47:25 +00:00
Tony Tye 3b34061367 Try to work around possible bugs in version of Shpinx on buildserver.
Builds sucessfully with Sphinx v1.5.5

Differential Revision: https://reviews.llvm.org/D33736

llvm-svn: 304853
2017-06-07 00:46:08 +00:00
Tony Tye d9c251f46c Add documentation for various aspects of the AMDGPU backend.
Remove extra tabs.
Builds sucessfully with Sphinx v1.5.5

Differential Revision: https://reviews.llvm.org/D33736

llvm-svn: 304848
2017-06-07 00:08:35 +00:00
Tony Tye f16a45ea15 Add documentation for various aspects of the AMDGPU backend.
Differential Revision: https://reviews.llvm.org/D33736

llvm-svn: 304831
2017-06-06 20:31:59 +00:00
Aaron Ballman 678512d062 Fixing a malformed RST table to get the documentation bot back to green.
llvm-svn: 301545
2017-04-27 14:33:01 +00:00
Matt Arsenault 3e02538a02 AMDGPU: Move trap lowering to DAG
Fixes traps in any block besides the entry block,
and fixes depending on a live-in physical register
by using a virtual register copy.

Also happens to stop emitting a nop in the case
debug trap is not supported.

llvm-svn: 301206
2017-04-24 17:49:13 +00:00
Konstantin Zhuravlyov d5561e0a0b [DebugInfo] Emit address space with DW_AT_address_class attribute for pointer and reference types
Differential Revision: https://reviews.llvm.org/D29670

llvm-svn: 297320
2017-03-08 23:55:44 +00:00
Wei Ding 16289cfcfc AMDGPU : AMDGPU : Update AMDGPU Trap Handler ABI.
Differential Revision: http://reviews.llvm.org/D29913

llvm-svn: 295745
2017-02-21 18:48:01 +00:00
Aaron Ballman b802b8d75b Correcting several sphinx errors; should fix the LLVM documentation build.
llvm-svn: 294865
2017-02-11 18:45:24 +00:00
Wei Ding 205bfdb3e9 AMDGPU : Add trap handler support.
Differential Revision: http://reviews.llvm.org/D26010

llvm-svn: 294692
2017-02-10 02:15:29 +00:00
Sylvestre Ledru e6ec4418fb fix some typos in the doc
llvm-svn: 292014
2017-01-14 11:37:01 +00:00
Nikolay Haustov 96a56bd0c6 AMDGPU: Improve documentation.
Summary:
Add links to ISA manuals and ABI.
Add text about assembler syntax.
Add info about instructions operands.
Add instruction examples for each encoding.
Update directives section, add missing .amdgpu_hsa_kernel.

Reviewers: tstellarAMD, SamWot, vpykhtin

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, artem.tamazov, llvm-commits

Differential Revision: https://reviews.llvm.org/D24724

llvm-svn: 281962
2016-09-20 09:04:51 +00:00
Aaron Ballman 887ad0e9db This code block breaks the docs build (http://lab.llvm.org:8011/builders/llvm-sphinx-docs/builds/11920/steps/docs-llvm-html/logs/stdio), but I cannot see anything immediately wrong with it and cannot reproduce the diagnostic locally. Setting the code highlighting to none instead of nasm to hopefully get the bot stumbling back towards green.
llvm-svn: 275998
2016-07-19 17:46:55 +00:00
Aaron Ballman 977daf307d Speculatively fix the sphinx build, which does not think the original code was valid nasm (http://lab.llvm.org:8011/builders/llvm-sphinx-docs/builds/11854/steps/docs-llvm-html/logs/stdio).
llvm-svn: 275408
2016-07-14 13:08:16 +00:00
Tom Stellard 3ec09e61d1 AMDGPU: Document address space mapping
Summary:
Address space mapping is described in lib/Target/AMDGPU/AMDGPU.h in
Doxygen comments. This patch adds the description to user guide for
AMDGPU back-end.

Patch By: Vedran Miletić

Reviewers: tstellarAMD, arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17046

llvm-svn: 265500
2016-04-06 01:29:19 +00:00
Sylvestre Ledru a7de98205a fix the indentation of the example
llvm-svn: 261628
2016-02-23 11:17:27 +00:00
Tom Stellard b8a91bbf04 docs/AMDGPUUsage: Update assembly example
Reviewers: arsenm, nhaustov

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17461

llvm-svn: 261550
2016-02-22 18:36:00 +00:00
Tom Stellard ff7416ba06 AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support
Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10772

llvm-svn: 240839
2015-06-26 21:58:31 +00:00
Tom Stellard 347ac79b15 AMDGPU/SI: Add hsa code object directives
Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10757

llvm-svn: 240831
2015-06-26 21:15:07 +00:00
Tom Stellard 45bb48ea19 R600 -> AMDGPU rename
llvm-svn: 239657
2015-06-13 03:28:10 +00:00