Commit Graph

275641 Commits

Author SHA1 Message Date
Haojian Wu 5529a244e1 Add new check in google module for Objective-C code to ensure global variables follow the naming convention of Google Objective-C Style Guide
Summary:
This is a new checker for objc files in clang-tidy.

The new check finds global variable declarations in Objective-C files that are not follow the pattern of variable names in Google's Objective-C Style Guide.

All the global variables should follow the pattern of "g[A-Z].*" (variables) or "k[A-Z].*" (constants). The check will suggest a variable name that follows the pattern
if it can be inferred from the original name.

Patch by Yan Zhang!

Reviewers: benhamilton, hokein, alexfh

Reviewed By: hokein

Subscribers: Eugene.Zelenko, mgorny

Differential Revision: https://reviews.llvm.org/D39391

llvm-svn: 317552
2017-11-07 08:53:37 +00:00
Bjorn Steinbrink c02b237e46 [X86] Don't clobber reserved registers with stack adjustments
Summary:
Calls using invoke in funclet based functions are assumed to clobber
all registers, which causes the stack adjustment using pops to consider
all registers not defined by the call to be undefined, which can
unfortunately include the base pointer, if one is needed.

To prevent this (and possibly other hazards), skip reserved registers
when looking for candidate registers.

This fixes issue #45034 in the Rust compiler.

Reviewers: mkuper

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39636

llvm-svn: 317551
2017-11-07 08:50:21 +00:00
Craig Topper e7fb300226 [X86] Add patterns to fold a 64-bit load into the EVEX vcvtph2ps instructions.
llvm-svn: 317548
2017-11-07 07:13:07 +00:00
Craig Topper 0231b1d445 [X86] Add patterns for folding a v16i8 with the VEX vcvtph2ps intrinsics.
Disable the peephole pass to prove that the pattern is working.

llvm-svn: 317547
2017-11-07 07:13:06 +00:00
Craig Topper 65fc53320b [X86] Add a test for a 128-bit vector load feeding a cvtph2ps intrinsic.
The instruction only loads 64-bits, but we should be able to fold a wider load and let it be narrowed.

llvm-svn: 317546
2017-11-07 07:13:05 +00:00
Craig Topper 8942b33f84 [X86] Remove alignment from a load in the f16c intrinsic test. The alignment shouldn't be required for load folding.
llvm-svn: 317545
2017-11-07 07:13:04 +00:00
Craig Topper cf8e6d0a76 [X86] Add support for using EVEX instructions for the legacy vcvtph2ps intrinsics.
Looks like there's some missed load folding opportunities for i64 loads.

llvm-svn: 317544
2017-11-07 07:13:03 +00:00
Craig Topper 75510dd6f7 [X86] Add AVX512VL command line to f16c intrinsic test to show missed EVEX opportunities for the legacy intrinsics.
llvm-svn: 317543
2017-11-07 07:13:01 +00:00
Craig Topper afc3c8206e [X86] Use IMPLICIT_DEF in VEX/EVEX vcvtss2sd/vcvtsd2ss patterns instead of a COPY_TO_REGCLASS.
ExeDepsFix pass should take care of making the registers match.

llvm-svn: 317542
2017-11-07 04:44:22 +00:00
Craig Topper 4ad81b51ed [X86] Remove 'Requires' from instructions with no patterns. NFC
llvm-svn: 317541
2017-11-07 04:44:21 +00:00
NAKAMURA Takumi e02398022d ClangdTests/JSONExprTests.cpp: Appease g++-4.8 to move raw string literal out of macro arg.
llvm-svn: 317538
2017-11-07 02:18:24 +00:00
George Karpenkov 166548c0dc [analyzer] [NFC] Remove unused typedef from SVals.h
Differential Revision: https://reviews.llvm.org/D39620

llvm-svn: 317537
2017-11-07 02:02:10 +00:00
Rafael Espindola fcd7494832 Use Path instead of Config->OutputFile. NFC.
This function is always called with Config->OutputFile. That is not
obvious from reading the function. It should always use Path or take
no argument and always use Config->OutputFile.

llvm-svn: 317536
2017-11-07 02:00:51 +00:00
Davide Italiano 1f465aa64a [Support/UNIX] posix_fallocate() can fail with EINVAL.
According to the docs on opegroup.org, the function can return
EINVAL if:

The len argument is less than zero, or the offset argument is less
than zero, or the underlying file system does not support this
operation.

I'd say it's a peculiar choice (when EONOTSUPP is right there), but
let's keep POSIX happy for now. This was independently discovered
by Mark Millard (on FreeBSD/ZFS).

Quickly ack'ed by Rui on IRC.

llvm-svn: 317535
2017-11-07 00:47:04 +00:00
Adrian Prantl 25a09dd408 Make DIExpression::createFragmentExpression() return an Optional.
We can't safely split arithmetic into multiple fragments because we
can't express carry-over between fragments.

llvm-svn: 317534
2017-11-07 00:45:34 +00:00
Alex Lorenz 4e30b96834 Clarify the error message for unsupported aliases on Darwin
rdar://35109556

llvm-svn: 317532
2017-11-07 00:31:19 +00:00
Keith Wyss 424279958d [XRay] Minimal tool to convert xray traces to Chrome's Trace Event Format.
Minimal tool to convert xray traces to Chrome's Trace Event Format.

Summary:
Make use of Chrome Trace Event format's Duration events and stack frame dict to
produce Json files that chrome://tracing can visualize from xray function call
traces. Trace Event format is more robust and has several features like
argument logging, function categorization, multi process traces, etc. that we
can add as needed. Duration events cover an important base case.

Part of this change is rearranging the code so that the TrieNode data structure
can be used from multiple tools and can carry parameterized baggage on the
nodes. I put the actual behavior changes in llvm-xray convert exclusively.

Exploring the trace of instrumented llc was pretty nifty if overwhelming.
I can envision this being very useful for analyzing contention scenarios or
tuning parameters like batch sizes in a producer consumer queue. For more
targeted traces likemthis, let's talk about how we want to approach trace
pruning.

Reviewers: dberris, pelikan

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39362

llvm-svn: 317531
2017-11-07 00:28:28 +00:00
Rui Ueyama 989b1fcb01 Remove dead code.
llvm-svn: 317530
2017-11-07 00:26:04 +00:00
Stephane Sezer d20106b5ec Disable tests in lang/c/shared_lib on Windows
Summary: These fail because `-fPIC` is not supported on Windows.

Reviewers: zturner, jingham, clayborg

Reviewed By: clayborg

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D39692

llvm-svn: 317529
2017-11-07 00:14:40 +00:00
Rui Ueyama d5e2e8393b Report an error if an inferred alignment for a shared symbol is too large.
Differential Revision: https://reviews.llvm.org/D39697

llvm-svn: 317528
2017-11-07 00:12:05 +00:00
Davide Italiano 1a46affb45 [IPO/LowerTypesTest] Skip blockaddress(es) when replacing uses.
Blockaddresses refer to the function itself, therefore replacing them
would cause an assertion in doRAUW.

Fixes https://bugs.llvm.org/show_bug.cgi?id=35201

This was found when trying CFI on a proprietary kernel by Dmitry Mikulin.

Differential Revision:  https://reviews.llvm.org/D39695

llvm-svn: 317527
2017-11-07 00:09:25 +00:00
Matt Arsenault 6119f80034 AMDGPU: Remove redundant combine
This combine was already done in two places. The
generic combiner already has done this since
r217610, for adds (with a single use).

This one was added in r303641, and added support for handling
or as well. r313251 later added support to the generic
combine for or. It also turns out the isOrEquivalentToAdd
check is not necessary for this combine.

Additionally, we already reproduce this combine in yet
another place in the backend, although in that version
multiple uses of the add are still folded if it will
allow a fold into the addressing mode. That version needs
to be improved to understand ors though, as well as the
correct legal offsets for private.

llvm-svn: 317526
2017-11-07 00:06:32 +00:00
Rui Ueyama 7957b08e87 Move MIPS-specific code from Symbols.cpp to MIPS.cpp.
We have a lot of "if (MIPS)" conditions in lld because the MIPS' ABI
is different at various places than other arch's ABIs at where it
don't have to be different, but we at least want to reduce MIPS-ness
from the regular classes.

llvm-svn: 317525
2017-11-07 00:04:22 +00:00
Vedant Kumar 2b881f567f [DebugInfo] Unify logic to merge DILocations. NFC.
This makes DILocation::getMergedLocation() do what its comment says it
does when merging locations for an Instruction: set the common inlineAt
scope. This simplifies Instruction::applyMergedLocation() a bit.

Testing: check-llvm, check-clang

Differential Revision: https://reviews.llvm.org/D39628

llvm-svn: 317524
2017-11-06 23:15:21 +00:00
Simon Dardis 8bdbff37fe [Support][Chrono] Use explicit cast of text output of time values.
rL316419 exposed a platform specific issue where the type of the values
passed to llvm::format could be different to the format string.

Debian unstable for mips uses long long int for std::chrono:duration,
while x86_64 uses long int.

For mips, this resulted in the value being corrupted when rendered to a
string. Address this by explicitly casting the result of the duration_cast
to the type specified in the format string.

Reviewers: sammccall

Differential Revision: https://reviews.llvm.org/D39597

llvm-svn: 317523
2017-11-06 23:01:46 +00:00
Adrian Prantl 182f9fea37 InstCombine: salvage the debug info of DCE'ed add instructions.
rdar://problem/31209283

llvm-svn: 317522
2017-11-06 22:49:39 +00:00
Craig Topper 428a4e6374 [X86] Make FeatureAVX512 imply FeatureF16C.
The EVEX to VEX pass is already assuming this is true under AVX512VL. We had special patterns to use zmm instructions if VLX and F16C weren't available.

Instead just make AVX512 imply F16C to make the EVEX to VEX behavior explicitly legal and remove the extra patterns.

All known CPUs with AVX512 have F16C so this should safe for now.

llvm-svn: 317521
2017-11-06 22:49:04 +00:00
Craig Topper cb6c38612e [X86] Make FeatureAVX512 imply FeatureFMA.
Previously our VEX patterns were checking Subtarget.hasFMA() which checked FMA || AVX512. So we were behaving as if AVX512 implied it anyway. Which means we'd allow VEX encoded 128/256 FMA when AVX512F was enabled but AVX512VL is off. Regardless of the FMA flag.

EVEX to VEX also transforms scalar EVEX FMA instructions to their VEX versions even without the FMA flag. Similarly for 128/256 under AVX512VL.

So this makes AVX512 imply FeatureFMA to make our current behavior explicit.

All known CPUs that support AVX512 have VEX FMA instructions.

llvm-svn: 317520
2017-11-06 22:49:01 +00:00
Sanjay Patel 86d24f1668 [ValueTracking] readonly (const) is a requirement for converting sqrt to llvm.sqrt; nnan is not
As discussed in D39204, this is effectively a revert of rL265521 which required nnan 
to vectorize sqrt libcalls based on the old LangRef definition of llvm.sqrt. Now that
the definition has been updated so the libcall and intrinsic have the same semantics
apart from potentially setting errno, we can remove the nnan requirement.

We have the right check to know that errno is not set:

if (!ICS.onlyReadsMemory())

...ahead of the switch.

This will solve https://bugs.llvm.org/show_bug.cgi?id=27435 assuming that's being 
built for a target with -fno-math-errno.

Differential Revision: https://reviews.llvm.org/D39642

llvm-svn: 317519
2017-11-06 22:40:09 +00:00
Hans Wennborg 8c4b10e84a Revert r317510 "[InstCombine] Pull shifts through a select plus binop with constant"
This broke the CodeGen/Hexagon/loop-idiom/pmpy-mod.ll test on a bunch of buildbots.

> This pulls shifts through a select+binop with a constant where the select conditionally executes the binop. We already do this for just the binop, but not with the select.
>
> This can allow us to get the select closer to other selects to enable removing one.
>
> Differential Revision: https://reviews.llvm.org/D39222
>
> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317510 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-svn: 317518
2017-11-06 22:28:02 +00:00
Hans Wennborg effc12dd43 Revert r316064 "Fix the incorrect detection of ICONV_LIBRARY_PATH"
This broke the use of libxml2 on machines where iconv() is provided by libc.
I'll follow up on the mailing list to discuss how to fix this properly.

> This is introduced in rL308711.
> Check for c library is incorrect here just because libc will be found always
> and it does not mean that iconv is presented.
>
> Thank to Andrew Krasny for narrowing down the root cause.
>
> Reviewers: ecbeckmann
> Reviewed By: ecbeckmann
> Subscribers: mgorny, llvm-commits
> Differential Revision: https://reviews.llvm.org/D38875

llvm-svn: 317517
2017-11-06 22:17:23 +00:00
Devin Coughlin 046833e5fb [analyzer] Model correct dispatch_once() 'done' value in BodyFarm
The analyzer's BodyFarm models dispatch_once() by comparing the passed-in
predicate against a known 'done' value. If the predicate does not have that
value, the model updates the predicate to have that value and executes the
passed in block.

Unfortunately, the current model uses the wrong 'done' value: 1 instead of ~0.
This interferes with libdispatch's static inline function _dispatch_once(),
which enables a fast path if the block has already been executed. That function
uses __builtin_assume() to tell the compiler that the done flag is set to ~0 on
exit. When r302880 added modeling of __builtin_assume(), this caused the
analyzer to assume 1 == ~0. This in turn caused the analyzer to never explore any code after a call to dispatch_once().

This patch regains the missing coverage by updating BodyFarm to use the correct
'done' value.

rdar://problem/34413048

Differential Revision: https://reviews.llvm.org/D39691

llvm-svn: 317516
2017-11-06 22:12:19 +00:00
Jonas Hahnfeld ba84ca9efb [OMPT] Fix null pointer in parallel/no_thread_num_clause.c
Looks like the implementation of printf on Darwin uses "0x0"
instead of "(nil)" like glibc does.

llvm-svn: 317515
2017-11-06 22:06:14 +00:00
Xinliang David Li a531f189fc Fix comment /NFC
llvm-svn: 317514
2017-11-06 21:57:51 +00:00
Bjorn Pettersson a42ed3e361 [MIRPrinter] Use %subreg.xxx syntax for subregister index operands
Summary:
Print %subreg.<subregidxname> instead of just the subregister
index when printing immediate operands corresponding to subreg
indices in INSERT_SUBREG, EXTRACT_SUBREG, SUBREG_TO_REG and
REG_SEQUENCE.

Reviewers: qcolombet, MatzeB

Reviewed By: MatzeB

Subscribers: nhaehnle, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D39696

llvm-svn: 317513
2017-11-06 21:46:06 +00:00
Alex Shlyapnikov 2093b94e70 [LSan] Detect dynamic loader by its base address.
Summary:
Relanding D38600, which was reverted due to various PPC bot failures.

If it breaks something again, please provide some pointers to broken
bots, not just revert it, otherwise it's very hard to reason what's
wrong with this commit.

Whenever possible (Linux + glibc 2.16+), detect dynamic loader module by
its base address, not by the module name matching. The current name
matching approach fails on some configurations.

Reviewers: eugenis

Subscribers: kubamracek, llvm-commits

Differential Revision: https://reviews.llvm.org/D39275

llvm-svn: 317512
2017-11-06 21:27:06 +00:00
Dave Lee f96bedfce3 Vary Windows toolchain selection by -fuse-ld
Summary:
This change allows binutils to be used for linking with MSVC. Currently, when
using an MSVC target and `-fuse-ld=bfd`, the driver produces an invalid linker
invocation.

Reviewers: rnk, compnerd

Reviewed By: compnerd

Subscribers: smeenai, cfe-commits

Differential Revision: https://reviews.llvm.org/D39509

llvm-svn: 317511
2017-11-06 21:18:05 +00:00
Craig Topper 8917647333 [InstCombine] Pull shifts through a select plus binop with constant
This pulls shifts through a select+binop with a constant where the select conditionally executes the binop. We already do this for just the binop, but not with the select.

This can allow us to get the select closer to other selects to enable removing one.

Differential Revision: https://reviews.llvm.org/D39222

llvm-svn: 317510
2017-11-06 21:07:22 +00:00
Justin Bogner f7b1007345 update_mir_test_checks: Be careful about replacing entire vregs
Previously, this could end up replacing a vreg like %14 with
[[VREG1]]4, where VREG1 was the match for %1. That's obviously not
correct, though it hasn't actually come up in any tests I've converted
so far.

llvm-svn: 317509
2017-11-06 21:06:09 +00:00
Graham Yiu 52a52a6cab Fix buildbot breakages from r317503. Add parentheses to assignment when using result as a condition.
llvm-svn: 317508
2017-11-06 21:04:19 +00:00
Craig Topper 57f96ac6dc [X86] Replace the mask cmpeq/cmple/cmplt/cmpgt/cmpge/cmpneq intrinsics with macros that just pass the right comparison predicate value to the regular cmp intrinsic. Remove mask cmpeq/cmpgt builtins that are now unused.
This shortens the intrinsic headers a little and allows us to get rid of the cmpeq and cmpgt handling from CGBuiltin.cpp.

llvm-svn: 317506
2017-11-06 21:00:49 +00:00
Martin Storsjo 6bde1667ba [MinGW] Don't autoexport anything from libmsvcrt or libucrtbase
These libraries contain a number of object files with compat wrappers,
in addition to the normal import library entries.

Differential Revision: https://reviews.llvm.org/D39684

llvm-svn: 317505
2017-11-06 20:33:13 +00:00
Martin Storsjo b438ea3f1c [X86] Add 3dnow and 3dnowa to the list of valid target features
These were missed in SVN r316783, which broke compiling mingw-w64 CRT.

Differential Revision: https://reviews.llvm.org/D39631

llvm-svn: 317504
2017-11-06 20:33:13 +00:00
Graham Yiu 030621bbcb Adds code to PPC ISEL lowering to recognize byte inserts from vector_shuffles, and use P9 shift and vector insert byte instructions instead of vperm. Extends tests from vector insert half-word.
Differential Revision: https://reviews.llvm.org/D34497

llvm-svn: 317503
2017-11-06 20:18:30 +00:00
Dehao Chen 5d2a1a5045 Include already promoted counts when computing SUM for VP.
Summary: When computing the SUM for indirect call promotion, if the callsite is already promoted in the profile, it will be promoted before ICP. In the current implementation, ICP only sees remaining counts in SUM. This may cause extra indirect call targets being promoted. This patch updates the SUM to include the counts already promoted earlier. This way we do not end up promoting too many indirect call targets.

Reviewers: tejohnson

Reviewed By: tejohnson

Subscribers: llvm-commits, sanjoy

Differential Revision: https://reviews.llvm.org/D38763

llvm-svn: 317502
2017-11-06 19:52:49 +00:00
Stephane Sezer 972d513a5c Add a dependency from check-lldb on lld
Summary:
This is required when using the in-tree clang for building tests,
because -fuse-ld=lld is used by default.

Subscribers: mgorny

Differential Revision: https://reviews.llvm.org/D39689

llvm-svn: 317501
2017-11-06 19:25:33 +00:00
Mitch Phillips 6fb3525113 [cfi-verify] Added a simple check that stops division-by-zero error when no indirect CF instructions are found in the provided file.
llvm-svn: 317500
2017-11-06 19:14:09 +00:00
Guozhi Wei e3b8d9a312 [PPC] Use xxbrd to speed up bswap64
Power doesn't have bswap instructions, so llvm generates following code sequence for bswap64.

  rotldi   5, 3, 16
  rotldi   4, 3, 8
  rotldi   9, 3, 24
  rotldi   10, 3, 32
  rotldi   11, 3, 48
  rotldi   12, 3, 56
  rldimi 4, 5, 8, 48
  rldimi 4, 9, 16, 40
  rldimi 4, 10, 24, 32
  rldimi 4, 11, 40, 16
  rldimi 4, 12, 48, 8
  rldimi 4, 3, 56, 0

But Power9 has vector bswap instructions, they can also be used to speed up scalar bswap intrinsic. With this patch, bswap64 can be translated to:

  mtvsrdd 34, 3, 3
  xxbrd 34, 34
  mfvsrld 3, 34

Differential Revision: https://reviews.llvm.org/D39510

llvm-svn: 317499
2017-11-06 19:09:38 +00:00
Mitch Phillips 5ebf7a87f3 Make MCAsmBackend and MCCodeEmiiter passed by unique_ptr rval
Summary: Fixes build breakage of llvm-mc-assemble-fuzzer introduced by rL315531.

Reviewers: lhames

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39268

llvm-svn: 317498
2017-11-06 18:56:36 +00:00
Michael Kruse 4d3f3c7206 [ForwardOpTree] Limit isl operations of known content reload.
Put the analysis part of reloadKnownContent under an isl
max-operations quota scope, as has already been done for
forwardKnownLoad.

This should fix the aosp timeout of "GrTestUtils.cpp".

llvm-svn: 317495
2017-11-06 17:48:14 +00:00