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Author SHA1 Message Date
Eric Christopher 5501b7e805 Change flag from Enable to Disable since we're enabled by default. 
Also don't use fast-isel on non-darwin since it's untested.

llvm-svn: 116217
 2010-10-11 20:05:22 +00:00
Michael J. Spencer 279362dd5a Add KillTheDoctor. 
llvm-svn: 116216
 2010-10-11 19:55:38 +00:00
Jim Grosbach 806b139bbc trailing whitespace cleanup 
llvm-svn: 116215
 2010-10-11 19:38:01 +00:00
Andrew Trick e01c9001c9 Fixes bug 8297: i386 cmpxchg8b, missing MachineMemOperand 
llvm-svn: 116214
 2010-10-11 19:02:04 +00:00
Jim Grosbach 5476a274c8 More binary encoding stuff, taking advantage of the new "by name" operand 
matching in tblgen to do the predicate operand.

llvm-svn: 116213
 2010-10-11 18:51:51 +00:00
Eric Christopher 2276e87a65 Turn on arm fast isel by default. 
llvm-svn: 116212
 2010-10-11 18:48:18 +00:00
Jim Grosbach 191ad7c473 When figuring out which operands match which encoding fields in an instruction, 
try to match them by name first. If there is no by-name match, fall back to
assuming they are in order (this was the previous behavior).

llvm-svn: 116211
 2010-10-11 18:25:51 +00:00
Jakob Stoklund Olesen 2f6531eb8c Properly handle reloading and spilling around partial redefines in 
LocalRewriter.

This is a bit of a hack that adds an implicit use operand to model the
read-modify-write nature of a partial redef. Uses and defs are rewritten in
separate passes, and a single operand would never be processed twice.

<rdar://problem/8518892>

llvm-svn: 116210
 2010-10-11 18:10:36 +00:00
Chris Lattner db3bc40ade remove dead prototype, PR8351 
llvm-svn: 116209
 2010-10-11 17:44:22 +00:00
Francois Pichet 0f5bfd27a3 MSVC hangs on compilation of ARMDisassembler.cpp. PR6866 applied to ARM target. 
llvm-svn: 116201
 2010-10-11 11:36:19 +00:00
Eric Christopher e1bcb43bb9 Copy and pasteo. 
llvm-svn: 116198
 2010-10-11 08:40:05 +00:00
Eric Christopher 7ac602bc8e Whitespace cleanup in ARM fast isel. 
llvm-svn: 116197
 2010-10-11 08:38:55 +00:00
Eric Christopher eae1b38550 Add srem libcall support to ARM fast isel. 
llvm-svn: 116196
 2010-10-11 08:37:26 +00:00
Eric Christopher e11017c19e Add i8 sdiv support for ARM fast isel. 
llvm-svn: 116195
 2010-10-11 08:31:54 +00:00
Eric Christopher 511aa31965 Implement select handling for ARM fast-isel. 
llvm-svn: 116194
 2010-10-11 08:27:59 +00:00
Chris Lattner 53afec4904 tweak comment. 
llvm-svn: 116192
 2010-10-11 05:48:00 +00:00
Chris Lattner 1ef5e84c31 Per discussion with Sanjiv, remove the PIC16 target from mainline. When/if 
it comes back, it will be largely a rewrite, so keeping the old codebase
in tree isn't helping anyone.

llvm-svn: 116190
 2010-10-11 05:44:40 +00:00
Michael J. Spencer 8dedb62019 X86: Call ulldiv and ftol2 on Windows instead of their libgcc eqivilents. 
llvm-svn: 116188
 2010-10-11 05:29:15 +00:00
Michael J. Spencer 00765e5be0 X86: MinGW should always use libgcc on Windows. 
llvm-svn: 116177
 2010-10-10 23:11:06 +00:00
Michael J. Spencer 7a573a5e1f X86: Call _alldiv instead of __divdi3 on Windows (excluding cygwin). 
llvm-svn: 116174
 2010-10-10 22:04:34 +00:00
Michael J. Spencer bee1f7f5ba Fix Whitespace. 
llvm-svn: 116173
 2010-10-10 22:04:20 +00:00
Chris Lattner f8f7537a77 force a triple, varargs isn't supported with the SVR4 ABI the buildbot tells me. 
llvm-svn: 116170
 2010-10-10 18:59:01 +00:00
Chris Lattner eb313a46fc fix the default va_arg expansion (in the realignment case) to not implicitly 
truncate the stack pointer to 32-bits on a 64-bit machine.

llvm-svn: 116169
 2010-10-10 18:36:26 +00:00
Chris Lattner d10babfd65 fix the expansion of va_arg instruction on PPC to know the arg 
alignment for PPC32/64, avoiding some masking operations.

llvm-gcc expands vaarg inline instead of using the instruction
so it has never hit this.

llvm-svn: 116168
 2010-10-10 18:34:00 +00:00
Chris Lattner f11031a68c clarify that zero sized vectors are illegal, PR8340 
llvm-svn: 116167
 2010-10-10 18:20:35 +00:00
Kenneth Uildriks b8d7efe785 Now using a variant of the existing inlining heuristics to decide whether to create a given specialization of a function in PartialSpecialization. If the total performance bonus across all callsites passing the same constant exceeds the specialization cost, we create the specialization. 
llvm-svn: 116158
 2010-10-09 22:06:36 +00:00
Nick Lewycky cf263b0cbd Fix dead link. 
llvm-svn: 116157
 2010-10-09 21:12:29 +00:00
Benjamin Kramer d84bb168cc Silence compiler warning. 
llvm-svn: 116156
 2010-10-09 16:36:44 +00:00
Michael J. Spencer a6a984bd96 MC-COFF: Fix .bss section size. Fixes PR8335. Patch by NAKAMUTA Takumi! 
llvm-svn: 116155
 2010-10-09 16:04:45 +00:00
Benjamin Kramer b20b08f898 Don't test a removed function. 
llvm-svn: 116154
 2010-10-09 15:53:25 +00:00
Michael J. Spencer 9cc3fcc8ec syntax-highlighting: Fix module asm keyword. 
llvm-svn: 116152
 2010-10-09 15:44:36 +00:00
Michael J. Spencer 86bbd71088 MC-COFF: Implement InitSections. Fixes PR8335. 
llvm-svn: 116151
 2010-10-09 15:44:27 +00:00
Michael J. Spencer c8dbdfd4ba MC-COFF: Add COFFAsmParser. Completes PR8343. 
llvm-svn: 116150
 2010-10-09 11:01:07 +00:00
Michael J. Spencer 530ce85b3e Fix Whitespace. 
llvm-svn: 116149
 2010-10-09 11:00:50 +00:00
Michael J. Spencer be52c62a6d MC-COFF: Assert on non-coff sections. 
llvm-svn: 116148
 2010-10-09 11:00:37 +00:00
Michael J. Spencer 3431778a2b Add Kate syntax highlighting files. 
llvm-svn: 116146
 2010-10-09 07:11:04 +00:00
Evan Cheng d7a404d85f Add VLD4 scheduling itineraries. 
llvm-svn: 116143
 2010-10-09 04:07:58 +00:00
Michael J. Spencer 3d89823102 MC: Move ParseDirectiveELFType into ELFAsmParser. COFF uses .type for something else. 
llvm-svn: 116142
 2010-10-09 03:47:55 +00:00
Evan Cheng a762400bed Finish vld3 and vld4. 
llvm-svn: 116140
 2010-10-09 01:45:34 +00:00
Evan Cheng 4187f4942e Complete vld2 instruction itineries. 
llvm-svn: 116136
 2010-10-09 01:26:12 +00:00
Evan Cheng 1c7fa43e6f Multiply instructions are issued on pipeline 0. They do not need to reserve pipeline 1. 
llvm-svn: 116135
 2010-10-09 01:15:04 +00:00
Evan Cheng 05f13e94bf Correct some load / store instruction itinerary mistakes: 
1. Cortex-A8 load / store multiplies can only issue on ALU0.
2. Eliminate A8_Issue, A8_LSPipe will correctly limit the load / store issues.
3. Correctly model all vld1 and vld2 variants.

llvm-svn: 116134
 2010-10-09 01:03:04 +00:00
Bill Wendling 748265b0da Simplify test and move into a generic "crash" ll file. 
llvm-svn: 116130
 2010-10-09 00:29:04 +00:00
Bill Wendling 59ebe44049 Check to make sure that the iterator isn't at the beginning of the basic block 
before decrementing. <rdar://problem/8529919>

llvm-svn: 116126
 2010-10-09 00:03:48 +00:00
Chris Lattner c951cfe6a0 add jit support for the new psuedo instructions I added for 
the add/or xform.  The JIT isn't mcized yet, boo.

This fixes Olden/voronoi, bh and a ton of other stuff that
uses the jit.

llvm-svn: 116125
 2010-10-08 23:59:27 +00:00
Chris Lattner 8eeb5013cd machine a mutable machineinstr down into emitInstruction. 
llvm-svn: 116124
 2010-10-08 23:54:01 +00:00
Eric Christopher 548587c31c Fix the store part of this as well. Fixes smg2000. 
llvm-svn: 116123
 2010-10-08 23:52:16 +00:00
Jakob Stoklund Olesen 959fcc6c63 Rename SplitEditor::rewrite to finish() and break it out into a couple of new 
functions: computeRemainder and rewrite.

When the remainder breaks up into multiple components, remember to rewrite those
uses as well.

llvm-svn: 116121
 2010-10-08 23:42:21 +00:00
Evan Cheng df2aae0c5a Avoid compiler warning: comparison between signed and unsigned integer. 
llvm-svn: 116119
 2010-10-08 23:01:57 +00:00
Jakob Stoklund Olesen b1b0ef7d03 Extract method ProcessUses from LocalRewriter::RewriteMBB. Both parent and child 
are still way too long, but it's a start.

No functional change intended.

llvm-svn: 116116
 2010-10-08 22:14:41 +00:00