Commit Graph

131161 Commits

Author SHA1 Message Date
NAKAMURA Takumi bc46f624cd ScheduleDAGInstrs.cpp: Don't peel the iterator when it points the end. This will fix the crash in r268143.
llvm-svn: 268257
2016-05-02 17:29:55 +00:00
Derek Schuff 31680dd832 [WebAssembly] Rename memory_size intrinsic to current_memory
This follows the recent renaming in the wasm spec.

llvm-svn: 268255
2016-05-02 17:25:22 +00:00
Hans Wennborg b7599329fc [SimplifyCFG] Extend TryToSimplifyUncondBranchFromEmptyBlock for empty block including lifetime intrinsics
Make it possible that TryToSimplifyUncondBranchFromEmptyBlock merges empty
basic block including lifetime intrinsics as well as phi nodes and
unconditional branch into its successor or predecessor(s).

If successor of empty block has single predecessor, all contents including
lifetime intrinsics are sinked into the successor. Otherwise, they are
hoisted into its predecessor(s) and then merged into the predecessor(s).

Patch by Josh Yoon <josh.yoon@samsung.com>!

Differential Revision: http://reviews.llvm.org/D19257

llvm-svn: 268254
2016-05-02 17:22:54 +00:00
Mehdi Amini 45c7b3ecb5 Move createReversePostOrderFunctionAttrsPass right after the inliner is done
This is where it was originally, until LoopVersioningLICM was
inserted before in r259986, I don't believe it was on purpose.

Differential Revision: http://reviews.llvm.org/D19809

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 268252
2016-05-02 16:53:16 +00:00
Adam Nemet d02872c7b4 [LLE] Fix typo from r263058
This was meant to check unit stride for both the load and the store.

Thanks to Roman Shirokiy for noticing this.

llvm-svn: 268251
2016-05-02 16:52:00 +00:00
Pete Cooper 228b1e9a1f Add llvm-pdbdump to the tool substitutions list in lit. NFC.
This adds llvm-pdbdump to the list of tools which get printed with
the full path in verbose mode.  This makes it easier to take the
whole run line from verbose output and run it again without prepending
with the builds bin directory.

llvm-svn: 268250
2016-05-02 16:51:26 +00:00
Simon Pilgrim 1ec7dc77fb Fixed signed/unsigned comparison warning.
llvm-svn: 268249
2016-05-02 16:45:02 +00:00
Chad Rosier 84567343bc Remove extra whitespace. NFC.
llvm-svn: 268248
2016-05-02 16:45:00 +00:00
Tom Stellard a27007eb4f AMDGPU/SI: Use hazard recognizer to detect DPP hazards
Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18603

llvm-svn: 268247
2016-05-02 16:23:09 +00:00
Sanjay Patel ec41cd2461 remove blank lines
llvm-svn: 268246
2016-05-02 15:49:09 +00:00
Sanjay Patel ebc0faa8d4 [InstCombine] regenerate checks
llvm-svn: 268245
2016-05-02 15:32:10 +00:00
Sanjay Patel 0d0181006a [InstCombine] regenerate checks
llvm-svn: 268244
2016-05-02 15:25:49 +00:00
Sanjay Patel 0b75fd81e1 [InstCombine] regenerate checks
llvm-svn: 268242
2016-05-02 15:21:41 +00:00
Sanjay Patel 933f9da43d [InstCombine] regenerate checks
llvm-svn: 268241
2016-05-02 15:18:13 +00:00
Sanjay Patel b193fe943f [InstCombine] regenerate checks
llvm-svn: 268239
2016-05-02 15:06:55 +00:00
Simon Pilgrim e5e04baf95 [X86][SSE] Dropped X86ISD::FGETSIGNx86 and use MOVMSK instead for FGETSIGN lowering
movmsk.ll tests are unchanged.

llvm-svn: 268237
2016-05-02 14:58:22 +00:00
Chad Rosier 9d1a556125 Cleanup comments. NFC.
llvm-svn: 268236
2016-05-02 14:56:21 +00:00
Chad Rosier 7b6001ee0f Cleanup comments. NFC.
llvm-svn: 268235
2016-05-02 14:50:30 +00:00
Aaron Ballman 5c190d056d Silence unused variable warnings; NFC.
llvm-svn: 268234
2016-05-02 14:48:03 +00:00
Chad Rosier a306eeb252 Cleanup comments. NFC.
llvm-svn: 268233
2016-05-02 14:32:17 +00:00
Sanjay Patel 1540b19407 [InstCombine] regenerate checks
llvm-svn: 268232
2016-05-02 14:21:55 +00:00
David L Kreitzer 0fe4632bd7 Enable the X86 call frame optimization for the 64-bit targets that allow it.
Fixes PR27241.

Differential Revision: http://reviews.llvm.org/D19688

llvm-svn: 268227
2016-05-02 13:45:25 +00:00
Rafael Espindola 694210cddc Expose a getFullName for thin archive members.
It will be used in lld.

llvm-svn: 268226
2016-05-02 13:45:06 +00:00
Jonas Paulsson 1eb3486a7a [SystemZ] Temporarily disable codegen test int-add-12.ll.
This checks for AGSI transformation, which is temporarily disabled.

llvm-svn: 268219
2016-05-02 10:42:47 +00:00
Jonas Paulsson f0344826b9 [SystemZ] Fix in restoreCalleeSavedRegisters()
Only add operands for GRs to the LMG.

Reviewed by Ulrich Weigand.

llvm-svn: 268216
2016-05-02 09:37:44 +00:00
Jonas Paulsson 9028acf0b3 [SystemZ] Mark CC defs as dead whenever possible.
Marking implicit CC defs as dead everywhere except when CC is actually
defined and used explicitly, is important since the post-ra scheduler
will otherwise insert edges between instructions unnecessarily.

Also temporarily disable LA(Y)-> AGSI optimization in
foldMemoryOperandImpl(), since this inroduces a def of the CC reg,
which is illegal unless it is known to be dead.

Reviewed by Ulrich Weigand.

llvm-svn: 268215
2016-05-02 09:37:40 +00:00
Craig Topper 7b5925a5b6 [X86] Fix a bug in LOCK arithmetic operation pattern matching where the wrong immediate predicate check was being used for 64-bit instructions with 8-bit immediates.
This didn't cause a bug because the order of the patterns ensured that the 64-bit instructions with 32-bit immediates were selected first.

llvm-svn: 268212
2016-05-02 05:44:21 +00:00
Eric Christopher 94a9ee65c6 Fix grammar and correct comment - the debug information wasn't incorrect, rather suboptimal.
llvm-svn: 268211
2016-05-02 05:30:26 +00:00
Davide Italiano 22b3ad8630 [llvm-readobj] Dump hash as part of -version-info.
llvm-svn: 268210
2016-05-02 02:30:18 +00:00
Craig Topper e3c1e225d7 [CodeGen] Add OPC_MoveChild0-OPC_MoveChild7 opcodes to isel matching tables to optimize table size. Shaves about 12K off the X86 matcher table.
llvm-svn: 268209
2016-05-02 01:53:30 +00:00
Davide Italiano 4f277763cf [GlobalDCE] Modernize. Use FileCheck instead of grep.
llvm-svn: 268207
2016-05-01 22:51:14 +00:00
Simon Pilgrim ca140b17cb [InstCombine][SSE] Added support to VPERMD/VPERMPS to shuffle combine to accept UNDEF elements.
llvm-svn: 268206
2016-05-01 20:43:02 +00:00
Simon Pilgrim c590492075 Dropped FIXME comment
llvm-svn: 268205
2016-05-01 20:33:25 +00:00
Simon Pilgrim eeacc40e27 [InstCombine][SSE] Added support to VPERMILVAR to shuffle combine to accept UNDEF elements.
llvm-svn: 268204
2016-05-01 20:22:42 +00:00
Simon Pilgrim cc7f567b6a [InstCombine][AVX] Fixed PERMILVAR identity tests and added additional decode tests
llvm-svn: 268203
2016-05-01 20:06:47 +00:00
Simon Pilgrim e5e8c2fde0 [InstCombine][SSE] Added support to PSHUFB to shuffle combine to accept UNDEF elements.
llvm-svn: 268202
2016-05-01 19:26:21 +00:00
Simon Pilgrim cae3e70707 [InstCombine][SSE] Regenerate MOVSX/MOVZX tests
llvm-svn: 268201
2016-05-01 18:28:45 +00:00
Craig Topper b6da65403a [AVX512] VPACKUSWB/VPACKSSWB should not be encoded with EVEX.W=1. While there fix the execution domain for VPACKSSDW/VPACKUSDW.
llvm-svn: 268200
2016-05-01 17:38:32 +00:00
Simon Pilgrim 8cddf8b3c6 [InstCombine][AVX2] Combine VPERMD/VPERMPS intrinsics with constant masks to shufflevector.
llvm-svn: 268199
2016-05-01 16:41:22 +00:00
Simon Pilgrim 33ae13d3c3 Fixed MSVC 'not all control paths return a value' warning
llvm-svn: 268198
2016-05-01 15:52:31 +00:00
Simon Pilgrim 0aa27cd29b Document the LLVM_ENABLE_EXPENSIVE_CHECKS cmake option introduced in r268050
llvm-svn: 268197
2016-05-01 15:27:47 +00:00
Igor Breger 110af565c7 getelementptr instruction, support index vector of EVT.
Differential Revision: http://reviews.llvm.org/D19775

llvm-svn: 268195
2016-05-01 13:29:12 +00:00
Igor Breger 131008fbcb Change AVX512 braodcastsd/ss patterns interaction with spilling . New implementation take a scalar register and generate a vector without COPY_TO_REGCLASS (turn it into a VR128 register ) .The issue is that during register allocation we may spill a scalar value using 128-bit loads and stores, wasting cache bandwidth.
Differential Revision: http://reviews.llvm.org/D19579

llvm-svn: 268190
2016-05-01 08:40:00 +00:00
Craig Topper e430de8be6 [AVX512] Prefer AVX512 VPACK instructions over AVX/AVX2 instructions when VLX and BWI are supported.
llvm-svn: 268189
2016-05-01 06:52:19 +00:00
Craig Topper 5acb5a1caf [AVX512] Add HasVLX to the 128/256-bit versions of VPACKSSDW/USDW/SSWB/USWB and VPMADDUBSW/VPMADDWD.
llvm-svn: 268188
2016-05-01 06:24:57 +00:00
Craig Topper db290664f6 [AVX512] Make sure 128/256-bit DQI versions of VAND/VANDN/VOR/VXOR are also marked as requiring VLX.
llvm-svn: 268186
2016-05-01 05:57:06 +00:00
Craig Topper f77ca947ce [X86] Add an AddedComplexity to another pattern to put it near similar in the output file.
llvm-svn: 268184
2016-05-01 05:22:15 +00:00
Craig Topper 742977ede8 [X86] Remove a seemlingly unused pattern. The same pattern appears elsewhere with an AddedComplexity that made this unreachable.
llvm-svn: 268183
2016-05-01 05:22:13 +00:00
Craig Topper eb9a87918b [X86] Add AddedComplexity to keep some similar patterns near each other in the output file.
llvm-svn: 268181
2016-05-01 04:59:49 +00:00
Craig Topper 7ed84d826e [X86] Remove some redundant selection patterns.
llvm-svn: 268180
2016-05-01 04:59:46 +00:00
Craig Topper c9b1923358 [AVX512] Replace vector_extract with extractelt in some patterns. They mean the same thing but vector_extract is deprecated. NFC
llvm-svn: 268179
2016-05-01 04:59:44 +00:00
Sanjoy Das f2f00fb11a [SCEV] When printing via -analysis, dump loop disposition
There are currently some bugs in tree around SCEV caching an incorrect
loop disposition.  Printing out loop dispositions will let us write
whitebox tests as those are fixed.

The dispositions are printed as a list in "inside out" order,
i.e. innermost loop first.

llvm-svn: 268177
2016-05-01 04:51:05 +00:00
Amaury Sechet 8a367d404f Properly name LLVMSetIsInBounds's argument. NFC
llvm-svn: 268176
2016-05-01 02:23:14 +00:00
Amaury Sechet 81243a73ef Capitalize align argument in the C API as per convention. NFC
llvm-svn: 268175
2016-05-01 01:42:34 +00:00
Craig Topper 99f6b620cc [AVX512] Add hasSideEffects/mayLoad/mayStore flags to some instructions.
llvm-svn: 268174
2016-05-01 01:03:56 +00:00
Lang Hames 2307f405cc [ORC] Save AArch64 NEON state in the JIT reentry block.
The earlier version of the resolver code did not save NEON state, so it would
have broken any callees that used floating point.

llvm-svn: 268173
2016-05-01 00:14:45 +00:00
Rui Ueyama 53aa9f2475 [lit] Add %:[STpst] to represent paths without colons on Windows.
Summary:
We need these variables to concatenate two absolute paths to construct
a valid path. Currently, %t\%t is, for example, expanded to C:\foo\C:\foo,
which is not a valid path because ":" is not a valid path character
on Windows. With this patch, %t will be expanded to C\foo.

Differential Revision: http://reviews.llvm.org/D19757

llvm-svn: 268168
2016-04-30 21:32:12 +00:00
Simon Pilgrim c179435055 [InstCombine][AVX2] Added VPERMD/VPERMPS shuffle combining placeholder tests.
For future support for VPERMD/VPERMPS to generic shuffles combines

llvm-svn: 268166
2016-04-30 20:41:52 +00:00
Saleem Abdulrasool e0f0c0e247 CodeGen: convert to range based loops
Convert to using some range based loops, avoid unnecessary variables for
unchecked casts.  NFC.

llvm-svn: 268165
2016-04-30 18:15:34 +00:00
Craig Topper e012ede137 [X86] Reduce memory usage of MemOp2RegOp and RegOp2MemOp folding maps.
llvm-svn: 268164
2016-04-30 17:59:49 +00:00
Rafael Espindola 92dd7b82be Add missing override.
llvm-svn: 268163
2016-04-30 15:18:21 +00:00
Marcin Koscielnicki 57290f934a [ASan] Add shadow offset for SystemZ.
SystemZ on Linux currently has 53-bit address space.  In theory, the hardware
could support a full 64-bit address space, but that's not supported due to
kernel limitations (it'd require 5-level page tables), and there are no plans
for that.  The default process layout stays within first 4TB of address space
(to avoid creating 4-level page tables), so any offset >= (1 << 42) is fine.
Let's use 1 << 52 here, ie. exactly half the address space.

I've originally used 7 << 50 (uses top 1/8th of the address space), but ASan
runtime assumes there's some space after the shadow area.  While this is
fixable, it's simpler to avoid the issue entirely.

Also, I've originally wanted to have the shadow aligned to 1/8th the address
space, so that we can use OR like X86 to assemble the offset.  I no longer
think it's a good idea, since using ADD enables us to load the constant just
once and use it with register + register indexed addressing.

Differential Revision: http://reviews.llvm.org/D19650

llvm-svn: 268161
2016-04-30 09:57:34 +00:00
Simon Pilgrim 8e38a5439b [InstCombine][AVX] Split off VPERMILVAR tests and added additional tests for UNDEF mask elements
llvm-svn: 268159
2016-04-30 07:32:19 +00:00
Simon Pilgrim 640f9964c7 [InstCombine][AVX] VPERMILVAR to shuffle combine to use general aggregate elements. NFCI.
Make use of Constant::getAggregateElement instead of checking constant types - first step towards adding support for UNDEF mask elements.

llvm-svn: 268158
2016-04-30 07:23:30 +00:00
Sriraman Tallam c198d3344e Differential Revision: http://reviews.llvm.org/D19753
Delete Target Option PositionIndependentExecutable as PIE is now part of module flags.

llvm-svn: 268155
2016-04-30 04:18:52 +00:00
Tom Stellard c51e4468b7 AMDGPU/SI: Remove wait state handling for SMRD in SIInsertWaits
This was supposed to be part of r268143.

llvm-svn: 268154
2016-04-30 04:04:48 +00:00
Hal Finkel 17e9754dd4 [PowerPC/QPX] Fix the load/splat peephole with overlapping reads
If, in between the splat and the load (which does an implicit splat), there is
a read of the splat register, then that register must have another earlier
definition. In that case, we can't replace the load's destination register with
the splat's destination register.

Unfortunately, I don't have a small or non-fragile test case.

llvm-svn: 268152
2016-04-30 01:59:28 +00:00
Amjad Aboud 72da9391f0 Reverting 268054 & 268063 as they caused PR27579.
llvm-svn: 268150
2016-04-30 01:44:07 +00:00
Sanjoy Das 47cf2affbd [LowerGuardIntrinsics] Keep track of !make.implicit metadata
If a guard call being lowered by LowerGuardIntrinsics has the
`!make.implicit` metadata attached, then reattach the metadata to the
branch in the resulting expanded form of the intrinsic.  This allows us
to implement null checks as guards and still get the benefit of implicit
null checks.

llvm-svn: 268148
2016-04-30 00:55:59 +00:00
Lawrence Hu 1befea2bdc Reroll loops with multiple IV and negative step part 3
support multiple induction variables

    This patch enable loop reroll for the following case:
        for(int i=0;  i<N; i += 2) {
           S += *a++;
           S += *a++;
        };

Differential Revision: http://reviews.llvm.org/D16550

llvm-svn: 268147
2016-04-30 00:51:22 +00:00
Lang Hames df29078dc8 [Orc] Fix the AArch64 resolver size.
llvm-svn: 268146
2016-04-30 00:50:26 +00:00
Vedant Kumar 62db78449f Fix a typo (NFC)
llvm-svn: 268144
2016-04-30 00:32:54 +00:00
Tom Stellard cb6ba62d6f AMDGPU/SI: Enable the post-ra scheduler
Summary:
This includes a hazard recognizer implementation to replace some of
the hazard handling we had during frame index elimination.

Reviewers: arsenm

Subscribers: qcolombet, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18602

llvm-svn: 268143
2016-04-30 00:23:06 +00:00
Sanjoy Das 52c68bb0f5 [LowerGuardIntrinsics] Preserve calling conv when lowering
llvm-svn: 268142
2016-04-30 00:17:47 +00:00
Sanjay Patel bc6fad0bdf add minimal test to show dropped metadata
llvm-svn: 268141
2016-04-30 00:12:54 +00:00
Sanjay Patel 6748ec49e9 remove the metadata added with r267827
We can demonstrate the 'select' bug and fix with a simpler test case.
The merged weight values are already tested in another test.

llvm-svn: 268139
2016-04-30 00:02:36 +00:00
Xinliang David Li 4b2fdccad9 Reapply r268107 after fixing a bug breaks debug build.
Makes the new method to set data needed by debug dump.

llvm-svn: 268130
2016-04-29 22:59:36 +00:00
Sanjoy Das 107aefc2fc Mark guards on true as "trivially dead"
This moves some logic added to EarlyCSE in rL268120 into
`llvm::isInstructionTriviallyDead`.  Adds a test case for DCE to
demonstrate that passes other than EarlyCSE can now pick up on the new
information.

llvm-svn: 268126
2016-04-29 22:23:16 +00:00
Chris Bieneman aa8dfe9fb3 [CMake] [Xcode] Improving Xcode toolchain generation to support distribution targets
This adds a new target `install-distribution-toolchain` which will install an Xcode toolchain featuring just the LLVM components specified in LLVM_DISTRIBUTION_COMPONENTS.

llvm-svn: 268125
2016-04-29 22:19:35 +00:00
Sanjay Patel 1d0ac7c5b8 clean up documentation comments; NFC
llvm-svn: 268122
2016-04-29 22:03:27 +00:00
Haicheng Wu 4afe0425db [MBP] Use Function::optForSize() instead of checking OptimizeForSize directly.
Fix a FIXME.  Disable loop alignment if compiled with -Oz now.

llvm-svn: 268121
2016-04-29 22:01:10 +00:00
Sanjoy Das ee81b23fe7 [EarlyCSE] Simplify guard intrinsics
Summary:
This change teaches EarlyCSE some basic properties of guard intrinsics:

 - Guard intrinsics read all memory, but don't write to any memory
 - After a guard has executed, the condition it was guarding on can be
   assumed to be true
 - Guard intrinsics on a constant `true` are no-ops

Reviewers: reames, hfinkel

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D19578

llvm-svn: 268120
2016-04-29 21:52:58 +00:00
Matt Arsenault 701c21ea10 AMDGPU: Fix crash with unreachable terminators.
If a block has no successors because it ends in unreachable,
this was accessing an invalid iterator.

Also stop counting instructions that don't emit any
real instructions.

llvm-svn: 268119
2016-04-29 21:52:13 +00:00
Xinliang David Li 0552521b03 Revert r268107 -- debug build failure
llvm-svn: 268116
2016-04-29 21:43:28 +00:00
Simon Pilgrim bf60cc492c [InstCombine][SSE] PSHUFB to shuffle combine to use general aggregate elements. NFCI.
Make use of Constant::getAggregateElement instead of checking constant types - first step towards adding support for UNDEF mask elements.

llvm-svn: 268115
2016-04-29 21:34:54 +00:00
Lang Hames f74e93b600 [Orc] Add ORC lazy-compilation support for AArch64.
The ORC compile callbacks and indirect stubs APIs will now work for AArc64,
allowing functions to be lazily compiled and/or updated.

llvm-svn: 268112
2016-04-29 21:32:00 +00:00
Lang Hames ae643ee2d1 [Orc] Make sure we don't drop the internal error in OrcRemoteTargetClient when
the constructor fails, as this would lead to an 'unchecked error' crash.

llvm-svn: 268111
2016-04-29 21:29:48 +00:00
Chris Bieneman e782c5ee94 [Docs] Refer to the CMakePrimer from CMake doc
The "Building LLVM with CMake" document should have a reference to the CMakePrimer.

llvm-svn: 268109
2016-04-29 21:23:24 +00:00
David Majnemer 826e9831a7 [ValueTracking] Make the code in lookThroughCast
No functionality change is intended.

llvm-svn: 268108
2016-04-29 21:22:04 +00:00
Xinliang David Li 1ffa28a3f1 [inliner]: Refactor inline deferring logic into its own method /NFC
The implemented heuristic has a large body of code which better sits
in its own function for better readability. It also allows adding more
heuristics easier in the future.

llvm-svn: 268107
2016-04-29 21:21:44 +00:00
Sriraman Tallam 7da9b445ea Differential Revision: http://reviews.llvm.org/D19733
llvm-svn: 268106
2016-04-29 21:19:16 +00:00
Matt Arsenault dc4ebad6d4 AMDGPU: Add kernarg.segment.ptr intrinsic
llvm-svn: 268105
2016-04-29 21:16:52 +00:00
Chad Rosier cd62bf5821 [InstCombine] Determine the result of a select based on a dominating condition.
Differential Revision: http://reviews.llvm.org/D19550

llvm-svn: 268104
2016-04-29 21:12:31 +00:00
Matt Arsenault 2c15956749 Fix comment
llvm-svn: 268102
2016-04-29 21:02:04 +00:00
Sanjay Patel 9190b4add8 [InstCombine] clean up; NFC
llvm-svn: 268099
2016-04-29 20:54:56 +00:00
Chris Bieneman 9debb98721 [Docs] Add CMake Primer document
This document is intended to provide a basic overview of the CMake scripting language for LLVM developers. It was unorthodoxly reviewed for accuracy and content on the CMake developer list:

http://public.kitware.com/pipermail/cmake-developers/2016-April/028300.html

llvm-svn: 268096
2016-04-29 20:34:54 +00:00
Matt Arsenault cf2744f1c8 AMDGPU/SI: Move post regalloc run of SIShrinkInstructions
Move to addPreEmitPass. This is so it runs after post-RA
scheduling so we can merge s_nops emitted by the scheduler
and hazard recognizer.

llvm-svn: 268095
2016-04-29 20:23:42 +00:00
Matt Arsenault ab2232cf73 DAGCombiner: Reduce truncated shl width
llvm-svn: 268094
2016-04-29 19:53:16 +00:00
Kostya Serebryany dced5d3fcb [libFuzzer] fix docs
llvm-svn: 268092
2016-04-29 19:28:24 +00:00
Easwaran Raman dc7071226b Move coverage related code into a separate library.
Differential Revision: http://reviews.llvm.org/D19333

llvm-svn: 268089
2016-04-29 18:53:05 +00:00
Kostya Serebryany 2fe9304d62 [libFuzzer] enable detect_leaks=1, add proper docs
llvm-svn: 268088
2016-04-29 18:49:55 +00:00
George Burgess IV 1b1fef30d0 [MemorySSA] Fix bugs in walker; refactor unittests a bit.
This patch fixes two somewhat related bugs in MemorySSA's caching
walker. These bugs were found because D19695 brought up the problem
that we'd have defs cached to themselves, which is incorrect.

The bugs this fixes are:

- We would sometimes skip the nearest clobber of a MemoryAccess, because
  we would query our cache for a given potential clobber before
  checking if the potential clobber is the clobber we're looking for.
  The cache entry for the potential clobber would point to the nearest
  clobber *of the potential clobber*, so if that was a cache hit, we'd
  ignore the potential clobber entirely.

- There are times (sometimes in DFS, sometimes in the getClobbering...
  functions) where we would insert cache entries that say a def
  clobbers itself.

There's a bit of common code between the fixes for the bugs, so they
aren't split out into multiple commits.

This patch also adds a few unit tests, and refactors existing tests a
bit to reduce the duplication of setup code.

llvm-svn: 268087
2016-04-29 18:42:55 +00:00
David Majnemer d2a074b1f4 [ValueTracking] matchSelectPattern needs to be more careful around FP
matchSelectPattern attempts to see through casts which mask min/max
patterns from being more obvious.  Under certain circumstances, it would
misidentify a sequence of instructions as a min/max because it assumed
that folding casts would preserve the result.  This is not the case for
floating point <-> integer casts.

This fixes PR27575.

llvm-svn: 268086
2016-04-29 18:40:34 +00:00
Zachary Turner 9213ba5304 Fix crash in PDB when loading corrupt file.
There are probably hundreds of crashers we can find by fuzzing
more.  For now we do the simplest possible validation of the
block size.  Later, more complicated validations can verify that
other fields of the super block such as directory size, number
of blocks, agree with the size of the file etc.

llvm-svn: 268084
2016-04-29 18:09:19 +00:00
Simon Pilgrim 464f1f3bea Use SelectionDAG::getTargetConstant* helper functions. NFC.
Instead of SelectionDAG::getConstant directly to make it more obvious that we're creating target constants.

llvm-svn: 268074
2016-04-29 17:42:45 +00:00
Artem Tamazov 5d3ae19bdf [AMDGPU][llvm-mc] Add some missing testcases to trap.s
Differential Revision: http://reviews.llvm.org/D19602

llvm-svn: 268073
2016-04-29 17:41:44 +00:00
Zachary Turner 2f09b5091c Put PDB parsing code into a pdb namespace.
llvm-svn: 268072
2016-04-29 17:28:47 +00:00
Zachary Turner 6ba65deeb9 Refactor the PDB Stream reading interface.
The motivation for this change is that PDB has the notion of
streams and substreams.  Substreams often consist of variable
length structures that are convenient to be able to treat as
guaranteed, contiguous byte arrays, whereas the streams they
are contained in are not necessarily so, as a single stream
could be spread across many discontiguous blocks.

So, when processing data from a substream, we want to be able
to assume that we have a contiguous byte array so that we can
cast pointers to variable length arrays and such.

This leads to the question of how to be able to read the same
data structure from either a stream or a substream using the
same interface, which is where this patch comes in.

We separate out the stream's read state from the underlying
representation, and introduce a `StreamReader` class.  Then
we change the name of `PDBStream` to `MappedBlockStream`, and
introduce a second kind of stream called a `ByteStream` which is
simply a sequence of contiguous bytes.  Finally, we update all
of the std::vectors in `PDBDbiStream` to use `ByteStream` instead
as a proof of concept.

llvm-svn: 268071
2016-04-29 17:22:58 +00:00
Dehao Chen 21aefaec97 Do not read callee name when matching IR to profile as it is not used.
Summary: Callee name is not used to identify a callsite now, so do not read it during annotation.

Reviewers: davidxl, dnovillo

Subscribers: dnovillo, danielcdh, llvm-commits

Differential Revision: http://reviews.llvm.org/D19704

llvm-svn: 268069
2016-04-29 17:19:10 +00:00
Geoff Berry b92cd5293e [BasicAA] Treat llvm.assume as not accessing memory in getModRefBehavior(Function)
Reviewers: dberlin, chandlerc, hfinkel, reames, sanjoy

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D19730

llvm-svn: 268068
2016-04-29 17:18:28 +00:00
Haicheng Wu e749ce53d4 [MBP] Split placement and alignment into two functions. NFC.
Cut and Paste.

llvm-svn: 268067
2016-04-29 17:06:44 +00:00
Artem Tamazov 38e496b175 Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD."
Previously reverted by r267752.

r267733 review:
Differential Revision: http://reviews.llvm.org/D19342

llvm-svn: 268066
2016-04-29 17:04:50 +00:00
Guozhi Wei fa3e04298b [PPC] Enable shuffling of VSX vectors
This patch fixes PR27078 by enabling shuffling of vectors if VSX is available.

llvm-svn: 268064
2016-04-29 17:00:54 +00:00
Amjad Aboud ee04164599 Fixed LIT tests that was broken after change in r268054.
llvm-svn: 268063
2016-04-29 16:54:18 +00:00
Filipe Cabecinhas 7894938a45 Add operator- to Path's reverse_iterator. Needed for D19666
Reviewers: rafael, craig.topper, bogner

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D19724

llvm-svn: 268062
2016-04-29 16:48:07 +00:00
Sanjay Patel 362dcf9615 auto-generate checks
llvm-svn: 268061
2016-04-29 16:39:37 +00:00
Sanjay Patel d5b0e54b49 [InstCombine] add helper function for ICmp with constant canonicalization; NFCI
As suggested in http://reviews.llvm.org/D17859 , we should enhance this
to support vectors.

llvm-svn: 268059
2016-04-29 16:22:25 +00:00
Daniel Sanders 7225cd52e7 [mips][ias] Move createCpRestoreMemOp to MipsTargetStreamer. NFC.
Summary:
This removes the temporary call to isIntegratedAssemblerRequired() which was
added recently. It's effect is now acheived directly in the MipsTargetStreamer
hierarchy.

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D19715

llvm-svn: 268058
2016-04-29 16:16:49 +00:00
Krzysztof Parzyszek 173fc57b54 Fix NDEBUG build: variables used only in debug code causing compile error
llvm-svn: 268057
2016-04-29 16:14:00 +00:00
Amjad Aboud 293ee8bba1 Recommitted r264280 "Supporting all entities declared in lexical scope in LLVM debug info."
After fixing PR26942 in r267004.

llvm-svn: 268054
2016-04-29 16:07:55 +00:00
Simon Dardis d8bceb9d3a [mips][FastISel] A store is not a load.
Correct trivial error. One of the failing tests from PR/27458.

Reviewers: dsanders, vkalintiris, mcrosier

Differential Review: http://reviews.llvm.org/D19726

llvm-svn: 268053
2016-04-29 16:07:47 +00:00
Simon Dardis 7383bfd8bd [PATCH] [mips] Fix forbidden slot hazard handling
MipsHazardSchedule has to determine what the next physical machine instruction
is to decide whether to insert a nop. In case where a branch with a forbidden
slot appears at the end of a basic block, first *real* instruction of the next
physical basic block was determined using getFirstNonDebugInstr().

Unfortunately this only considers DBG_VALUEs and not other transient opcodes
such as EHLABEL. As EHLABEL passes the SafeInForbiddenSlot predicate and the
instruction after the EHLABEL can be a CTI, we observed test failures in the
LNT testsuite.

Reviewers: dsanders

Differential Review: http://reviews.llvm.org/D19051

llvm-svn: 268052
2016-04-29 16:04:18 +00:00
Krzysztof Parzyszek f5cbac93eb [Hexagon] Optimize addressing modes for load/store
Patch by Jyotsna Verma.

llvm-svn: 268051
2016-04-29 15:49:13 +00:00
Filipe Cabecinhas 0da9937517 Unify XDEBUG and EXPENSIVE_CHECKS (into the latter), and add an option to the cmake build to enable them.
Summary:
Historically, we had a switch in the Makefiles for turning on "expensive
checks". This has never been ported to the cmake build, but the
(dead-ish) code is still around.

This will also make it easier to turn it on in buildbots.

Reviewers: chandlerc

Subscribers: jyknight, mzolotukhin, RKSimon, gberry, llvm-commits

Differential Revision: http://reviews.llvm.org/D19723

llvm-svn: 268050
2016-04-29 15:22:48 +00:00
Tobias Grosser fee94ff8a9 Remove leftover
llvm-svn: 268049
2016-04-29 15:08:05 +00:00
Tobias Grosser d7773f7209 cmake: Set LINK_POLLY_INTO_TOOLS to ON (v2)
This is the second try. This time we disable this feature if no Polly checkout
is available. For this to work we need to check if tools/polly is present
early enough that our decision is known before cmake generates Config/config.h.

With Polly checked into LLVM it was since a long time possible to compile
clang/opt/bugpoint with Polly support directly linked in, instead of only
providing Polly as a separate loadable module. This commit switches the
default from providing Polly as a module to linking Polly into tools, such
that it becomes unnecessary to load the Polly module when playing with Polly.
Such configuration has shown a lot more convenient for day-to-day Polly use.

This change does not impact the default behavior of any tool, if Polly is not
explicitly enabled when calling clang/opt/bugpoint Polly does not affect
compilation.

This change also does not impact normal LLVM/clang checkouts that do not
contain Polly.

Reviewers: jdoerfert, Meinersbur

Subscribers: pollydev, llvm-commits

Differential Revision: http://reviews.llvm.org/D19711

llvm-svn: 268048
2016-04-29 15:07:22 +00:00
Sanjay Patel 0a36e301af fix typo; NFC
llvm-svn: 268045
2016-04-29 14:53:54 +00:00
Piotr Padlewski ec5739fc4a Add credit [Test commit]
llvm-svn: 268044
2016-04-29 14:52:12 +00:00
Tom Stellard 92b24f324b AMDGPU/SI: Add offset field to ds_permute/ds_bpermute instructions
Summary:
These instructions can add an immediate offset to the address, like other
ds instructions.

Reviewers: arsenm

Subscribers: arsenm, scchan

Differential Revision: http://reviews.llvm.org/D19233

llvm-svn: 268043
2016-04-29 14:34:26 +00:00
Daniel Sanders fba875f902 [mips][ias] Split expandMemInst between MipsAsmParser and MipsTargetStreamer. Almost NFC.
Summary:
The portion in MipsAsmParser is responsible for figuring out which expansion to
use, while the portion in MipsTargetStreamer is responsible for emitting it.

This allows us to remove the call to isIntegratedAssemblerRequired() which is
currently ensuring the effect of .cprestore only occurs when writing objects.

The small functional change is that the memory offsets are now correctly
printed as signed values.

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D19714

llvm-svn: 268042
2016-04-29 13:43:45 +00:00
Daniel Sanders a736b37a25 [mips][ias] Moved most instruction emission helpers to MipsTargetStreamer. NFC.
Summary:
* Moved all the emit*() helpers to MipsTargetStreamer.
* Moved createNop() to MipsTargetStreamer as emitNop() and emitEmptyDelaySlot().
  This instruction has been split to distinguish between the 'nop' instruction
  and the nop used in delay slots which is sometimes a different nop to the
  'nop' instruction (e.g. for short delay slots on microMIPS).
* Moved createAddu() to MipsTargetStreamer as emitAddu().
* Moved createAppropriateDSLL() to MipsTargetStreamer as emitDSLL().

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D19712

llvm-svn: 268041
2016-04-29 13:33:12 +00:00
Tobias Grosser e3421b5fa6 cmake: Fix grammar
llvm-svn: 268038
2016-04-29 13:03:40 +00:00
Daniel Sanders 9db710a171 [mips][ias] Make section sizes a multiple of the alignment.
Reviewers: sdardis

Subscribers: dsanders, llvm-commits, sdardis

Differential Revision: http://reviews.llvm.org/D19008

llvm-svn: 268036
2016-04-29 12:44:07 +00:00
Tobias Grosser da29984871 Revert "cmake: Set LINK_POLLY_INTO_TOOLS to ON"
This reverts commit r268033 as it breaks some buildbots.

llvm-svn: 268035
2016-04-29 12:38:24 +00:00
Tobias Grosser 2fd7dbe28d cmake: Set LINK_POLLY_INTO_TOOLS to ON
With Polly checked into LLVM it was since a long time possible to compile
clang/opt/bugpoint with Polly support directly linked in, instead of only
providing Polly as a separate loadable module. This commit switches the
default from providing Polly as a module to linking Polly into tools, such
that it becomes unnecessary to load the Polly module when playing with Polly.
Such configuration has shown a lot more convenient for day-to-day Polly use.

This change does not impact the default behavior of any tool, if Polly is not
explicitly enabled when calling clang/opt/bugpoint Polly does not affect
compilation.

This change also does not impact normal LLVM/clang checkouts that do not
contain Polly.

Reviewers: jdoerfert, Meinersbur, sebpop, etherzhhb, zinob, hiraditya

Subscribers: pollydev, llvm-commits

Differential Revision: http://reviews.llvm.org/D19711

llvm-svn: 268033
2016-04-29 12:23:11 +00:00
Simon Pilgrim 07a691c706 [InstCombine][SSE] Added x86 pshufb undef mask tests
FIXME: We currently don't support folding constant pshufb shuffle masks containing undef elements.
llvm-svn: 268016
2016-04-29 09:13:53 +00:00
Nikolay Haustov 4f672a34ed AMDGPU/SI: Assembler: Unify parsing/printing of operands.
Summary:
The goal is for each operand type to have its own parse function and
at the same time share common code for tracking state as different
instruction types share operand types (e.g. glc/glc_flat, etc).

Introduce parseAMDGPUOperand which can parse any optional operand.
DPP and Clamp/OMod have custom handling for now. Sam also suggested
to have class hierarchy for operand types instead of table. This
can be done in separate change.

Remove parseVOP3OptionalOps, parseDS*OptionalOps, parseFlatOptionalOps,
parseMubufOptionalOps, parseDPPOptionalOps.
Reduce number of definitions of AsmOperand's and MatchClasses' by using common base class.
Rename AsmMatcher/InstPrinter methods accordingly.
Print immediate type when printing parsed immediate operand.
Use 'off' if offset/index register is unused instead of skipping it to make it more readable (also agreed with SP3).
Update tests.

Reviewers: tstellarAMD, SamWot, artem.tamazov

Subscribers: qcolombet, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19584

llvm-svn: 268015
2016-04-29 09:02:30 +00:00
Simon Pilgrim 5779fb61b0 [InstCombine][SSE] Regenerated x86 pshufb tests
llvm-svn: 268014
2016-04-29 08:53:35 +00:00
Zlatko Buljan 531809d340 [mips][microMIPS] Fix offsets for LLE, LWE, SBE, SCE and SHE instructions
Differential Revision: http://reviews.llvm.org/D18645

llvm-svn: 268012
2016-04-29 08:36:54 +00:00
David Majnemer fadc6db036 [GlobalOpt] Propagate operand bundles
We neglected to transfer operand bundles for some transforms.  These
were found via inspection, I'll try to come up with some test cases.

llvm-svn: 268011
2016-04-29 08:07:22 +00:00
David Majnemer 231a68cc22 [InstCombine] Propagate operand bundles
We neglected to transfer operand bundles for some transforms.  These
were found via inspection, I'll try to come up with some test cases.

llvm-svn: 268010
2016-04-29 08:07:20 +00:00
David Majnemer 1a5799fe3e [DeadArgumentElimination] Propagate operand bundles to promoted call sites
We neglected to transfer operand bundles when performing argument
promotion.

llvm-svn: 268008
2016-04-29 07:22:36 +00:00
Adam Nemet c60d8f8fd0 [LoopDist] Add missing RUN line in test from r268006
llvm-svn: 268007
2016-04-29 07:16:00 +00:00
Adam Nemet 88ec491830 [LoopDist] Also emit optimization remark on success (-Rpass=)
The option -Rpass=loop-distribute now reports the loops that were
distributed.

llvm-svn: 268006
2016-04-29 07:10:46 +00:00
Adam Nemet 4338d6769e [LoopDist] Pass 'Function' to main class. NFC
Next patch will add another use for 'Function' inside the class.

llvm-svn: 268005
2016-04-29 07:10:39 +00:00
David Majnemer 13d5526392 [SLPVectorizer] Add operand bundles to vectorized functions
SLPVectorizing a call site should result in further propagation of its
bundles.

llvm-svn: 268004
2016-04-29 07:09:51 +00:00
David Majnemer 50ddc0e1b6 [LoopVectorize] Add operand bundles to vectorized functions
Also, do not crash when calculating a cost model for loop-invariant
token values.

llvm-svn: 268003
2016-04-29 07:09:48 +00:00
Matt Arsenault 7d1b6c81af AMDGPU: Stop reporting an addressing mode for unknown addrspace
This was being treated the same as private, which has an immediate
offset. For unknown, it probably means it's for a computation not
actually being used for accessing memory, so it should not have a
nontrivial addressing mode.

llvm-svn: 268002
2016-04-29 06:25:10 +00:00
Matt Arsenault 790eb1c490 DivergenceAnalysis: Fix crash with unreachable blocks
Unreachable blocks may not be in the dominator tree,
so don't crash on them.

llvm-svn: 268001
2016-04-29 06:17:47 +00:00
David Majnemer cd24bb1d3a [ArgumentPromotion] Propagate operand bundles to promoted call sites
We neglected to transfer operand bundles when performing argument
promotion.

This fixes PR27568.

llvm-svn: 267986
2016-04-29 04:56:12 +00:00
Craig Topper b805723294 [X86] Remove unnecessary header file containing a small class. It was only included in one place. Just define the class directly in the cpp file. NFC
llvm-svn: 267985
2016-04-29 04:22:28 +00:00
Craig Topper e7c1cd18d3 [X86] Include X86MCTargetDesc.h directly in X86Disassembler.cpp instead of duplicating parts of it. NFC
llvm-svn: 267984
2016-04-29 04:22:26 +00:00
Michael Zolotukhin 1816d03b7d [PR25281] Remove AAResultsWrapper from preserved analyses of loop vectorizer.
We don't preserve AAResults, because, for one, we don't preserve SCEV-AA.
That fixes PR25281.

llvm-svn: 267980
2016-04-29 03:31:25 +00:00
Sanjoy Das 8400aedc5e Remove stale documentation on -no-aa
The pass itself was removed in rL247167.

llvm-svn: 267978
2016-04-29 03:01:49 +00:00
Matthias Braun f3619b8212 RegisterPressure: Fix default lanemask for missing regunit intervals
In case of missing live intervals for a physical registers
getLanesWithProperty() would report 0 which was not a safe default in
all situations. Add a parameter to pass in a safe default.
No testcase because in-tree targets do not skip computing register unit
live intervals.

Also cleanup the getXXX() functions to not perform the
RequireLiveIntervals checks anymore so we do not even need to return
safe defaults.

llvm-svn: 267977
2016-04-29 02:44:54 +00:00
Matthias Braun 5e4ac856d6 RegisterPressure: Cannot produce dead (subregister) defs anymore
With the DetectDeadLanes pass in place we cannot run into situations
anymore where defs suddenly become dead.
Also add a missing check so we do not try to add an undef flag to a
physreg (found by visual inspection, no failing test).

llvm-svn: 267976
2016-04-29 02:44:48 +00:00
Ivan Krasin 8dafa2da8e Fix build by casting to the proper int type.
Reviewers: eugenis

Differential Revision: http://reviews.llvm.org/D19706

llvm-svn: 267974
2016-04-29 02:09:57 +00:00
Vedant Kumar 78b8bc29db [llvm-cov] Don't emit 'nan%' in reports
llvm-svn: 267971
2016-04-29 01:31:49 +00:00
Hal Finkel 1b66f7e3c8 [LoopVectorize] Keep hints from original loop on the vector loop
We need to keep loop hints from the original loop on the new vector loop.
Failure to do this meant that, for example:

  void foo(int *b) {
  #pragma clang loop unroll(disable)
    for (int i = 0; i < 16; ++i)
      b[i] = 1;
  }

this loop would be unrolled. Why? Because we'd vectorize it, thus dropping the
hints that unrolling should be disabled, and then we'd unroll it.

llvm-svn: 267970
2016-04-29 01:27:40 +00:00
Evgeniy Stepanov 35f3e5e4e7 [msan] Handle vector compare x86 intrinsics.
This handles SSE and SSE2 cmp_* and comiXX_* intrinsics.

llvm-svn: 267966
2016-04-29 01:19:52 +00:00
David Majnemer ca9ac4721d [llvm-pdbdump] Try to appease the ASan bot
We didn't check that the file was large enough to hold a super block.

llvm-svn: 267965
2016-04-29 01:00:17 +00:00
Craig Topper 184310d6a9 [X86] Use nested switches to vary the operand to helper functions that were previously called in multiple cases. This seems to help the inliner reduce code. NFC
llvm-svn: 267964
2016-04-29 00:51:30 +00:00
David Majnemer 1573b242ae [llvm-pdbdump] Restore error messages, handle bad block sizes
We lost the ability to report errors, bring it back.  Also, correctly
validate the block size.

llvm-svn: 267955
2016-04-28 23:47:27 +00:00
Matthias Braun f84547c6e0 LiveIntervalAnalysis: Remove LiveVariables requirement
This requirement was a huge hack to keep LiveVariables alive because it
was optionally used by TwoAddressInstructionPass and PHIElimination.
However we have AnalysisUsage::addUsedIfAvailable() which we can use in
those passes.

This re-applies r260806 with LiveVariables manually added to PowerPC to
hopefully not break the stage 2 bots this time.

llvm-svn: 267954
2016-04-28 23:42:51 +00:00
David Majnemer 5baa2bc2e1 [llvm-pdbdump] Correctly read data larger than a block
A bug was introduced when the code was refactored which resulted in a
bad memory access.

This fixes PR27565.

llvm-svn: 267953
2016-04-28 23:24:23 +00:00
Adam Nemet 0ba164bbcb [LoopDist] Emit optimization remarks (-Rpass*)
I closely followed the precedents set by the vectorizer:

* With -Rpass-missed, the loop is reported with further details pointing
to -Rpass--analysis.

* -Rpass-analysis reports the details why distribution has failed.

* Regardless of -Rpass*, when distribution fails for a loop where
distribution was forced with the pragma, a warning is produced according
to -Wpass-failed.  In this case the analysis info is also printed even
without -Rpass-analysis.

llvm-svn: 267952
2016-04-28 23:08:32 +00:00
Adam Nemet adeccf7658 [LoopDist] Improve debug messages
The next patch will start using these for -Rpass-analysis so they won't
be internal-only anymore.

Move the 'Skipping; ' prefix that some of the message are using into the
'fail' function.  We don't want to include this prefix in
the -Rpass-analysis report.

llvm-svn: 267951
2016-04-28 23:08:30 +00:00
Adam Nemet 7f38e1199a [LoopDist] Add helper to print debug message when distribution fails. NFC
This will form the basis to emit optimization remarks (-Rpass*).

llvm-svn: 267950
2016-04-28 23:08:27 +00:00
Hal Finkel 50316d95a9 [Inliner] Preserve llvm.mem.parallel_loop_access metadata
When inlining a call site with llvm.mem.parallel_loop_access metadata, this
metadata needs to be propagated to all cloned memory-accessing instructions.
Otherwise, inlining parts of the loop body will invalidate the annotation.

With this functionality, we now vectorize the following as expected:

  void Body(int *res, int *c, int *d, int *p, int i) {
    res[i] = (p[i] == 0) ? res[i] : res[i] + d[i];
  }

  void Test(int *res, int *c, int *d, int *p, int n) {
    int i;

  #pragma clang loop vectorize(assume_safety)
    for (i = 0; i < 1600; i++) {
      Body(res, c, d, p, i);
    }
  }

llvm-svn: 267949
2016-04-28 23:00:04 +00:00
Dehao Chen 1b54fce319 Read discriminators correctly from object file.
Summary:
This is the follow-up patch for http://reviews.llvm.org/D19436
* Update the discriminator reading algorithm to match the assignment algorithm.
* Add test to cover the new algorithm.

Reviewers: dnovillo, echristo, dblaikie

Subscribers: danielcdh, dblaikie, echristo, llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D19522

llvm-svn: 267945
2016-04-28 22:09:37 +00:00
Marcin Koscielnicki 3a592df3e4 [CodeGen] Remove extra ';'
Squashes a -Wpedantic warning.

llvm-svn: 267944
2016-04-28 21:49:46 +00:00
Marcin Koscielnicki 7b32957852 [PowerPC] Fix the EH_SjLj_Setup pseudo.
This instruction is just a control flow marker - it should not
actually exist in the object file.  Unfortunately, nothing catches
it before it gets to AsmPrinter.  If integrated assembler is used,
it's considered to be a normal 4-byte instruction, and emitted as
an all-0 word, crashing the program.  With external assembler,
a comment is emitted.

Fixed by setting Size to 0 and handling it in MCCodeEmitter - this
means the comment will still be emitted if integrated assembler
is not used.

This broke an ASan test, which has been disabled for a long time
as a result (see the discussion on D19657).  We can reenable it
once this lands.

llvm-svn: 267943
2016-04-28 21:24:37 +00:00
Kevin Enderby 1be37a3522 Fix a bug in llvm-objdump for -private-headers printing the LC_CODE_SIGNATURE Mach-O load command.
rdar://25985653

llvm-svn: 267940
2016-04-28 21:07:20 +00:00
Krzysztof Parzyszek bf90d5a3b3 [RDF] Recognize tail calls in graph creation
llvm-svn: 267939
2016-04-28 20:40:08 +00:00
Amaury Sechet 5575d079a5 Fix warning in PDB code. NFC
llvm-svn: 267938
2016-04-28 20:39:39 +00:00
Matthias Braun e9631f166e LiveIntervalAnalysis: No need to deal with dead subregister defs anymore.
The DetectDeadLaneMask already ensures that we have no dead subregister
definitions making the special handling in LiveIntervalAnalysis
unnecessary. This reverts most of r248335.

llvm-svn: 267937
2016-04-28 20:35:26 +00:00
Krzysztof Parzyszek c5a4e26410 [RDF] Improve handling of inline-asm
- Keep implicit defs from inline-asm instructions.
- Treat register references from inline-asm as fixed.

llvm-svn: 267936
2016-04-28 20:33:33 +00:00
Zachary Turner 897067e3f1 Add parentheses to silence -Wparentheses warnings.
llvm-svn: 267934
2016-04-28 20:26:30 +00:00
Krzysztof Parzyszek 55874cf02b [RDF] Add option to keep dead phi nodes in DFG
Dead phi nodes are needed for code motion (such as copy propagation),
where a new use would be placed in a location that would be dominated
by a dead phi. Such a transformation is not legal for copy propagation,
and the existence of the phi would prevent it, but if the phi is not
there, it may appear to be valid.

llvm-svn: 267932
2016-04-28 20:17:06 +00:00
Chris Bieneman 6108658da4 [CMake] [Darwin] Use libtool instead of ar && ranlib
Summary: Using libtool instead of ar and ranlib on Darwin shaves a minute off my clang build. This is because on Darwin libtool is optimized to give hints to the kernel about filesystem interactions that allow it to be faster.

Reviewers: bogner, pete

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D19611

llvm-svn: 267930
2016-04-28 20:14:19 +00:00
Kevin Enderby 4b627beea8 Update llvm-objdump for disassembly of ARM Mach-O files to always include the opcode bytes.
As this is the expected behavior of the old darwin otool(1) for ARM Mach-O files.

rdar://25896249

llvm-svn: 267929
2016-04-28 20:14:13 +00:00
Zachary Turner 84c3a8ba3d Read the rest of the DBI substreams, and parse source info.
We now read out the rest of the substreams from the DBI streams.  One of
these substreams, the FileInfo substream, contains information about which
source files contribute to each module (aka compiland).  This patch
additionally parses out the file information from that substream, and
dumps it in llvm-pdbdump.

Differential Revision: http://reviews.llvm.org/D19634
Reviewed by: ruiu

llvm-svn: 267928
2016-04-28 20:05:18 +00:00
Kit Barton 7a1a9e01ad This reverts commit r265505.
Revert "[Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random number, set bool, and dfp test significance".
This patch has caused a functional regression in SPEC2k6 namd, and a performance regression in mesa-pipe.

llvm-svn: 267927
2016-04-28 20:00:42 +00:00
Krzysztof Parzyszek e5fcce2d2b [Hexagon] Add instruction aliases for vector unsigned compare-equal
Unsigned compare-equal instructions are mapped to signed compare-equal.

llvm-svn: 267925
2016-04-28 19:49:18 +00:00
Matt Arsenault 1c4d0efe56 AMDGPU: Emit error if too much LDS is used
llvm-svn: 267922
2016-04-28 19:37:35 +00:00
Yaron Keren 3189622ae5 Remove doInitialization() and doFinalization() member declarations without definitions.
Visual C++ 2015 flags this in the IDE.

llvm-svn: 267919
2016-04-28 19:21:30 +00:00
Krzysztof Parzyszek 7ea9a529aa Reset the TopRPTracker's position in ScheduleDAGMILive::initQueues
ScheduleDAGMI::initQueues changes the RegionBegin to the first non-debug
instruction. Since it does not track register pressure, it does not affect
any RP trackers. ScheduleDAGMILive inherits initQueues from ScheduleDAGMI,
and it does reset the TopTPTracker in its schedule method. Any derived,
target-specific scheduler will need to do it as well, but the TopRPTracker
is only exposed as a "const" object to derived classes. Without the ability
to modify the tracker directly, this leaves a derived scheduler with a
potential of having the TopRPTracker out-of-sync with the CurrentTop.

The symptom of the problem:
  void llvm::ScheduleDAGMILive::scheduleMI(llvm::SUnit *, bool):
  Assertion `TopRPTracker.getPos() == CurrentTop && "out of sync"' failed.

Differential Revision: http://reviews.llvm.org/D19438

llvm-svn: 267918
2016-04-28 19:17:44 +00:00
Matt Arsenault c5fce69031 AMDGPU: Fix mishandling array allocations when promoting alloca
The canonical form for allocas is a single allocation of the array type.
In case we see a non-canonical array alloca, make sure we aren't
replacing this with an array N times smaller.

llvm-svn: 267916
2016-04-28 18:38:48 +00:00
Eugene Zelenko f918b00490 Fix builds broken in r267910.
llvm-svn: 267915
2016-04-28 18:27:35 +00:00
Sriraman Tallam 46d47b8ce2 Add "PIE Level" metadata to module flags.
http://reviews.llvm.org/D19671

llvm-svn: 267911
2016-04-28 18:15:44 +00:00
Eugene Zelenko 5354a8aa4d Fix some Clang-tidy modernize and Include What You Use warnings.
Differential revision: http://reviews.llvm.org/D19673

llvm-svn: 267910
2016-04-28 18:04:41 +00:00
Rong Xu 62d5e473ce [PGO] Fix incorrect Twine usage in emitting optimization remarks.
Should not store Twine objects to local variables. This is fixed the test
failures with r267815 in VS2015 X64 build.

llvm-svn: 267908
2016-04-28 17:49:56 +00:00
Rong Xu 08afb05491 Minor format change and fixing typos in the comments. NFC.
llvm-svn: 267905
2016-04-28 17:31:22 +00:00
Krzysztof Parzyszek 0e7d2d339d [Hexagon] Define certain aliases for vector instructions
Specifically:
  Vd = #0   -> Vd = vxor(Vd, Vd)
  Vdd = #0  -> Vdd.w = vsub(Vdd.w, Vdd.w)
  Vdd = Vss -> Vdd = vcombine(Vss.H, Vss.L)

llvm-svn: 267901
2016-04-28 16:43:16 +00:00
Simon Dardis a2d8cc3db9 [mips][atomics] Fix partword atomic binary operation implementation
Currently Mips::emitAtomicBinaryPartword() does not properly respect the
width of pointers. For MIPS64 this causes the memory address that the ll/sc
sequence uses to be truncated. At runtime this causes a segmentation fault.

This can be fixed by applying similar changes as r266204, so that a full 64bit
pointer is loaded.

Reviewers: dsanders

Differential Review: http://reviews.llvm.org/D19651

llvm-svn: 267900
2016-04-28 16:26:43 +00:00
Arch D. Robison 0e61034018 [SLPVectorizer] Extend SLP Vectorizer to deal with aggregates.
The refactoring portion part was done as r267748.

http://reviews.llvm.org/D14185

llvm-svn: 267899
2016-04-28 16:11:45 +00:00
Chad Rosier 712b7d7630 [GVN] Minor code cleanup. NFC.
Differential Revision: http://reviews.llvm.org/D18828
Patch by Aditya Kumar!

llvm-svn: 267898
2016-04-28 16:00:15 +00:00
Krzysztof Parzyszek e737b86f8c [Hexagon] Handle double-vector registers as new-value producers
Patch by Colin LeMahieu.

llvm-svn: 267897
2016-04-28 15:54:48 +00:00
Adrian Prantl e5447574c8 Debug Info: Restore the pre-r240853 behavior for DWARF2 bitfields.
The DWARF2 specification of DW_AT_bit_offset is ambiguous for
little-endian machines, but by restoring to the old behavior
we match what debuggers expect and what other popular compilers
generate.

llvm-svn: 267896
2016-04-28 15:37:52 +00:00
Adrian Prantl f393d313ec Debug info: Support DWARF4 bitfields via DW_AT_data_bit_offset.
The DWARF2 specification of DW_AT_bit_offset was written from the perspective of
a big-endian machine with unclear semantics for other systems.  DWARF4
deprecated DW_AT_bit_offset and introduced a new attribute DW_AT_data_bit_offset
that simply counts the number of bits from the beginning of the containing
entity regardless of endianness.

After this patch LLVM emits DW_AT_bit_offset for DWARF 2 or 3 and
DW_AT_data_bit_offset when DWARF 4 or later is requested.

llvm-svn: 267895
2016-04-28 15:37:48 +00:00