54ce295d37
A few more places where we can avoid multiple size queries.
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llvm-svn: 144099
2011-11-08 18:38:40 +00:00
f1932270c0
Don't evaluate Data.size() on every iteration.
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llvm-svn: 144095
2011-11-08 18:22:25 +00:00
71133fe9c6
This patch handles unaligned loads and stores in Mips JIT. Mips backend
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implements unaligned loads and stores with assembler macro-instructions
ulw, usw, ulh, ulhu, ush, and this patch emits corresponding instructions
instead of these macros. Since each unaligned load/store is expanded
into two corresponding loads/stores where offset for second load/store is
modified by +3 (for words) or +1 (for halfwords).
Patch by Petar Jovanovic and Sasa Stankovic.
llvm-svn: 144081
2011-11-08 12:47:11 +00:00
4fed9e3af4
PathProfiling.c: Get rid of using "inline". We may expect compiler shall optimize out "static" scope w/o "inline".
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llvm-svn: 144080
2011-11-08 12:03:14 +00:00
5ded03d873
Fix the printing of constants. Patch by Stepan Dyatkovskiy!
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llvm-svn: 144079
2011-11-08 06:53:04 +00:00
b33bd11c71
Add Eero to the list of external projects.
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llvm-svn: 144076
2011-11-08 05:22:54 +00:00
05aa1a42c3
PPCInstrInfo.cpp: Fix one "unused" warning.
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llvm-svn: 144071
2011-11-08 04:00:07 +00:00
bb8a523c62
runtime/libprofile/PathProfiling.c: Use __inline__ to appease clang -std=gnu89 -pedantic.
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FIXME: Should configure detect one?
llvm-svn: 144070
2011-11-08 03:54:40 +00:00
d8d583f766
test/CodeGen/X86/vec_shuffle-39.ll: Add explicit -mtriple=x86_64-linux. Passing packed value is not compatible on Win32 x64.
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llvm-svn: 144068
2011-11-08 03:46:39 +00:00
ac9ef21f02
test/CodeGen/X86/vec_shuffle-38.ll: Relax expression for Win32 x64.
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llvm-svn: 144067
2011-11-08 03:46:32 +00:00
33dac06330
test/CodeGen/X86/vec_shuffle.ll: Add explicit -mtriple=i686-linux. We may see some suboptimal frame (%ebp) emission on certain hosts. Possible [PR11031]
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llvm-svn: 144066
2011-11-08 03:46:25 +00:00
6f84fed675
Make sure to mark vector extload's as expand on ARM. Fixes PR11319.
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llvm-svn: 144057
2011-11-08 01:43:53 +00:00
f2a9bd4b1e
Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318.
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Re-commit of r144034, with an extra fix so that RemoveDeadNode doesn't blow up.
llvm-svn: 144055
2011-11-08 01:25:24 +00:00
1654bb22ca
Cleanup the formatting.
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llvm-svn: 144053
2011-11-08 00:32:45 +00:00
91b56e0390
Add x86 isel logic and patterns to match movlps from clang generated IR for _mm_loadl_pi(). rdar://10134392, rdar://10050222
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llvm-svn: 144052
2011-11-08 00:31:58 +00:00
2a917595d2
Convert to the new EH model.
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llvm-svn: 144050
2011-11-08 00:23:01 +00:00
2197b015c8
Convert to the new EH model.
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llvm-svn: 144049
2011-11-08 00:17:28 +00:00
9b7942a543
Convert tests to the new EH model.
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llvm-svn: 144048
2011-11-08 00:09:27 +00:00
5de1bea5c9
Enable support for returning i1, i8, and i16. Nothing special todo as it's the
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callee's responsibility to sign or zero-extend the return value. The additional
test case just checks to make sure the calls are selected (i.e., -fast-isel-abort
doesn't assert).
llvm-svn: 144047
2011-11-08 00:03:32 +00:00
2dc40434aa
Added missing newline
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llvm-svn: 144046
2011-11-08 00:03:24 +00:00
a35a5295e0
Revert r144034 while I try to track down a crash.
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llvm-svn: 144044
2011-11-07 23:53:20 +00:00
478f58cad4
This code is dead, what with the new EH model and the auto-upgraders in place.
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Delete!
llvm-svn: 144043
2011-11-07 23:36:48 +00:00
9279f9efbc
Fix test for Windows as well.
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llvm-svn: 144038
2011-11-07 23:10:43 +00:00
a70e9417fb
Kill and collapse outstanding DomainValues.
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DomainValues that are only used by "don't care" instructions are now
collapsed to the first possible execution domain after all basic blocks
have been processed. This typically means the PS domain on x86.
For example, the vsel_i64 and vsel_double functions in sse2-blend.ll are
completely collapsed to the PS domain instead of containing a mix of
execution domains created by isel.
llvm-svn: 144037
2011-11-07 23:08:21 +00:00
7a4be01ac8
InstCombine now optimizes vector udiv by power of 2 to shifts
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Fixes r8429
llvm-svn: 144036
2011-11-07 23:04:49 +00:00
55a86d32d3
Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318.
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llvm-svn: 144034
2011-11-07 22:51:10 +00:00
5139dadd50
Add all completed and named types to the dwarf type accelerator tables.
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llvm-svn: 144027
2011-11-07 22:11:16 +00:00
fc1935c8bf
Add ISPC to the external projects list.
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llvm-svn: 144026
2011-11-07 22:05:17 +00:00
68e197e151
Use a reverse post order instead of a DFS order.
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The enterBasicBlock() function is combining live-out values from
predecessor blocks. The RPO traversal means that more predecessors
have been visited when that happens, only back-edges are missing.
llvm-svn: 144025
2011-11-07 21:59:29 +00:00
ff2edf1499
Move the hash function to using and taking a StringRef.
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llvm-svn: 144024
2011-11-07 21:49:35 +00:00
b6205d8b49
Simple destructor to delete the hash data we created earlier.
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llvm-svn: 144023
2011-11-07 21:49:28 +00:00
fa75530ff0
Allow i1 to be promoted to i32 for ARM AAPCS and AAPCS-VFP calling convention as well.
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llvm-svn: 144021
2011-11-07 21:43:40 +00:00
736cf46c3e
Extract two methods. No functional change.
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llvm-svn: 144020
2011-11-07 21:40:27 +00:00
2216f73676
Various Mips64 floating point instruction patterns.
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llvm-svn: 144019
2011-11-07 21:38:58 +00:00
b2d37760a2
Add definition of the base class for floating point comparison instructions
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and add Mips64's version too.
llvm-svn: 144018
2011-11-07 21:37:33 +00:00
81c14002dc
Add code needed for copying between 64-bit integer and floating pointer
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registers.
llvm-svn: 144017
2011-11-07 21:35:45 +00:00
1537e297e1
Add definitions of 64-bit instructions which move data between integer and
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floating pointer registers.
llvm-svn: 144016
2011-11-07 21:32:58 +00:00
44dcc589b3
MBB doesn't need to be a class member.
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llvm-svn: 144015
2011-11-07 21:23:42 +00:00
baffa7d35d
Fix pass name after the source was moved.
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llvm-svn: 144014
2011-11-07 21:23:39 +00:00
69d57cf9c4
Simplify some uses of utohexstr.
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As a side effect hex is printed lowercase instead of uppercase now.
llvm-svn: 144013
2011-11-07 21:00:59 +00:00
03d73e47b4
Simplify code. No functionality change.
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llvm-svn: 144012
2011-11-07 21:00:43 +00:00
7f076cb6cc
Fix test for Linux.
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llvm-svn: 144003
2011-11-07 20:47:23 +00:00
7496461f44
Make sure we don't insert instructions before a landingpad instruction.
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<rdar://problem/10405911>
llvm-svn: 144000
2011-11-07 19:38:34 +00:00
0241308954
Expand V_SET0 to xorps by default.
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The xorps instruction is smaller than pxor, so prefer that encoding.
The ExecutionDepsFix pass will switch the encoding to pxor and xorpd
when appropriate.
llvm-svn: 143996
2011-11-07 19:15:58 +00:00
2b8d1f163f
Add definition of 64-bit load upper immediate.
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llvm-svn: 143994
2011-11-07 19:10:49 +00:00
2f4480046b
Include RegSaveAreaSize in the computation of stack size.
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llvm-svn: 143993
2011-11-07 19:07:35 +00:00
7bcecd486f
Define functions that get or set the size of area on callee's stack frame which
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is used to save va_arg or byval arguments passed in registers.
llvm-svn: 143992
2011-11-07 19:06:10 +00:00
d9c2e46cfb
Use array_lengthof to compute the number of iterations of a loop.
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llvm-svn: 143991
2011-11-07 19:03:40 +00:00
cf7e5b0976
Fix patterns for unaligned 32-bit load. DSLL32 or DSRL32 should be emitted
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when shift amount is larger than 32.
llvm-svn: 143990
2011-11-07 19:01:49 +00:00
770f0646db
Make the type of shift amount i32 in order to reduce the number of shift
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instruction definitions.
llvm-svn: 143989
2011-11-07 18:59:49 +00:00
Eric Christopher