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4 Commits

Author SHA1 Message Date
Matt Arsenault 236d9afd18 Alphabetize forward declarations 
llvm-svn: 211509
 2014-06-23 18:00:20 +00:00
Tom Stellard c721a23882 R600/SI: Refactor the VOP3_32 tablegen class 
This will allow us to use a single MachineInstr to represent
instructions which behave the same but have different encodings
on some subtargets.

llvm-svn: 209028
 2014-05-16 20:56:47 +00:00
Tom Stellard 9e90b5895d R600: BB operand support for SI 
Patch by: Christian König

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
llvm-svn: 170342
 2012-12-17 15:14:54 +00:00
Tom Stellard 75aadc2813 Add R600 backend 
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX

llvm-svn: 169915
 2012-12-11 21:25:42 +00:00