Commit Graph

105773 Commits

Author SHA1 Message Date
Dan Liew 54891de4cb Revert "Treat warnings in Sphinx as errors. The reasons for doing this are..."
This reverts commit r213661.

Reverting at the request of Sean Silva.

llvm-svn: 213675
2014-07-22 18:09:17 +00:00
Dan Liew 3982813700 Add LLVM_TOOLS_BINARY_DIR variable to LLVMConfig.cmake so clients
of LLVM using CMake can easily find the tools directory.

LLVM_BUILD_TOOLS_BINARY_DIR was removed because it is now
superfluous.

llvm-svn: 213674
2014-07-22 17:48:51 +00:00
Alexey Samsonov bad4d0c38a [ASan] Fix comments about __sanitizer_cov function
llvm-svn: 213673
2014-07-22 17:46:09 +00:00
Hal Finkel ccc7090671 Make use of the align parameter attribute for all pointer arguments
We previously supported the align attribute on all (pointer) parameters, but we
only used it for byval parameters. However, it is completely consistent at the
IR level to treat 'align n' on all pointer parameters as an alignment
assumption on the pointer, and now we wll. Specifically, this causes
computeKnownBits to use the align attribute on all pointer parameters, not just
byval parameters. I've also added an explicit parameter attribute test for this
to test/Bitcode/attributes.ll.

And I've updated the LangRef to document the align parameter attribute (as it
turns out, it was not documented at all previously, although the byval
documentation mentioned that it could be used).

There are (at least) two benefits to doing this:
 - It allows enhancing alignment based on the pointer alignment after inlining callees.
 - It allows simplification of pointer arithmetic.

llvm-svn: 213670
2014-07-22 16:58:55 +00:00
Tim Northover 0942e39061 X86: drop relocations on __eh_frame sections globally.
Without this, we produce non-extern relocations when targeting older OS X
versions that ld64 can't cope with in the particular context of __eh_frame
sections (who'd want generic relocation-processing anyway?).

This means that an updated linker (ld64 from Xcode 3.2.6 or later) may be
needed when targeting such platforms with a modern version of LLVM, but this is
probably the case anyway and a reasonable requirement.

PR20212, rdar://problem/17544795

llvm-svn: 213665
2014-07-22 15:47:09 +00:00
Dan Liew 066f50a251 Export LLVM_ENABLE_RTTI and LLVM_ENABLE_EH in LLVMConfig.cmake so
clients of LLVM know if RTTI and/or EH were enabled in the build of
LLVM they are trying to link against.

llvm-svn: 213664
2014-07-22 15:41:33 +00:00
Dan Liew a5bdc846aa Added LLVM_ENABLE_RTTI and LLVM_ENABLE_EH options that allow RTTI and EH
to globally be controlled. Individual targets (e.g.  ExceptionDemo) can
still override this by using LLVM_REQUIRE_RTTI and LLVM_REQUIRE_EH if
they need to be compiled with RTTI or exception handling respectively.

llvm-svn: 213663
2014-07-22 15:41:18 +00:00
Suyog Sarda 521237cad6 This patch implements transform for pattern "(A | B) ^ (~A) -> (A | ~B)".
Patch Credit to Ankit Jain !!

Differential Revision: http://reviews.llvm.org/D4588

llvm-svn: 213662
2014-07-22 15:37:39 +00:00
Dan Liew 0d38c3a726 Treat warnings in Sphinx as errors. The reasons for doing this are...
- When CMake builds the documentation with sphinx-build it treats
  warnings as errors. We should be consistent with what we do in
  CMake.
- Having warnings treated as errors will hopefully encourage
  developers to write documentation correctly.

llvm-svn: 213661
2014-07-22 15:07:35 +00:00
Dan Liew 9a1829d3f1 Fix Sphinx warning.
llvm-svn: 213660
2014-07-22 14:59:38 +00:00
Peter Zotov daacd61443 [OCaml] Don't truncate constants over 32 bits in Llvm.const_int.
llvm-svn: 213655
2014-07-22 13:55:20 +00:00
Sasa Stankovic 319f0ff3b7 [mips] Fix two patterns that select i32's (for MIPS32r6) / i64's (for MIPS64r6)
from setne comparison with an i32.

The patterns that are fixed:
  * (select (i32 (setne i32, immZExt16)), i32, i32) (for MIPS32r6)
  * (select (i32 (setne i32, immZExt16)), i64, i64) (for MIPS64r6)

llvm-svn: 213653
2014-07-22 13:36:02 +00:00
Elena Demikhovsky f164859efc AVX-512: Fixed intrinsic of VSQRTPS/PD instructions.
I set number and types of parameters according to GCC intrinsics.

llvm-svn: 213640
2014-07-22 11:07:31 +00:00
Sanjay Patel fc3d8f0a78 fixed typo in comment
llvm-svn: 213614
2014-07-22 04:57:06 +00:00
Chandler Carruth 41b20e7783 [SDAG] Refactor the code for inserting a newly allocated SDNode into the
DAG into a helper function.

This adds a trip through the (very minimal) verification logic in
a bunch of places that were missing it, but shouldn't have any other
impact outside of refactoring. I'm hoping to use this to do more clever
things when DAG nodes are inserted into the graph.

llvm-svn: 213612
2014-07-22 04:07:55 +00:00
Chandler Carruth 2fc9a2b8eb [SDAG] Remove a giant pile of asserts that may have helped track down
a bug in 2010 when they were added but are adding no value today.

In fact, they are utter lies. NodeAllocator is used to allocate almost
all of these node types. I don't know what we were trying to assert
here, and the docs don't give any answer. Until we once again stumble
upon a bug needing help, let's clear the path for improvements.

llvm-svn: 213610
2014-07-22 04:03:22 +00:00
Bill Wendling 47bdc929e3 Add openmp to the list of tagged things.
llvm-svn: 213608
2014-07-22 03:17:30 +00:00
Richard Smith a0cc1654ce Revert of r213521. This change introduced a non-hermetic test (depending on a
file not in the test/ area). Backing out now so that this test isn't part of
the 3.5 branch.

Original commit message: "TableGen: Allow AddedComplexity values to be negative
[...]"

llvm-svn: 213596
2014-07-22 02:32:12 +00:00
Mark Heffernan 9d20e42765 Rename metadata llvm.loop.vectorize.unroll to llvm.loop.vectorize.interleave.
llvm-svn: 213588
2014-07-21 23:11:03 +00:00
Eli Bendersky 24d8aacd94 Add some tests for NVPTX lowering of cmpxchg
llvm-svn: 213586
2014-07-21 22:54:44 +00:00
Hal Finkel d32803b669 Match semantics of PointerMayBeCapturedBefore to its name by default
As it turns out, the capture tracker named CaptureBefore used by AA, and now
available via the PointerMayBeCapturedBefore function, would have been
more-aptly named CapturedBeforeOrAt, because it considers captures at the
instruction provided. This is not always what one wants, and it is difficult to
get the strictly-before behavior given only the current interface. This adds an
additional parameter which controls whether or not you want to include
captures at the provided instruction. The default is not to include the
instruction provided, so that 'Before' matches its name.

No functionality change intended.

llvm-svn: 213582
2014-07-21 21:30:22 +00:00
David Blaikie 26f2268cc5 Revert "Recommit r212203: Don't try to construct debug LexicalScopes hierarchy for functions that do not have top level debug information."
This reverts commit r212649 while I investigate/reduce/etc PR20367.

llvm-svn: 213581
2014-07-21 20:45:59 +00:00
Tom Stellard 9c4c3c58cb test-release.sh: Add support for dot releases
llvm-svn: 213580
2014-07-21 20:20:08 +00:00
Saleem Abdulrasool 913666f9bc R600: silence GCC warning
GCC believes it may be possible to not return a value from the switch:
  lib/Target/R600/SIRegisterInfo.cpp:187:1: warning: control reaches end of non-void function [-Wreturn-type]

Add an unreachable label to indicate that this is not possible and still permit
switch coverage checking.

llvm-svn: 213572
2014-07-21 17:52:00 +00:00
Tom Stellard bda32c9e47 R600/SI: Refactor VOP3 instruction definitions
llvm-svn: 213571
2014-07-21 17:44:29 +00:00
Tom Stellard e5a1cdab47 R600/SI: Separate encoding and operand definitions into their own classes
llvm-svn: 213570
2014-07-21 17:44:28 +00:00
Logan Chien 63bee2a2bb Replace the result usages while legalizing cmpxchg.
We should update the usages to all of the results;
otherwise, we might get assertion failure or SEGV during
the type legalization of ATOMIC_CMP_SWAP_WITH_SUCCESS
with two or more illegal types.

For example, in the following sequence, both i8 and i1
might be illegal in some target, e.g. armv5, mipsel, mips64el,

    %0 = cmpxchg i8* %ptr, i8 %desire, i8 %new monotonic monotonic
    %1 = extractvalue { i8, i1 } %0, 1

Since both i8 and i1 should be legalized, the corresponding
ATOMIC_CMP_SWAP_WITH_SUCCESS dag will be checked/replaced/updated
twice.

If we don't update the usage to *ALL* of the results in the
first round, the DAG for extractvalue might be processed earlier.
The GetPromotedInteger() will result in assertion failure,
because its operand (i.e. the success bit of cmpxchg) is not
promoted beforehand.

llvm-svn: 213569
2014-07-21 17:33:44 +00:00
Tom Stellard f757b5ddc2 R600/SI: Initailize encoding fields of unused VOP3 modifiers to 0
llvm-svn: 213564
2014-07-21 17:12:40 +00:00
Tom Stellard ca000c6c7b R600/SI: Initialize unused VOP3 sources to 0 instead of SIOperand.ZERO
llvm-svn: 213563
2014-07-21 17:12:37 +00:00
Duncan P. N. Exon Smith 6c99015fe2 Revert "[C++11] Add predecessors(BasicBlock *) / successors(BasicBlock *) iterator ranges."
This reverts commit r213474 (and r213475), which causes a miscompile on
a stage2 LTO build.  I'll reply on the list in a moment.

llvm-svn: 213562
2014-07-21 17:06:51 +00:00
Tom Stellard 1aaad6970c R600/SI: Add instruction shrinking pass
This pass converts 64-bit instructions to 32-bit when possible.

llvm-svn: 213561
2014-07-21 16:55:33 +00:00
Dan Liew a762a137b7 Fix Sphinx warnings.
llvm-svn: 213559
2014-07-21 16:39:00 +00:00
Tom Stellard 63797d4a23 R600/SI: VOPC instructions explicitly define VCC
Therefore we don't need to add it to the implict defs list.

llvm-svn: 213558
2014-07-21 16:27:24 +00:00
David Blaikie 4b9ae52ac1 Correct the ownership passing semantics of object::createBinary and make them explicit in the type system.
createBinary documented that it destroyed the parameter in error cases,
though by observation it does not. By passing the unique_ptr by value
rather than lvalue reference, callers are now explicit about passing
ownership and the function implements the documented contract. Remove
the explicit documentation, since now the behavior cannot be anything
other than what was documented, so it's redundant.

Also drops a unique_ptr::release in llvm-nm that was always run on a
null unique_ptr anyway.

llvm-svn: 213557
2014-07-21 16:26:24 +00:00
David Blaikie dc01ca1896 Remove unnecessary use of unique_ptr::release() used to construct another unique_ptr.
llvm-svn: 213556
2014-07-21 16:23:21 +00:00
David Blaikie 370a67a56c Remove unused variable.
llvm-svn: 213554
2014-07-21 16:13:24 +00:00
Tom Stellard e812f2fdd8 R600/SI: Clean up some of the unused REGISTER_{LOAD,STORE} code
There are a few more cleanups to do, but I ran into some problems
with ext loads and trunc stores, when I tried to change some of the
vector loads and stores from custom to legal, so I wasn't able to
get rid of everything.

llvm-svn: 213552
2014-07-21 15:45:06 +00:00
Tom Stellard b02094e115 R600/SI: Use scratch memory for large private arrays
llvm-svn: 213551
2014-07-21 15:45:01 +00:00
Tom Stellard 42639a57de R600/SI: Specify wavefront size for SI and CI
llvm-svn: 213550
2014-07-21 15:44:58 +00:00
Tom Stellard 8e44d948b6 R600/SI: Remove vaddr operand from BUFFER_LOAD_*_OFFSET instructions
This operand is never used.

llvm-svn: 213549
2014-07-21 15:44:55 +00:00
Daniel Sanders e22244b733 [mips] Do not emit '.module fp=...' unless we really need to.
We now emit this value when we need to contradict the default value. This
restores support for binutils 2.24.

When a suitable binutils has been released we can resume unconditionally
emitting .module directives. This is preferable to omitting the .module
directives since the .module directives protect against, for example,
accidentally assembling FP32 code with -mfp64 and producing an unusuable object.

llvm-svn: 213548
2014-07-21 15:25:24 +00:00
Robert Khasanov bfa0131365 [SKX] Enabling SKX target and AVX512BW, AVX512DQ, AVX512VL features.
Enabling HasAVX512{DQ,BW,VL} predicates.
Adding VK2, VK4, VK32, VK64 masked register classes.
Adding new types (v64i8, v32i16) to VR512.
Extending calling conventions for new types (v64i8, v32i16)

Patch by Zinovy Nis <zinovy.y.nis@intel.com>
Reviewed by Elena Demikhovsky <elena.demikhovsky@intel.com>

llvm-svn: 213545
2014-07-21 14:54:21 +00:00
Tom Stellard 32411403b2 docs: Update relaease documents to include the patch number in the RELEASE tags
This will make it easier to update the release scripts to support
bug-fix releases.

llvm-svn: 213544
2014-07-21 14:28:31 +00:00
Dan Liew 12902a0ed8 Export LLVM_ENABLE_ASSERTIONS in LLVMConfig.cmake so clients know
if the version of LLVM they are trying to use was built with or
without assertions.

llvm-svn: 213532
2014-07-21 14:17:15 +00:00
Tom Stellard 067c81567b R600/SI: Store constant initializer data in constant memory
This implements a solution for constant initializers suggested
by Vadim Girlin, where we store the data after the shader code
and then use the S_GETPC instruction to compute its address.

This saves use the trouble of creating a new buffer for constant data
and then having to pass the pointer to the kernel via user SGPRs or the
input buffer.

llvm-svn: 213530
2014-07-21 14:01:14 +00:00
Tom Stellard b2114caf62 R600/SI: Add isCFDepth0 Predicate to SALU addc pattern
llvm-svn: 213529
2014-07-21 14:01:12 +00:00
Tom Stellard 54a3b65bb9 R600/SI: Use VALU for i1 XOR
llvm-svn: 213528
2014-07-21 14:01:10 +00:00
Tom Stellard 01825afad7 R600/SI: Use a custom encoding method for simm16 in SOPP branch instructions
This allows us to explicitly define the type of fixup that is needed,
so we can distinguish this from future fixup types.

llvm-svn: 213527
2014-07-21 14:01:08 +00:00
Tom Stellard e08fe68bdd R600/SI: Rename SOPP operands to match the encoding fields
llvm-svn: 213526
2014-07-21 14:01:05 +00:00
Daniel Sanders 68c3747efb [mips] Add MipsOptionRecord abstraction and use it to implement .reginfo/.MIPS.options
This abstraction allows us to support the various records that can be placed in
the .MIPS.options section in the future. We currently use it to record register
usage information (the ODK_REGINFO record in our ELF64 spec).

Each .MIPS.options record should subclass MipsOptionRecord and provide an
implementation of EmitMipsOptionRecord.

Patch by Matheus Almeida and Toma Tabacu

llvm-svn: 213522
2014-07-21 13:30:55 +00:00